1 /* 2 * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved. 3 * 4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc. 5 * 6 * 7 * Permission to use, copy, modify, and/or distribute this software for 8 * any purpose with or without fee is hereby granted, provided that the 9 * above copyright notice and this permission notice appear in all 10 * copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 19 * PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /* 23 * This file was originally distributed by Qualcomm Atheros, Inc. 24 * under proprietary terms before Copyright ownership was assigned 25 * to the Linux Foundation. 26 */ 27 28 #include "targcfg.h" 29 #include "qdf_lock.h" 30 #include "qdf_status.h" 31 #include "qdf_status.h" 32 #include <qdf_atomic.h> /* qdf_atomic_read */ 33 #include <targaddrs.h> 34 #include "hif_io32.h" 35 #include <hif.h> 36 #include "regtable.h" 37 #define ATH_MODULE_NAME hif 38 #include <a_debug.h> 39 #include "hif_main.h" 40 #include "ce_api.h" 41 #include "ce_bmi.h" 42 #include "qdf_trace.h" 43 #include "hif_debug.h" 44 #include "bmi_msg.h" 45 46 /* Track a BMI transaction that is in progress */ 47 #ifndef BIT 48 #define BIT(n) (1 << (n)) 49 #endif 50 51 enum { 52 BMI_REQ_SEND_DONE = BIT(0), /* the bmi tx completion */ 53 BMI_RESP_RECV_DONE = BIT(1), /* the bmi respond is received */ 54 }; 55 56 struct BMI_transaction { 57 struct HIF_CE_state *hif_state; 58 qdf_semaphore_t bmi_transaction_sem; 59 uint8_t *bmi_request_host; /* Req BMI msg in Host addr space */ 60 qdf_dma_addr_t bmi_request_CE; /* Req BMI msg in CE addr space */ 61 uint32_t bmi_request_length; /* Length of BMI request */ 62 uint8_t *bmi_response_host; /* Rsp BMI msg in Host addr space */ 63 qdf_dma_addr_t bmi_response_CE; /* Rsp BMI msg in CE addr space */ 64 unsigned int bmi_response_length; /* Length of received response */ 65 unsigned int bmi_timeout_ms; 66 uint32_t bmi_transaction_flags; /* flags for the transcation */ 67 }; 68 69 /* 70 * send/recv completion functions for BMI. 71 * NB: The "net_buf" parameter is actually just a 72 * straight buffer, not an sk_buff. 73 */ 74 void hif_bmi_send_done(struct CE_handle *copyeng, void *ce_context, 75 void *transfer_context, qdf_dma_addr_t data, 76 unsigned int nbytes, 77 unsigned int transfer_id, unsigned int sw_index, 78 unsigned int hw_index, uint32_t toeplitz_hash_result) 79 { 80 struct BMI_transaction *transaction = 81 (struct BMI_transaction *)transfer_context; 82 83 #ifdef BMI_RSP_POLLING 84 /* 85 * Fix EV118783, Release a semaphore after sending 86 * no matter whether a response is been expecting now. 87 */ 88 qdf_semaphore_release(&transaction->bmi_transaction_sem); 89 #else 90 /* 91 * If a response is anticipated, we'll complete the 92 * transaction if the response has been received. 93 * If no response is anticipated, complete the 94 * transaction now. 95 */ 96 transaction->bmi_transaction_flags |= BMI_REQ_SEND_DONE; 97 98 /* resp is't needed or has already been received, 99 * never assume resp comes later then this 100 */ 101 if (!transaction->bmi_response_CE || 102 (transaction->bmi_transaction_flags & BMI_RESP_RECV_DONE)) { 103 qdf_semaphore_release(&transaction->bmi_transaction_sem); 104 } 105 #endif 106 } 107 108 #ifndef BMI_RSP_POLLING 109 void hif_bmi_recv_data(struct CE_handle *copyeng, void *ce_context, 110 void *transfer_context, qdf_dma_addr_t data, 111 unsigned int nbytes, 112 unsigned int transfer_id, unsigned int flags) 113 { 114 struct BMI_transaction *transaction = 115 (struct BMI_transaction *)transfer_context; 116 117 transaction->bmi_response_length = nbytes; 118 transaction->bmi_transaction_flags |= BMI_RESP_RECV_DONE; 119 120 /* when both send/recv are done, the sem can be released */ 121 if (transaction->bmi_transaction_flags & BMI_REQ_SEND_DONE) 122 qdf_semaphore_release(&transaction->bmi_transaction_sem); 123 } 124 #endif 125 126 QDF_STATUS hif_exchange_bmi_msg(struct hif_opaque_softc *hif_ctx, 127 qdf_dma_addr_t bmi_cmd_da, 128 qdf_dma_addr_t bmi_rsp_da, 129 uint8_t *bmi_request, 130 uint32_t request_length, 131 uint8_t *bmi_response, 132 uint32_t *bmi_response_lengthp, 133 uint32_t TimeoutMS) 134 { 135 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 136 struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); 137 struct HIF_CE_pipe_info *send_pipe_info = 138 &(hif_state->pipe_info[BMI_CE_NUM_TO_TARG]); 139 struct CE_handle *ce_send_hdl = send_pipe_info->ce_hdl; 140 qdf_dma_addr_t CE_request, CE_response = 0; 141 struct BMI_transaction *transaction = NULL; 142 int status = QDF_STATUS_SUCCESS; 143 struct HIF_CE_pipe_info *recv_pipe_info = 144 &(hif_state->pipe_info[BMI_CE_NUM_TO_HOST]); 145 struct CE_handle *ce_recv = recv_pipe_info->ce_hdl; 146 unsigned int mux_id = 0; 147 unsigned int transaction_id = 0xffff; 148 unsigned int user_flags = 0; 149 #ifdef BMI_RSP_POLLING 150 qdf_dma_addr_t buf; 151 unsigned int completed_nbytes, id, flags; 152 int i; 153 #endif 154 155 transaction = 156 (struct BMI_transaction *)qdf_mem_malloc(sizeof(*transaction)); 157 if (unlikely(!transaction)) { 158 HIF_ERROR("%s: no memory", __func__); 159 return QDF_STATUS_E_NOMEM; 160 } 161 transaction_id = (mux_id & MUX_ID_MASK) | 162 (transaction_id & TRANSACTION_ID_MASK); 163 #ifdef QCA_WIFI_3_0 164 user_flags &= DESC_DATA_FLAG_MASK; 165 #endif 166 A_TARGET_ACCESS_LIKELY(scn); 167 168 /* Initialize bmi_transaction_sem to block */ 169 qdf_semaphore_init(&transaction->bmi_transaction_sem); 170 qdf_semaphore_acquire(&transaction->bmi_transaction_sem); 171 172 transaction->hif_state = hif_state; 173 transaction->bmi_request_host = bmi_request; 174 transaction->bmi_request_length = request_length; 175 transaction->bmi_response_length = 0; 176 transaction->bmi_timeout_ms = TimeoutMS; 177 transaction->bmi_transaction_flags = 0; 178 179 /* 180 * CE_request = dma_map_single(dev, 181 * (void *)bmi_request, request_length, DMA_TO_DEVICE); 182 */ 183 CE_request = bmi_cmd_da; 184 transaction->bmi_request_CE = CE_request; 185 186 if (bmi_response) { 187 188 /* 189 * CE_response = dma_map_single(dev, bmi_response, 190 * BMI_DATASZ_MAX, DMA_FROM_DEVICE); 191 */ 192 CE_response = bmi_rsp_da; 193 transaction->bmi_response_host = bmi_response; 194 transaction->bmi_response_CE = CE_response; 195 /* dma_cache_sync(dev, bmi_response, 196 * BMI_DATASZ_MAX, DMA_FROM_DEVICE); 197 */ 198 qdf_mem_dma_sync_single_for_device(scn->qdf_dev, 199 CE_response, 200 BMI_DATASZ_MAX, 201 DMA_FROM_DEVICE); 202 ce_recv_buf_enqueue(ce_recv, transaction, 203 transaction->bmi_response_CE); 204 /* NB: see HIF_BMI_recv_done */ 205 } else { 206 transaction->bmi_response_host = NULL; 207 transaction->bmi_response_CE = 0; 208 } 209 210 /* dma_cache_sync(dev, bmi_request, request_length, DMA_TO_DEVICE); */ 211 qdf_mem_dma_sync_single_for_device(scn->qdf_dev, CE_request, 212 request_length, DMA_TO_DEVICE); 213 214 status = 215 ce_send(ce_send_hdl, transaction, 216 CE_request, request_length, 217 transaction_id, 0, user_flags); 218 ASSERT(status == QDF_STATUS_SUCCESS); 219 /* NB: see hif_bmi_send_done */ 220 221 /* TBDXXX: handle timeout */ 222 223 /* Wait for BMI request/response transaction to complete */ 224 /* Always just wait for BMI request here if 225 * BMI_RSP_POLLING is defined 226 */ 227 while (qdf_semaphore_acquire 228 (&transaction->bmi_transaction_sem)) { 229 /*need some break out condition(time out?) */ 230 } 231 232 if (bmi_response) { 233 #ifdef BMI_RSP_POLLING 234 /* Fix EV118783, do not wait a semaphore for the BMI response 235 * since the relative interruption may be lost. 236 * poll the BMI response instead. 237 */ 238 i = 0; 239 while (ce_completed_recv_next( 240 ce_recv, NULL, NULL, &buf, 241 &completed_nbytes, &id, 242 &flags) != QDF_STATUS_SUCCESS) { 243 if (i++ > BMI_RSP_TO_MILLISEC) { 244 HIF_ERROR("%s:error, can't get bmi response", 245 __func__); 246 status = QDF_STATUS_E_BUSY; 247 break; 248 } 249 OS_DELAY(1000); 250 } 251 252 if ((status == QDF_STATUS_SUCCESS) && bmi_response_lengthp) 253 *bmi_response_lengthp = completed_nbytes; 254 #else 255 if ((status == QDF_STATUS_SUCCESS) && bmi_response_lengthp) { 256 *bmi_response_lengthp = 257 transaction->bmi_response_length; 258 } 259 #endif 260 261 } 262 263 /* dma_unmap_single(dev, transaction->bmi_request_CE, 264 * request_length, DMA_TO_DEVICE); 265 * bus_unmap_single(scn->sc_osdev, 266 * transaction->bmi_request_CE, 267 * request_length, BUS_DMA_TODEVICE); 268 */ 269 270 if (status != QDF_STATUS_SUCCESS) { 271 qdf_dma_addr_t unused_buffer; 272 unsigned int unused_nbytes; 273 unsigned int unused_id; 274 unsigned int toeplitz_hash_result; 275 276 ce_cancel_send_next(ce_send_hdl, 277 NULL, NULL, &unused_buffer, 278 &unused_nbytes, &unused_id, 279 &toeplitz_hash_result); 280 } 281 282 A_TARGET_ACCESS_UNLIKELY(scn); 283 qdf_mem_free(transaction); 284 return status; 285 } 286 287 #ifdef BMI_RSP_POLLING 288 #define BMI_RSP_CB_REGISTER 0 289 #else 290 #define BMI_RSP_CB_REGISTER 1 291 #endif 292 293 /** 294 * hif_register_bmi_callbacks() - register bmi callbacks 295 * @hif_sc: hif context 296 * 297 * Bmi phase uses different copy complete callbacks than mission mode. 298 */ 299 void hif_register_bmi_callbacks(struct hif_softc *hif_sc) 300 { 301 struct HIF_CE_pipe_info *pipe_info; 302 struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); 303 304 /* 305 * Initially, establish CE completion handlers for use with BMI. 306 * These are overwritten with generic handlers after we exit BMI phase. 307 */ 308 pipe_info = &hif_state->pipe_info[BMI_CE_NUM_TO_TARG]; 309 ce_send_cb_register(pipe_info->ce_hdl, hif_bmi_send_done, pipe_info, 0); 310 311 if (BMI_RSP_CB_REGISTER) { 312 pipe_info = &hif_state->pipe_info[BMI_CE_NUM_TO_HOST]; 313 ce_recv_cb_register( 314 pipe_info->ce_hdl, hif_bmi_recv_data, pipe_info, 0); 315 } 316 } 317