1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _HAL_RH_RX_H_ 21 #define _HAL_RH_RX_H_ 22 23 #include <hal_rx.h> 24 25 /* 26 * macro to set the cookie into the rxdma ring entry 27 */ 28 #define HAL_RXDMA_COOKIE_SET(buff_addr_info, cookie) \ 29 ((*(((unsigned int *)buff_addr_info) + \ 30 (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) &= \ 31 ~BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK); \ 32 ((*(((unsigned int *)buff_addr_info) + \ 33 (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) |= \ 34 ((cookie) << BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB) & \ 35 BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK) 36 37 /* 38 * macro to set the manager into the rxdma ring entry 39 */ 40 #define HAL_RXDMA_MANAGER_SET(buff_addr_info, manager) \ 41 ((*(((unsigned int *)buff_addr_info) + \ 42 (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) &= \ 43 ~BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK); \ 44 ((*(((unsigned int *)buff_addr_info) + \ 45 (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) |= \ 46 ((manager) << BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB) & \ 47 BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK) 48 49 /* 50 * NOTE: None of the following _GET macros need a right 51 * shift by the corresponding _LSB. This is because, they are 52 * finally taken and "OR'ed" into a single word again. 53 */ 54 55 #define HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) \ 56 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ 57 RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET)) & \ 58 RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK) 59 60 #define HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) \ 61 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ 62 RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET)) & \ 63 RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK) 64 65 #define HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \ 66 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ 67 RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET)) & \ 68 RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK) 69 70 #define HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) \ 71 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ 72 RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET)) & \ 73 RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK) 74 75 #define HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) \ 76 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ 77 RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET)) & \ 78 RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK) 79 80 #define HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \ 81 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ 82 RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET)) & \ 83 RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK) 84 85 /* 86 * Structures & Macros to obtain fields from the TLV's in the Rx packet 87 * pre-header. 88 */ 89 90 /* 91 * Every Rx packet starts at an offset from the top of the buffer. 92 * If the host hasn't subscribed to any specific TLV, there is 93 * still space reserved for the following TLV's from the start of 94 * the buffer: 95 * -- RX ATTENTION 96 * -- RX MPDU START 97 * -- RX MSDU START 98 * -- RX MSDU END 99 * -- RX MPDU END 100 * -- RX PACKET HEADER (802.11) 101 * If the host subscribes to any of the TLV's above, that TLV 102 * if populated by the HW 103 */ 104 105 #define NUM_DWORDS_TAG 1 106 107 /* By default the packet header TLV is 128 bytes */ 108 #define NUM_OF_BYTES_RX_802_11_HDR_TLV 128 109 #define NUM_OF_DWORDS_RX_802_11_HDR_TLV \ 110 (NUM_OF_BYTES_RX_802_11_HDR_TLV >> 2) 111 112 #define RX_PKT_OFFSET_WORDS \ 113 ( \ 114 NUM_OF_DWORDS_RX_ATTENTION + NUM_DWORDS_TAG \ 115 NUM_OF_DWORDS_RX_MPDU_START + NUM_DWORDS_TAG \ 116 NUM_OF_DWORDS_RX_MSDU_START + NUM_DWORDS_TAG \ 117 NUM_OF_DWORDS_RX_MSDU_END + NUM_DWORDS_TAG \ 118 NUM_OF_DWORDS_RX_MPDU_END + NUM_DWORDS_TAG \ 119 NUM_OF_DWORDS_RX_802_11_HDR_TLV + NUM_DWORDS_TAG \ 120 ) 121 122 #define RX_PKT_OFFSET_BYTES \ 123 (RX_PKT_OFFSET_WORDS << 2) 124 125 #define RX_PKT_HDR_TLV_LEN 120 126 127 /* 128 * Each RX descriptor TLV is preceded by 1 DWORD "tag" 129 */ 130 struct rx_attention_tlv { 131 uint32_t tag; 132 struct rx_attention rx_attn; 133 }; 134 135 struct rx_mpdu_start_tlv { 136 uint32_t tag; 137 struct rx_mpdu_start rx_mpdu_start; 138 }; 139 140 struct rx_msdu_start_tlv { 141 uint32_t tag; 142 struct rx_msdu_start rx_msdu_start; 143 }; 144 145 struct rx_msdu_end_tlv { 146 uint32_t tag; 147 struct rx_msdu_end rx_msdu_end; 148 }; 149 150 struct rx_mpdu_end_tlv { 151 uint32_t tag; 152 struct rx_mpdu_end rx_mpdu_end; 153 }; 154 155 struct rx_pkt_hdr_tlv { 156 uint32_t tag; /* 4 B */ 157 uint32_t phy_ppdu_id; /* 4 B */ 158 char rx_pkt_hdr[RX_PKT_HDR_TLV_LEN]; /* 120 B */ 159 }; 160 161 /* rx_pkt_tlvs structure should be used to process Data buffers, monitor status 162 * buffers, monitor destination buffers and monitor descriptor buffers. 163 */ 164 #ifdef RXDMA_OPTIMIZATION 165 /* 166 * The RX_PADDING_BYTES is required so that the TLV's don't 167 * spread across the 128 byte boundary 168 * RXDMA optimization requires: 169 * 1) MSDU_END & ATTENTION TLV's follow in that order 170 * 2) TLV's don't span across 128 byte lines 171 * 3) Rx Buffer is nicely aligned on the 128 byte boundary 172 */ 173 #define RX_PADDING0_BYTES 4 174 #define RX_PADDING1_BYTES 16 175 struct rx_pkt_tlvs { 176 struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */ 177 struct rx_attention_tlv attn_tlv; /* 16 bytes */ 178 struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */ 179 uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */ 180 struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */ 181 struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */ 182 uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */ 183 #ifndef NO_RX_PKT_HDR_TLV 184 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 185 #endif 186 }; 187 #else /* RXDMA_OPTIMIZATION */ 188 struct rx_pkt_tlvs { 189 struct rx_attention_tlv attn_tlv; 190 struct rx_mpdu_start_tlv mpdu_start_tlv; 191 struct rx_msdu_start_tlv msdu_start_tlv; 192 struct rx_msdu_end_tlv msdu_end_tlv; 193 struct rx_mpdu_end_tlv mpdu_end_tlv; 194 struct rx_pkt_hdr_tlv pkt_hdr_tlv; 195 }; 196 #endif /* RXDMA_OPTIMIZATION */ 197 198 /* rx_mon_pkt_tlvs structure should be used to process monitor data buffers */ 199 #ifdef RXDMA_OPTIMIZATION 200 struct rx_mon_pkt_tlvs { 201 struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */ 202 struct rx_attention_tlv attn_tlv; /* 16 bytes */ 203 struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */ 204 uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */ 205 struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */ 206 struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */ 207 uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */ 208 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 209 }; 210 #else /* RXDMA_OPTIMIZATION */ 211 struct rx_mon_pkt_tlvs { 212 struct rx_attention_tlv attn_tlv; 213 struct rx_mpdu_start_tlv mpdu_start_tlv; 214 struct rx_msdu_start_tlv msdu_start_tlv; 215 struct rx_msdu_end_tlv msdu_end_tlv; 216 struct rx_mpdu_end_tlv mpdu_end_tlv; 217 struct rx_pkt_hdr_tlv pkt_hdr_tlv; 218 }; 219 #endif 220 221 #define SIZE_OF_MONITOR_TLV sizeof(struct rx_mon_pkt_tlvs) 222 #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs) 223 224 #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV 225 226 #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field) 227 228 #define HAL_RX_PKT_TLV_MPDU_START_OFFSET(hal_soc) \ 229 RX_PKT_TLV_OFFSET(mpdu_start_tlv) 230 #define HAL_RX_PKT_TLV_MPDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(mpdu_end_tlv) 231 #define HAL_RX_PKT_TLV_MSDU_START_OFFSET(hal_soc) \ 232 RX_PKT_TLV_OFFSET(msdu_start_tlv) 233 #define HAL_RX_PKT_TLV_MSDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(msdu_end_tlv) 234 #define HAL_RX_PKT_TLV_ATTN_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(attn_tlv) 235 #define HAL_RX_PKT_TLV_PKT_HDR_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(pkt_hdr_tlv) 236 237 /** 238 * hal_rx_get_pkt_tlvs(): Function to retrieve pkt tlvs from nbuf 239 * 240 * @rx_buf_start: Pointer to data buffer field 241 * 242 * Returns: pointer to rx_pkt_tlvs 243 */ 244 static inline 245 struct rx_pkt_tlvs *hal_rx_get_pkt_tlvs(uint8_t *rx_buf_start) 246 { 247 return (struct rx_pkt_tlvs *)rx_buf_start; 248 } 249 250 /** 251 * hal_rx_get_mpdu_info(): Function to retrieve mpdu info from pkt tlvs 252 * 253 * @pkt_tlvs: Pointer to pkt_tlvs 254 * Returns: pointer to rx_mpdu_info structure 255 */ 256 static inline 257 struct rx_mpdu_info *hal_rx_get_mpdu_info(struct rx_pkt_tlvs *pkt_tlvs) 258 { 259 return &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details; 260 } 261 262 /** 263 * hal_rx_mon_dest_get_buffer_info_from_tlv(): Retrieve mon dest frame info 264 * from the reserved bytes of rx_tlv_hdr. 265 * @buf: start of rx_tlv_hdr 266 * @buf_info: hal_rx_mon_dest_buf_info structure 267 * 268 * Return: void 269 */ 270 static inline void hal_rx_mon_dest_get_buffer_info_from_tlv( 271 uint8_t *buf, 272 struct hal_rx_mon_dest_buf_info *buf_info) 273 { 274 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 275 276 qdf_mem_copy(buf_info, pkt_tlvs->rx_padding0, 277 sizeof(struct hal_rx_mon_dest_buf_info)); 278 } 279 280 /* 281 * Get msdu_done bit from the RX_ATTENTION TLV 282 */ 283 #define HAL_RX_ATTN_MSDU_DONE_GET(_rx_attn) \ 284 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ 285 RX_ATTENTION_2_MSDU_DONE_OFFSET)), \ 286 RX_ATTENTION_2_MSDU_DONE_MASK, \ 287 RX_ATTENTION_2_MSDU_DONE_LSB)) 288 289 #define HAL_RX_ATTN_FIRST_MPDU_GET(_rx_attn) \ 290 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ 291 RX_ATTENTION_1_FIRST_MPDU_OFFSET)), \ 292 RX_ATTENTION_1_FIRST_MPDU_MASK, \ 293 RX_ATTENTION_1_FIRST_MPDU_LSB)) 294 295 #define HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(_rx_attn) \ 296 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ 297 RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET)), \ 298 RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK, \ 299 RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB)) 300 301 /* 302 * hal_rx_attn_tcp_udp_cksum_fail_get(): get tcp_udp cksum fail bit 303 * from rx attention 304 * @buf: pointer to rx_pkt_tlvs 305 * 306 * Return: tcp_udp_cksum_fail 307 */ 308 static inline bool 309 hal_rx_attn_tcp_udp_cksum_fail_get(uint8_t *buf) 310 { 311 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 312 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; 313 uint8_t tcp_udp_cksum_fail; 314 315 tcp_udp_cksum_fail = HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(rx_attn); 316 317 return !!tcp_udp_cksum_fail; 318 } 319 320 #define HAL_RX_ATTN_IP_CKSUM_FAIL_GET(_rx_attn) \ 321 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ 322 RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET)), \ 323 RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK, \ 324 RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB)) 325 326 /* 327 * hal_rx_attn_ip_cksum_fail_get(): get ip cksum fail bit 328 * from rx attention 329 * @buf: pointer to rx_pkt_tlvs 330 * 331 * Return: ip_cksum_fail 332 */ 333 static inline bool 334 hal_rx_attn_ip_cksum_fail_get(uint8_t *buf) 335 { 336 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 337 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; 338 uint8_t ip_cksum_fail; 339 340 ip_cksum_fail = HAL_RX_ATTN_IP_CKSUM_FAIL_GET(rx_attn); 341 342 return !!ip_cksum_fail; 343 } 344 345 #define HAL_RX_ATTN_PHY_PPDU_ID_GET(_rx_attn) \ 346 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ 347 RX_ATTENTION_0_PHY_PPDU_ID_OFFSET)), \ 348 RX_ATTENTION_0_PHY_PPDU_ID_MASK, \ 349 RX_ATTENTION_0_PHY_PPDU_ID_LSB)) 350 351 #define HAL_RX_ATTN_CCE_MATCH_GET(_rx_attn) \ 352 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ 353 RX_ATTENTION_1_CCE_MATCH_OFFSET)), \ 354 RX_ATTENTION_1_CCE_MATCH_MASK, \ 355 RX_ATTENTION_1_CCE_MATCH_LSB)) 356 357 /* 358 * hal_rx_msdu_cce_match_get_rh(): get CCE match bit 359 * from rx attention 360 * @buf: pointer to rx_pkt_tlvs 361 * Return: CCE match value 362 */ 363 static inline bool 364 hal_rx_msdu_cce_match_get_rh(uint8_t *buf) 365 { 366 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 367 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; 368 uint8_t cce_match_val; 369 370 cce_match_val = HAL_RX_ATTN_CCE_MATCH_GET(rx_attn); 371 return !!cce_match_val; 372 } 373 374 /* 375 * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START 376 */ 377 #define HAL_RX_MPDU_PEER_META_DATA_GET(_rx_mpdu_info) \ 378 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ 379 RX_MPDU_INFO_8_PEER_META_DATA_OFFSET)), \ 380 RX_MPDU_INFO_8_PEER_META_DATA_MASK, \ 381 RX_MPDU_INFO_8_PEER_META_DATA_LSB)) 382 383 static inline uint32_t 384 hal_rx_mpdu_peer_meta_data_get_rh(uint8_t *buf) 385 { 386 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 387 struct rx_mpdu_start *mpdu_start = 388 &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; 389 390 struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; 391 uint32_t peer_meta_data; 392 393 peer_meta_data = HAL_RX_MPDU_PEER_META_DATA_GET(mpdu_info); 394 395 return peer_meta_data; 396 } 397 398 #define HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(_rx_mpdu_info) \ 399 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ 400 RX_MPDU_INFO_12_AMPDU_FLAG_OFFSET)), \ 401 RX_MPDU_INFO_12_AMPDU_FLAG_MASK, \ 402 RX_MPDU_INFO_12_AMPDU_FLAG_LSB)) 403 404 /* 405 * LRO information needed from the TLVs 406 */ 407 #define HAL_RX_TLV_GET_LRO_ELIGIBLE(buf) \ 408 (_HAL_MS( \ 409 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 410 msdu_end_tlv.rx_msdu_end), \ 411 RX_MSDU_END_9_LRO_ELIGIBLE_OFFSET)), \ 412 RX_MSDU_END_9_LRO_ELIGIBLE_MASK, \ 413 RX_MSDU_END_9_LRO_ELIGIBLE_LSB)) 414 415 #define HAL_RX_TLV_GET_TCP_ACK(buf) \ 416 (_HAL_MS( \ 417 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 418 msdu_end_tlv.rx_msdu_end), \ 419 RX_MSDU_END_8_TCP_ACK_NUMBER_OFFSET)), \ 420 RX_MSDU_END_8_TCP_ACK_NUMBER_MASK, \ 421 RX_MSDU_END_8_TCP_ACK_NUMBER_LSB)) 422 423 #define HAL_RX_TLV_GET_TCP_SEQ(buf) \ 424 (_HAL_MS( \ 425 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 426 msdu_end_tlv.rx_msdu_end), \ 427 RX_MSDU_END_7_TCP_SEQ_NUMBER_OFFSET)), \ 428 RX_MSDU_END_7_TCP_SEQ_NUMBER_MASK, \ 429 RX_MSDU_END_7_TCP_SEQ_NUMBER_LSB)) 430 431 #define HAL_RX_TLV_GET_TCP_WIN(buf) \ 432 (_HAL_MS( \ 433 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 434 msdu_end_tlv.rx_msdu_end), \ 435 RX_MSDU_END_9_WINDOW_SIZE_OFFSET)), \ 436 RX_MSDU_END_9_WINDOW_SIZE_MASK, \ 437 RX_MSDU_END_9_WINDOW_SIZE_LSB)) 438 439 #define HAL_RX_TLV_GET_TCP_PURE_ACK(buf) \ 440 (_HAL_MS( \ 441 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 442 msdu_start_tlv.rx_msdu_start), \ 443 RX_MSDU_START_2_TCP_ONLY_ACK_OFFSET)), \ 444 RX_MSDU_START_2_TCP_ONLY_ACK_MASK, \ 445 RX_MSDU_START_2_TCP_ONLY_ACK_LSB)) 446 447 #define HAL_RX_TLV_GET_TCP_PROTO(buf) \ 448 (_HAL_MS( \ 449 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 450 msdu_start_tlv.rx_msdu_start), \ 451 RX_MSDU_START_2_TCP_PROTO_OFFSET)), \ 452 RX_MSDU_START_2_TCP_PROTO_MASK, \ 453 RX_MSDU_START_2_TCP_PROTO_LSB)) 454 455 #define HAL_RX_TLV_GET_UDP_PROTO(buf) \ 456 (_HAL_MS( \ 457 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 458 msdu_start_tlv.rx_msdu_start), \ 459 RX_MSDU_START_2_UDP_PROTO_OFFSET)), \ 460 RX_MSDU_START_2_UDP_PROTO_MASK, \ 461 RX_MSDU_START_2_UDP_PROTO_LSB)) 462 463 #define HAL_RX_TLV_GET_IPV6(buf) \ 464 (_HAL_MS( \ 465 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 466 msdu_start_tlv.rx_msdu_start), \ 467 RX_MSDU_START_2_IPV6_PROTO_OFFSET)), \ 468 RX_MSDU_START_2_IPV6_PROTO_MASK, \ 469 RX_MSDU_START_2_IPV6_PROTO_LSB)) 470 471 #define HAL_RX_TLV_GET_IP_OFFSET(buf) \ 472 (_HAL_MS( \ 473 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 474 msdu_start_tlv.rx_msdu_start), \ 475 RX_MSDU_START_1_L3_OFFSET_OFFSET)), \ 476 RX_MSDU_START_1_L3_OFFSET_MASK, \ 477 RX_MSDU_START_1_L3_OFFSET_LSB)) 478 479 #define HAL_RX_TLV_GET_TCP_OFFSET(buf) \ 480 (_HAL_MS( \ 481 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 482 msdu_start_tlv.rx_msdu_start), \ 483 RX_MSDU_START_1_L4_OFFSET_OFFSET)), \ 484 RX_MSDU_START_1_L4_OFFSET_MASK, \ 485 RX_MSDU_START_1_L4_OFFSET_LSB)) 486 487 #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(buf) \ 488 (_HAL_MS( \ 489 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ 490 msdu_start_tlv.rx_msdu_start), \ 491 RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)), \ 492 RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK, \ 493 RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB)) 494 495 #define HAL_RX_MSDU_START_MSDU_LEN_GET(_rx_msdu_start) \ 496 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \ 497 RX_MSDU_START_1_MSDU_LENGTH_OFFSET)), \ 498 RX_MSDU_START_1_MSDU_LENGTH_MASK, \ 499 RX_MSDU_START_1_MSDU_LENGTH_LSB)) 500 501 #define HAL_RX_MSDU_START_BW_GET(_rx_msdu_start) \ 502 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ 503 RX_MSDU_START_5_RECEIVE_BANDWIDTH_OFFSET)), \ 504 RX_MSDU_START_5_RECEIVE_BANDWIDTH_MASK, \ 505 RX_MSDU_START_5_RECEIVE_BANDWIDTH_LSB)) 506 507 #define HAL_RX_MSDU_START_SGI_GET(_rx_msdu_start) \ 508 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ 509 RX_MSDU_START_5_SGI_OFFSET)), \ 510 RX_MSDU_START_5_SGI_MASK, \ 511 RX_MSDU_START_5_SGI_LSB)) 512 513 #define HAL_RX_MSDU_START_RATE_MCS_GET(_rx_msdu_start) \ 514 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ 515 RX_MSDU_START_5_RATE_MCS_OFFSET)), \ 516 RX_MSDU_START_5_RATE_MCS_MASK, \ 517 RX_MSDU_START_5_RATE_MCS_LSB)) 518 519 #define HAL_RX_ATTN_DECRYPT_STATUS_GET(_rx_attn) \ 520 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ 521 RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET)), \ 522 RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK, \ 523 RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB)) 524 525 /* 526 * Get key index from RX_MSDU_END 527 */ 528 #define HAL_RX_MSDU_END_KEYID_OCTET_GET(_rx_msdu_end) \ 529 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ 530 RX_MSDU_END_2_KEY_ID_OCTET_OFFSET)), \ 531 RX_MSDU_END_2_KEY_ID_OCTET_MASK, \ 532 RX_MSDU_END_2_KEY_ID_OCTET_LSB)) 533 534 #define HAL_RX_MSDU_START_RSSI_GET(_rx_msdu_start) \ 535 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \ 536 RX_MSDU_START_5_USER_RSSI_OFFSET)), \ 537 RX_MSDU_START_5_USER_RSSI_MASK, \ 538 RX_MSDU_START_5_USER_RSSI_LSB)) 539 540 #define HAL_RX_MSDU_START_FREQ_GET(_rx_msdu_start) \ 541 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \ 542 RX_MSDU_START_7_SW_PHY_META_DATA_OFFSET)), \ 543 RX_MSDU_START_7_SW_PHY_META_DATA_MASK, \ 544 RX_MSDU_START_7_SW_PHY_META_DATA_LSB)) 545 546 #define HAL_RX_MSDU_START_PKT_TYPE_GET(_rx_msdu_start) \ 547 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \ 548 RX_MSDU_START_5_PKT_TYPE_OFFSET)), \ 549 RX_MSDU_START_5_PKT_TYPE_MASK, \ 550 RX_MSDU_START_5_PKT_TYPE_LSB)) 551 552 #define HAL_RX_MPDU_AD4_31_0_GET(_rx_mpdu_info) \ 553 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ 554 RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_OFFSET)), \ 555 RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_MASK, \ 556 RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_LSB)) 557 558 #define HAL_RX_MPDU_AD4_47_32_GET(_rx_mpdu_info) \ 559 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ 560 RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \ 561 RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \ 562 RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB)) 563 564 /******************************************************************************* 565 * RX ERROR APIS 566 ******************************************************************************/ 567 568 #define HAL_RX_MPDU_END_DECRYPT_ERR_GET(_rx_mpdu_end) \ 569 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\ 570 RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_OFFSET)), \ 571 RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_MASK, \ 572 RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_LSB)) 573 574 #define HAL_RX_MPDU_END_MIC_ERR_GET(_rx_mpdu_end) \ 575 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\ 576 RX_MPDU_END_1_TKIP_MIC_ERR_OFFSET)), \ 577 RX_MPDU_END_1_TKIP_MIC_ERR_MASK, \ 578 RX_MPDU_END_1_TKIP_MIC_ERR_LSB)) 579 580 #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_mpdu_info) \ 581 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ 582 RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_OFFSET)), \ 583 RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_MASK, \ 584 RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_LSB)) 585 586 /** 587 * hal_rx_attn_msdu_done_get_rh() - Get msdi done flag from RX TLV 588 * @buf: RX tlv address 589 * 590 * Return: msdu done flag 591 */ 592 static inline uint32_t hal_rx_attn_msdu_done_get_rh(uint8_t *buf) 593 { 594 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 595 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; 596 uint32_t msdu_done; 597 598 msdu_done = HAL_RX_ATTN_MSDU_DONE_GET(rx_attn); 599 600 return msdu_done; 601 } 602 603 #define HAL_RX_MSDU_FLAGS_GET(msdu_info_ptr) \ 604 (HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \ 605 HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \ 606 HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) | \ 607 HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) | \ 608 HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) | \ 609 HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) | \ 610 HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) | \ 611 HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr)) 612 613 /** 614 * hal_rx_msdu_flags_get_rh() - Get msdu flags from ring desc 615 * @msdu_desc_info_hdl: msdu desc info handle 616 * 617 * Return: msdu flags 618 */ 619 static inline 620 uint32_t hal_rx_msdu_flags_get_rh(rx_msdu_desc_info_t msdu_desc_info_hdl) 621 { 622 struct rx_msdu_desc_info *msdu_desc_info = 623 (struct rx_msdu_desc_info *)msdu_desc_info_hdl; 624 625 return HAL_RX_MSDU_FLAGS_GET(msdu_desc_info); 626 } 627 628 #define HAL_RX_ATTN_MSDU_LEN_ERR_GET(_rx_attn) \ 629 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ 630 RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET)), \ 631 RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK, \ 632 RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB)) 633 634 /** 635 * hal_rx_attn_msdu_len_err_get_rh(): Get msdu_len_err value from 636 * rx attention tlvs 637 * @buf: pointer to rx pkt tlvs hdr 638 * 639 * Return: msdu_len_err value 640 */ 641 static inline uint32_t 642 hal_rx_attn_msdu_len_err_get_rh(uint8_t *buf) 643 { 644 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 645 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; 646 647 return HAL_RX_ATTN_MSDU_LEN_ERR_GET(rx_attn); 648 } 649 #endif /* _HAL_RH_RX_H_ */ 650