xref: /wlan-dirver/qca-wifi-host-cmn/hal/wifi3.0/qcn9224/hal_9224_tx.h (revision 2f4b444fb7e689b83a4ab0e7b3b38f0bf4def8e0)
1 /*
2  * Copyright (c) 2021 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 #include "tcl_data_cmd.h"
19 #include "phyrx_rssi_legacy.h"
20 #include "hal_internal.h"
21 #include "qdf_trace.h"
22 #include "hal_rx.h"
23 #include "hal_tx.h"
24 #include "hal_api_mon.h"
25 
26 #define DSCP_TID_TABLE_SIZE 24
27 #define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4)
28 
29 /**
30  * hal_tx_set_dscp_tid_map_9224() - Configure default DSCP to TID map table
31  * @soc: HAL SoC context
32  * @map: DSCP-TID mapping table
33  * @id: mapping table ID - 0-31
34  *
35  * DSCP are mapped to 8 TID values using TID values programmed
36  * in any of the 32 DSCP_TID_MAPS (id = 0-31).
37  *
38  * Return: none
39  */
40 static void hal_tx_set_dscp_tid_map_9224(struct hal_soc *hal_soc, uint8_t *map,
41 					 uint8_t id)
42 {
43 	int i;
44 	uint32_t addr, cmn_reg_addr;
45 	uint32_t value = 0, regval;
46 	uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
47 
48 	struct hal_soc *soc = (struct hal_soc *)hal_soc;
49 
50 	if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX)
51 		return;
52 
53 	cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(
54 					MAC_TCL_REG_REG_BASE);
55 
56 	addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
57 				MAC_TCL_REG_REG_BASE,
58 				id * NUM_WORDS_PER_DSCP_TID_TABLE);
59 
60 	/* Enable read/write access */
61 	regval = HAL_REG_READ(soc, cmn_reg_addr);
62 	regval |=
63 	    (1 <<
64 	    HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT);
65 
66 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);
67 
68 	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
69 	for (i = 0; i < 64; i += 8) {
70 		value = (map[i] |
71 			(map[i + 1] << 0x3) |
72 			(map[i + 2] << 0x6) |
73 			(map[i + 3] << 0x9) |
74 			(map[i + 4] << 0xc) |
75 			(map[i + 5] << 0xf) |
76 			(map[i + 6] << 0x12) |
77 			(map[i + 7] << 0x15));
78 
79 		qdf_mem_copy(&val[cnt], (void *)&value, 3);
80 		cnt += 3;
81 	}
82 
83 	for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) {
84 		regval = *(uint32_t *)(val + i);
85 		HAL_REG_WRITE(soc, addr,
86 			      (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
87 		addr += 4;
88 	}
89 
90 	/* Diasble read/write access */
91 	regval = HAL_REG_READ(soc, cmn_reg_addr);
92 	regval &=
93 	~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK);
94 
95 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);
96 }
97 
98 /**
99  * hal_tx_update_dscp_tid_9224() - Update the dscp tid map table as updated
100  *					by the user
101  * @soc: HAL SoC context
102  * @map: DSCP-TID mapping table
103  * @id : MAP ID
104  * @dscp: DSCP_TID map index
105  *
106  * Return: void
107  */
108 static void hal_tx_update_dscp_tid_9224(struct hal_soc *hal_soc, uint8_t tid,
109 					uint8_t id, uint8_t dscp)
110 {
111 	int index;
112 	uint32_t addr;
113 	uint32_t value;
114 	uint32_t regval;
115 	struct hal_soc *soc = (struct hal_soc *)hal_soc;
116 
117 	addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
118 			MAC_TCL_REG_REG_BASE, id);
119 
120 	index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER;
121 	addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER);
122 	value = tid << (HAL_TX_BITS_PER_TID * index);
123 
124 	regval = HAL_REG_READ(soc, addr);
125 	regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
126 	regval |= value;
127 
128 	HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
129 }
130 
131 /**
132  * hal_tx_init_cmd_credit_ring_9224() - Initialize command/credit SRNG
133  * @hal_soc_hdl: Handle to HAL SoC structure
134  * @hal_srng: Handle to HAL SRNG structure
135  *
136  * Return: none
137  */
138 static inline void
139 hal_tx_init_cmd_credit_ring_9224(hal_soc_handle_t hal_soc_hdl,
140 				 hal_ring_handle_t hal_ring_hdl)
141 {
142 }
143