1 /* 2 * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 #include "hal_hw_headers.h" 19 #include "hal_internal.h" 20 #include "cdp_txrx_mon_struct.h" 21 #include "qdf_trace.h" 22 #include "hal_rx.h" 23 #include "hal_tx.h" 24 #include "dp_types.h" 25 #include "hal_api_mon.h" 26 27 /** 28 * hal_tx_desc_set_dscp_tid_table_id_8074v2() - Sets DSCP to TID conversion 29 * table ID 30 * @desc: Handle to Tx Descriptor 31 * @id: DSCP to tid conversion table to be used for this frame 32 * 33 * Return: void 34 */ 35 36 static void hal_tx_desc_set_dscp_tid_table_id_8074v2(void *desc, uint8_t id) 37 { 38 HAL_SET_FLD(desc, TCL_DATA_CMD_5, 39 DSCP_TID_TABLE_NUM) |= 40 HAL_TX_SM(TCL_DATA_CMD_5, 41 DSCP_TID_TABLE_NUM, id); 42 } 43 44 45 #define DSCP_TID_TABLE_SIZE 24 46 #define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4) 47 /** 48 * hal_tx_set_dscp_tid_map_8074v2() - Configure default DSCP to TID map table 49 * @soc: HAL SoC context 50 * @map: DSCP-TID mapping table 51 * @id: mapping table ID - 0,1 52 * 53 * DSCP are mapped to 8 TID values using TID values programmed 54 * in two set of mapping registers DSCP_TID1_MAP_<0 to 6> (id = 0) 55 * and DSCP_TID2_MAP_<0 to 6> (id = 1) 56 * Each mapping register has TID mapping for 10 DSCP values 57 * 58 * Return: none 59 */ 60 61 static void hal_tx_set_dscp_tid_map_8074v2(void *hal_soc, uint8_t *map, 62 uint8_t id) 63 { 64 int i; 65 uint32_t addr, cmn_reg_addr; 66 uint32_t value = 0, regval; 67 uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0; 68 69 struct hal_soc *soc = (struct hal_soc *)hal_soc; 70 71 if (id >= HAL_MAX_HW_DSCP_TID_V2_MAPS) 72 return; 73 74 cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR( 75 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET); 76 77 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR( 78 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, 79 id * NUM_WORDS_PER_DSCP_TID_TABLE); 80 81 /* Enable read/write access */ 82 regval = HAL_REG_READ(soc, cmn_reg_addr); 83 regval |= 84 (1 << HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT); 85 86 HAL_REG_WRITE(soc, cmn_reg_addr, regval); 87 88 /* Write 8 (24 bits) DSCP-TID mappings in each interation */ 89 for (i = 0; i < 64; i += 8) { 90 value = (map[i] | 91 (map[i + 1] << 0x3) | 92 (map[i + 2] << 0x6) | 93 (map[i + 3] << 0x9) | 94 (map[i + 4] << 0xc) | 95 (map[i + 5] << 0xf) | 96 (map[i + 6] << 0x12) | 97 (map[i + 7] << 0x15)); 98 99 qdf_mem_copy(&val[cnt], (void *)&value, 3); 100 cnt += 3; 101 } 102 103 for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) { 104 regval = *(uint32_t *)(val + i); 105 HAL_REG_WRITE(soc, addr, 106 (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK)); 107 addr += 4; 108 } 109 110 /* Diasble read/write access */ 111 regval = HAL_REG_READ(soc, cmn_reg_addr); 112 regval &= 113 ~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK); 114 115 HAL_REG_WRITE(soc, cmn_reg_addr, regval); 116 } 117 118 /** 119 * hal_tx_update_dscp_tid_8074v2() - Update the dscp tid map table as 120 updated by user 121 * @soc: HAL SoC context 122 * @map: DSCP-TID mapping table 123 * @id : MAP ID 124 * @dscp: DSCP_TID map index 125 * 126 * Return: void 127 */ 128 129 static void hal_tx_update_dscp_tid_8074v2(void *hal_soc, uint8_t tid, 130 uint8_t id, uint8_t dscp) 131 { 132 int index; 133 uint32_t addr; 134 uint32_t value; 135 uint32_t regval; 136 struct hal_soc *soc = (struct hal_soc *)hal_soc; 137 138 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR( 139 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id); 140 141 index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER; 142 addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER); 143 value = tid << (HAL_TX_BITS_PER_TID * index); 144 145 regval = HAL_REG_READ(soc, addr); 146 regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index)); 147 regval |= value; 148 149 HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK)); 150 } 151 /** 152 * hal_tx_desc_set_lmac_id - Set the lmac_id value 153 * @desc: Handle to Tx Descriptor 154 * @lmac_id: mac Id to ast matching 155 * b00 – mac 0 156 * b01 – mac 1 157 * b10 – mac 2 158 * b11 – all macs (legacy HK way) 159 * 160 * Return: void 161 */ 162 static void hal_tx_desc_set_lmac_id_8074v2(void *desc, uint8_t lmac_id) 163 { 164 HAL_SET_FLD(desc, TCL_DATA_CMD_4, LMAC_ID) |= 165 HAL_TX_SM(TCL_DATA_CMD_4, LMAC_ID, lmac_id); 166 } 167 168