1 /* 2 * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include "tcl_data_cmd.h" 21 #include "mac_tcl_reg_seq_hwioreg.h" 22 #include "phyrx_rssi_legacy.h" 23 #include "hal_hw_headers.h" 24 #include "hal_internal.h" 25 #include "cdp_txrx_mon_struct.h" 26 #include "qdf_trace.h" 27 #include "hal_rx.h" 28 #include "hal_tx.h" 29 #include "dp_types.h" 30 #include "hal_api_mon.h" 31 32 /** 33 * hal_tx_desc_set_dscp_tid_table_id_6290() - Sets DSCP to TID conversion 34 * table ID 35 * @desc: Handle to Tx Descriptor 36 * @id: DSCP to tid conversion table to be used for this frame 37 * 38 * Return: void 39 */ 40 #if defined(QCA_WIFI_QCA6290_11AX) 41 static void hal_tx_desc_set_dscp_tid_table_id_6290(void *desc, 42 uint8_t id) 43 { 44 HAL_SET_FLD(desc, TCL_DATA_CMD_5, 45 DSCP_TID_TABLE_NUM) |= 46 HAL_TX_SM(TCL_DATA_CMD_5, 47 DSCP_TID_TABLE_NUM, id); 48 } 49 #else 50 static void hal_tx_desc_set_dscp_tid_table_id_6290(void *desc, 51 uint8_t id) 52 { 53 HAL_SET_FLD(desc, TCL_DATA_CMD_3, 54 DSCP_TO_TID_PRIORITY_TABLE_ID) |= 55 HAL_TX_SM(TCL_DATA_CMD_3, 56 DSCP_TO_TID_PRIORITY_TABLE_ID, id); 57 } 58 #endif 59 60 61 #define DSCP_TID_TABLE_SIZE 24 62 #define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4) 63 64 #if defined(QCA_WIFI_QCA6290_11AX) 65 /** 66 * hal_tx_set_dscp_tid_map_6290() - Configure default DSCP to TID map table 67 * @soc: HAL SoC context 68 * @map: DSCP-TID mapping table 69 * @id: mapping table ID - 0-31 70 * 71 * DSCP are mapped to 8 TID values using TID values programmed 72 * in any of the 32 DSCP_TID_MAPS (id = 0-31). 73 * 74 * Return: none 75 */ 76 static void hal_tx_set_dscp_tid_map_6290(struct hal_soc *soc, 77 uint8_t *map, 78 uint8_t id) 79 { 80 int i; 81 uint32_t addr, cmn_reg_addr; 82 uint32_t value = 0, regval; 83 uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0; 84 85 if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX) 86 return; 87 88 cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR( 89 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET); 90 91 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR( 92 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, 93 id * NUM_WORDS_PER_DSCP_TID_TABLE); 94 95 /* Enable read/write access */ 96 regval = HAL_REG_READ(soc, cmn_reg_addr); 97 regval |= 98 (1 << HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT); 99 100 HAL_REG_WRITE(soc, cmn_reg_addr, regval); 101 102 /* Write 8 (24 bits) DSCP-TID mappings in each iteration */ 103 for (i = 0; i < 64; i += 8) { 104 value = (map[i] | 105 (map[i + 1] << 0x3) | 106 (map[i + 2] << 0x6) | 107 (map[i + 3] << 0x9) | 108 (map[i + 4] << 0xc) | 109 (map[i + 5] << 0xf) | 110 (map[i + 6] << 0x12) | 111 (map[i + 7] << 0x15)); 112 113 qdf_mem_copy(&val[cnt], &value, 3); 114 cnt += 3; 115 } 116 117 for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) { 118 regval = *(uint32_t *)(val + i); 119 HAL_REG_WRITE(soc, addr, 120 (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK)); 121 addr += 4; 122 } 123 124 /* Diasble read/write access */ 125 regval = HAL_REG_READ(soc, cmn_reg_addr); 126 regval &= 127 ~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK); 128 129 HAL_REG_WRITE(soc, cmn_reg_addr, regval); 130 } 131 #else 132 static void hal_tx_set_dscp_tid_map_6290(struct hal_soc *soc, 133 uint8_t *map, 134 uint8_t id) 135 { 136 int i; 137 uint32_t addr; 138 uint32_t value; 139 140 if (id == HAL_TX_DSCP_TID_MAP_TABLE_DEFAULT) { 141 addr = 142 HWIO_TCL_R0_DSCP_TID1_MAP_0_ADDR( 143 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET); 144 } else { 145 addr = 146 HWIO_TCL_R0_DSCP_TID2_MAP_0_ADDR( 147 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET); 148 } 149 150 for (i = 0; i < 64; i += 10) { 151 value = (map[i] | 152 (map[i+1] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_1_SHFT) | 153 (map[i+2] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_2_SHFT) | 154 (map[i+3] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_3_SHFT) | 155 (map[i+4] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_4_SHFT) | 156 (map[i+5] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_5_SHFT) | 157 (map[i+6] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_6_SHFT) | 158 (map[i+7] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_7_SHFT) | 159 (map[i+8] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_8_SHFT) | 160 (map[i+9] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_9_SHFT)); 161 162 HAL_REG_WRITE(soc, addr, 163 (value & HWIO_TCL_R0_DSCP_TID1_MAP_1_RMSK)); 164 165 addr += 4; 166 } 167 } 168 #endif 169 170 #ifdef QCA_WIFI_QCA6290_11AX 171 /** 172 * hal_tx_update_dscp_tid_6290() - Update the dscp tid map table as updated 173 * by the user 174 * @soc: HAL SoC context 175 * @map: DSCP-TID mapping table 176 * @id : MAP ID 177 * @dscp: DSCP_TID map index 178 * 179 * Return: void 180 */ 181 static void hal_tx_update_dscp_tid_6290(struct hal_soc *soc, uint8_t tid, 182 uint8_t id, uint8_t dscp) 183 { 184 int index; 185 uint32_t addr; 186 uint32_t value; 187 uint32_t regval; 188 189 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR( 190 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id); 191 192 index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER; 193 addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER); 194 value = tid << (HAL_TX_BITS_PER_TID * index); 195 196 regval = HAL_REG_READ(soc, addr); 197 regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index)); 198 regval |= value; 199 200 HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK)); 201 } 202 #else 203 static void hal_tx_update_dscp_tid_6290(struct hal_soc *soc, uint8_t tid, 204 uint8_t id, uint8_t dscp) 205 { 206 int index; 207 uint32_t addr; 208 uint32_t value; 209 uint32_t regval; 210 211 if (id == HAL_TX_DSCP_TID_MAP_TABLE_DEFAULT) 212 addr = 213 HWIO_TCL_R0_DSCP_TID1_MAP_0_ADDR( 214 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET); 215 else 216 addr = 217 HWIO_TCL_R0_DSCP_TID2_MAP_0_ADDR( 218 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET); 219 220 index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER; 221 addr += 4 * (dscp/HAL_TX_NUM_DSCP_PER_REGISTER); 222 value = tid << (HAL_TX_BITS_PER_TID * index); 223 224 /* Read back previous DSCP TID config and update 225 * with new config. 226 */ 227 regval = HAL_REG_READ(soc, addr); 228 regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index)); 229 regval |= value; 230 231 HAL_REG_WRITE(soc, addr, 232 (regval & HWIO_TCL_R0_DSCP_TID1_MAP_1_RMSK)); 233 } 234 #endif 235 236 #ifdef QCA_WIFI_QCA6290_11AX 237 /** 238 * hal_tx_desc_set_lmac_id - Set the lmac_id value 239 * @desc: Handle to Tx Descriptor 240 * @lmac_id: mac Id to ast matching 241 * b00 – mac 0 242 * b01 – mac 1 243 * b10 – mac 2 244 * b11 – all macs (legacy HK way) 245 * 246 * Return: void 247 */ 248 static void hal_tx_desc_set_lmac_id_6290(void *desc, uint8_t lmac_id) 249 { 250 HAL_SET_FLD(desc, TCL_DATA_CMD_4, LMAC_ID) |= 251 HAL_TX_SM(TCL_DATA_CMD_4, LMAC_ID, lmac_id); 252 } 253 #else 254 static void hal_tx_desc_set_lmac_id_6290(void *desc, uint8_t lmac_id) 255 { 256 } 257 #endif 258 259 /** 260 * hal_tx_init_cmd_credit_ring_6290() - Initialize command/credit SRNG 261 * @hal_soc_hdl: Handle to HAL SoC structure 262 * @hal_srng: Handle to HAL SRNG structure 263 * 264 * Return: none 265 */ 266 static inline void hal_tx_init_cmd_credit_ring_6290(hal_soc_handle_t hal_soc_hdl, 267 hal_ring_handle_t hal_ring_hdl) 268 { 269 } 270