1 /* 2 * Copyright (c) 2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 #include "tcl_data_cmd.h" 20 //#include "mac_tcl_reg_seq_hwioreg.h" 21 #include "phyrx_rssi_legacy.h" 22 #include "hal_be_hw_headers.h" 23 #include "hal_internal.h" 24 #include "cdp_txrx_mon_struct.h" 25 #include "qdf_trace.h" 26 #include "hal_rx.h" 27 #include "hal_tx.h" 28 #include "dp_types.h" 29 #include "hal_api_mon.h" 30 31 #define DSCP_TID_TABLE_SIZE 24 32 #define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4) 33 34 /** 35 * hal_tx_set_dscp_tid_map_kiwi() - Configure default DSCP to TID map table 36 * @hal_soc: HAL SoC context 37 * @map: DSCP-TID mapping table 38 * @id: mapping table ID - 0-31 39 * 40 * DSCP are mapped to 8 TID values using TID values programmed 41 * in any of the 32 DSCP_TID_MAPS (id = 0-31). 42 * 43 * Return: none 44 */ 45 static void hal_tx_set_dscp_tid_map_kiwi(struct hal_soc *hal_soc, uint8_t *map, 46 uint8_t id) 47 { 48 int i; 49 uint32_t addr, cmn_reg_addr; 50 uint32_t value = 0, regval; 51 uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0; 52 53 struct hal_soc *soc = (struct hal_soc *)hal_soc; 54 55 if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX) 56 return; 57 58 cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR( 59 MAC_TCL_REG_REG_BASE); 60 61 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR( 62 MAC_TCL_REG_REG_BASE, 63 id * NUM_WORDS_PER_DSCP_TID_TABLE); 64 65 /* Enable read/write access */ 66 regval = HAL_REG_READ(soc, cmn_reg_addr); 67 regval |= 68 (1 << 69 HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT); 70 71 HAL_REG_WRITE(soc, cmn_reg_addr, regval); 72 73 /* Write 8 (24 bits) DSCP-TID mappings in each iteration */ 74 for (i = 0; i < 64; i += 8) { 75 value = (map[i] | 76 (map[i + 1] << 0x3) | 77 (map[i + 2] << 0x6) | 78 (map[i + 3] << 0x9) | 79 (map[i + 4] << 0xc) | 80 (map[i + 5] << 0xf) | 81 (map[i + 6] << 0x12) | 82 (map[i + 7] << 0x15)); 83 84 qdf_mem_copy(&val[cnt], (void *)&value, 3); 85 cnt += 3; 86 } 87 88 for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) { 89 regval = *(uint32_t *)(val + i); 90 HAL_REG_WRITE(soc, addr, 91 (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK)); 92 addr += 4; 93 } 94 95 /* Diasble read/write access */ 96 regval = HAL_REG_READ(soc, cmn_reg_addr); 97 regval &= 98 ~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK); 99 100 HAL_REG_WRITE(soc, cmn_reg_addr, regval); 101 } 102 103 /** 104 * hal_tx_update_dscp_tid_kiwi() - Update the dscp tid map table as updated 105 * by the user 106 * @hal_soc: HAL SoC context 107 * @tid: TID 108 * @id : MAP ID 109 * @dscp: DSCP_TID map index 110 * 111 * Return: void 112 */ 113 static void hal_tx_update_dscp_tid_kiwi(struct hal_soc *hal_soc, uint8_t tid, 114 uint8_t id, uint8_t dscp) 115 { 116 int index; 117 uint32_t addr; 118 uint32_t value; 119 uint32_t regval; 120 struct hal_soc *soc = (struct hal_soc *)hal_soc; 121 122 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR( 123 MAC_TCL_REG_REG_BASE, id); 124 125 index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER; 126 addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER); 127 value = tid << (HAL_TX_BITS_PER_TID * index); 128 129 regval = HAL_REG_READ(soc, addr); 130 regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index)); 131 regval |= value; 132 133 HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK)); 134 } 135 136 /** 137 * hal_tx_init_cmd_credit_ring_kiwi() - Initialize command/credit SRNG 138 * @hal_soc_hdl: Handle to HAL SoC structure 139 * @hal_ring_hdl: Handle to HAL SRNG structure 140 * 141 * Return: none 142 */ 143 static inline void 144 hal_tx_init_cmd_credit_ring_kiwi(hal_soc_handle_t hal_soc_hdl, 145 hal_ring_handle_t hal_ring_hdl) 146 { 147 } 148 149 #ifdef DP_TX_IMPLICIT_RBM_MAPPING 150 151 #define RBM_MAPPING_BMSK HWIO_TCL_R0_RBM_MAPPING0_SW2TCL1_RING_BMSK 152 #define RBM_MAPPING_SHFT HWIO_TCL_R0_RBM_MAPPING0_SW2TCL2_RING_SHFT 153 154 #define RBM_PPE2TCL_OFFSET \ 155 (HWIO_TCL_R0_RBM_MAPPING0_PPE2TCL1_RING_SHFT >> 2) 156 #define RBM_TCL_CMD_CREDIT_OFFSET \ 157 (HWIO_TCL_R0_RBM_MAPPING0_SW2TCL_CREDIT_RING_SHFT >> 2) 158 159 /** 160 * hal_tx_config_rbm_mapping_be_kiwi() - Update return buffer manager ring id 161 * @hal_soc_hdl: HAL SoC context 162 * @hal_ring_hdl: Source ring pointer 163 * @rbm_id: return buffer manager ring id 164 * 165 * Return: void 166 */ 167 static inline void 168 hal_tx_config_rbm_mapping_be_kiwi(hal_soc_handle_t hal_soc_hdl, 169 hal_ring_handle_t hal_ring_hdl, 170 uint8_t rbm_id) 171 { 172 struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl; 173 struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; 174 uint32_t reg_addr = 0; 175 uint32_t reg_val = 0; 176 uint32_t val = 0; 177 uint8_t ring_num; 178 enum hal_ring_type ring_type; 179 180 ring_type = srng->ring_type; 181 ring_num = hal_soc->hw_srng_table[ring_type].start_ring_id; 182 ring_num = srng->ring_id - ring_num; 183 184 reg_addr = HWIO_TCL_R0_RBM_MAPPING0_ADDR(MAC_TCL_REG_REG_BASE); 185 186 if (ring_type == PPE2TCL) 187 ring_num = ring_num + RBM_PPE2TCL_OFFSET; 188 else if (ring_type == TCL_CMD_CREDIT) 189 ring_num = ring_num + RBM_TCL_CMD_CREDIT_OFFSET; 190 191 /* get current value stored in register address */ 192 val = HAL_REG_READ(hal_soc, reg_addr); 193 194 /* mask out other stored value */ 195 val &= (~(RBM_MAPPING_BMSK << (RBM_MAPPING_SHFT * ring_num))); 196 197 reg_val = val | ((RBM_MAPPING_BMSK & rbm_id) << 198 (RBM_MAPPING_SHFT * ring_num)); 199 200 /* write rbm mapped value to register address */ 201 HAL_REG_WRITE(hal_soc, reg_addr, reg_val); 202 } 203 #else 204 static inline void 205 hal_tx_config_rbm_mapping_be_kiwi(hal_soc_handle_t hal_soc_hdl, 206 hal_ring_handle_t hal_ring_hdl, 207 uint8_t rbm_id) 208 { 209 } 210 #endif 211