1 /* 2 * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _HAL_API_MON_H_ 20 #define _HAL_API_MON_H_ 21 22 #include "qdf_types.h" 23 #include "hal_internal.h" 24 #include <target_type.h> 25 26 #define HAL_RX_PHY_DATA_RADAR 0x01 27 #define HAL_SU_MU_CODING_LDPC 0x01 28 29 #define HAL_RX_FCS_LEN (4) 30 #define KEY_EXTIV 0x20 31 32 #define HAL_RX_USER_TLV32_TYPE_OFFSET 0x00000000 33 #define HAL_RX_USER_TLV32_TYPE_LSB 1 34 #define HAL_RX_USER_TLV32_TYPE_MASK 0x000003FE 35 36 #define HAL_RX_USER_TLV32_LEN_OFFSET 0x00000000 37 #define HAL_RX_USER_TLV32_LEN_LSB 10 38 #define HAL_RX_USER_TLV32_LEN_MASK 0x003FFC00 39 40 #define HAL_RX_USER_TLV32_USERID_OFFSET 0x00000000 41 #define HAL_RX_USER_TLV32_USERID_LSB 26 42 #define HAL_RX_USER_TLV32_USERID_MASK 0xFC000000 43 44 #define HAL_ALIGN(x, a) HAL_ALIGN_MASK(x, (a)-1) 45 #define HAL_ALIGN_MASK(x, mask) (typeof(x))(((uint32)(x) + (mask)) & ~(mask)) 46 47 #define HAL_RX_TLV32_HDR_SIZE 4 48 49 #define HAL_RX_GET_USER_TLV32_TYPE(rx_status_tlv_ptr) \ 50 ((*((uint32_t *)(rx_status_tlv_ptr)) & \ 51 HAL_RX_USER_TLV32_TYPE_MASK) >> \ 52 HAL_RX_USER_TLV32_TYPE_LSB) 53 54 #define HAL_RX_GET_USER_TLV32_LEN(rx_status_tlv_ptr) \ 55 ((*((uint32_t *)(rx_status_tlv_ptr)) & \ 56 HAL_RX_USER_TLV32_LEN_MASK) >> \ 57 HAL_RX_USER_TLV32_LEN_LSB) 58 59 #define HAL_RX_GET_USER_TLV32_USERID(rx_status_tlv_ptr) \ 60 ((*((uint32_t *)(rx_status_tlv_ptr)) & \ 61 HAL_RX_USER_TLV32_USERID_MASK) >> \ 62 HAL_RX_USER_TLV32_USERID_LSB) 63 64 #define HAL_TLV_STATUS_PPDU_NOT_DONE 0 65 #define HAL_TLV_STATUS_PPDU_DONE 1 66 #define HAL_TLV_STATUS_BUF_DONE 2 67 #define HAL_TLV_STATUS_PPDU_NON_STD_DONE 3 68 #define HAL_TLV_STATUS_PPDU_START 4 69 #define HAL_TLV_STATUS_HEADER 5 70 #define HAL_TLV_STATUS_MPDU_END 6 71 #define HAL_TLV_STATUS_MSDU_START 7 72 #define HAL_TLV_STATUS_MSDU_END 8 73 74 #define HAL_MAX_UL_MU_USERS 8 75 76 #define HAL_RX_PKT_TYPE_11A 0 77 #define HAL_RX_PKT_TYPE_11B 1 78 #define HAL_RX_PKT_TYPE_11N 2 79 #define HAL_RX_PKT_TYPE_11AC 3 80 #define HAL_RX_PKT_TYPE_11AX 4 81 82 #define HAL_RX_RECEPTION_TYPE_SU 0 83 #define HAL_RX_RECEPTION_TYPE_MU_MIMO 1 84 #define HAL_RX_RECEPTION_TYPE_OFDMA 2 85 #define HAL_RX_RECEPTION_TYPE_MU_OFDMA 3 86 87 /* Multiply rate by 2 to avoid float point 88 * and get rate in units of 500kbps 89 */ 90 #define HAL_11B_RATE_0MCS 11*2 91 #define HAL_11B_RATE_1MCS 5.5*2 92 #define HAL_11B_RATE_2MCS 2*2 93 #define HAL_11B_RATE_3MCS 1*2 94 #define HAL_11B_RATE_4MCS 11*2 95 #define HAL_11B_RATE_5MCS 5.5*2 96 #define HAL_11B_RATE_6MCS 2*2 97 98 #define HAL_11A_RATE_0MCS 48*2 99 #define HAL_11A_RATE_1MCS 24*2 100 #define HAL_11A_RATE_2MCS 12*2 101 #define HAL_11A_RATE_3MCS 6*2 102 #define HAL_11A_RATE_4MCS 54*2 103 #define HAL_11A_RATE_5MCS 36*2 104 #define HAL_11A_RATE_6MCS 18*2 105 #define HAL_11A_RATE_7MCS 9*2 106 107 #define HAL_LEGACY_MCS0 0 108 #define HAL_LEGACY_MCS1 1 109 #define HAL_LEGACY_MCS2 2 110 #define HAL_LEGACY_MCS3 3 111 #define HAL_LEGACY_MCS4 4 112 #define HAL_LEGACY_MCS5 5 113 #define HAL_LEGACY_MCS6 6 114 #define HAL_LEGACY_MCS7 7 115 116 #define HE_GI_0_8 0 117 #define HE_GI_0_4 1 118 #define HE_GI_1_6 2 119 #define HE_GI_3_2 3 120 121 #define HT_SGI_PRESENT 0x80 122 123 #define HE_LTF_1_X 0 124 #define HE_LTF_2_X 1 125 #define HE_LTF_4_X 2 126 #define HE_LTF_UNKNOWN 3 127 #define VHT_SIG_SU_NSS_MASK 0x7 128 #define HT_SIG_SU_NSS_SHIFT 0x3 129 130 #define HAL_TID_INVALID 31 131 #define HAL_AST_IDX_INVALID 0xFFFF 132 133 #ifdef GET_MSDU_AGGREGATION 134 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)\ 135 {\ 136 struct rx_msdu_end *rx_msdu_end;\ 137 bool first_msdu, last_msdu; \ 138 rx_msdu_end = &rx_desc->msdu_end_tlv.rx_msdu_end;\ 139 first_msdu = HAL_RX_GET(rx_msdu_end, RX_MSDU_END_5, FIRST_MSDU);\ 140 last_msdu = HAL_RX_GET(rx_msdu_end, RX_MSDU_END_5, LAST_MSDU);\ 141 if (first_msdu && last_msdu)\ 142 rs->rs_flags &= (~IEEE80211_AMSDU_FLAG);\ 143 else\ 144 rs->rs_flags |= (IEEE80211_AMSDU_FLAG); \ 145 } \ 146 147 #else 148 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs) 149 #endif 150 151 enum { 152 DP_PPDU_STATUS_START, 153 DP_PPDU_STATUS_DONE, 154 }; 155 156 static inline 157 uint32_t HAL_RX_MON_HW_RX_DESC_SIZE(void) 158 { 159 /* return the HW_RX_DESC size */ 160 return sizeof(struct rx_pkt_tlvs); 161 } 162 163 static inline 164 uint8_t *HAL_RX_MON_DEST_GET_DESC(uint8_t *data) 165 { 166 return data; 167 } 168 169 static inline 170 uint32_t HAL_RX_DESC_GET_MPDU_LENGTH_ERR(void *hw_desc_addr) 171 { 172 struct rx_attention *rx_attn; 173 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr; 174 175 rx_attn = &rx_desc->attn_tlv.rx_attn; 176 177 return HAL_RX_GET(rx_attn, RX_ATTENTION_1, MPDU_LENGTH_ERR); 178 } 179 180 static inline 181 uint32_t HAL_RX_DESC_GET_MPDU_FCS_ERR(void *hw_desc_addr) 182 { 183 struct rx_attention *rx_attn; 184 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr; 185 186 rx_attn = &rx_desc->attn_tlv.rx_attn; 187 188 return HAL_RX_GET(rx_attn, RX_ATTENTION_1, FCS_ERR); 189 } 190 191 /* 192 * HAL_RX_HW_DESC_MPDU_VALID() - check MPDU start TLV tag in MPDU 193 * start TLV of Hardware TLV descriptor 194 * @hw_desc_addr: Hardware desciptor address 195 * 196 * Return: bool: if TLV tag match 197 */ 198 static inline 199 bool HAL_RX_HW_DESC_MPDU_VALID(void *hw_desc_addr) 200 { 201 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr; 202 uint32_t tlv_tag; 203 204 tlv_tag = HAL_RX_GET_USER_TLV32_TYPE( 205 &rx_desc->mpdu_start_tlv); 206 207 return tlv_tag == WIFIRX_MPDU_START_E ? true : false; 208 } 209 210 static inline 211 uint32_t HAL_RX_HW_DESC_GET_PPDUID_GET(void *hw_desc_addr) 212 { 213 struct rx_mpdu_info *rx_mpdu_info; 214 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr; 215 216 rx_mpdu_info = 217 &rx_desc->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details; 218 219 return HAL_RX_GET(rx_mpdu_info, RX_MPDU_INFO_0, PHY_PPDU_ID); 220 } 221 222 /* TODO: Move all Rx descriptor functions to hal_rx.h to avoid duplication */ 223 224 #define HAL_RX_BUFFER_ADDR_31_0_GET(buff_addr_info) \ 225 (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \ 226 BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET)), \ 227 BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK, \ 228 BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB)) 229 230 #define HAL_RX_REO_ENT_BUFFER_ADDR_39_32_GET(reo_ent_desc) \ 231 (HAL_RX_BUFFER_ADDR_39_32_GET(& \ 232 (((struct reo_entrance_ring *)reo_ent_desc) \ 233 ->reo_level_mpdu_frame_info.msdu_link_desc_addr_info))) 234 235 #define HAL_RX_REO_ENT_BUFFER_ADDR_31_0_GET(reo_ent_desc) \ 236 (HAL_RX_BUFFER_ADDR_31_0_GET(& \ 237 (((struct reo_entrance_ring *)reo_ent_desc) \ 238 ->reo_level_mpdu_frame_info.msdu_link_desc_addr_info))) 239 240 #define HAL_RX_REO_ENT_BUF_COOKIE_GET(reo_ent_desc) \ 241 (HAL_RX_BUF_COOKIE_GET(& \ 242 (((struct reo_entrance_ring *)reo_ent_desc) \ 243 ->reo_level_mpdu_frame_info.msdu_link_desc_addr_info))) 244 245 /** 246 * hal_rx_reo_ent_buf_paddr_get: Gets the physical address and 247 * cookie from the REO entrance ring element 248 * 249 * @ hal_rx_desc_cookie: Opaque cookie pointer used by HAL to get to 250 * the current descriptor 251 * @ buf_info: structure to return the buffer information 252 * @ msdu_cnt: pointer to msdu count in MPDU 253 * Return: void 254 */ 255 static inline 256 void hal_rx_reo_ent_buf_paddr_get(void *rx_desc, 257 struct hal_buf_info *buf_info, 258 void **pp_buf_addr_info, 259 uint32_t *msdu_cnt 260 ) 261 { 262 struct reo_entrance_ring *reo_ent_ring = 263 (struct reo_entrance_ring *)rx_desc; 264 struct buffer_addr_info *buf_addr_info; 265 struct rx_mpdu_desc_info *rx_mpdu_desc_info_details; 266 uint32_t loop_cnt; 267 268 rx_mpdu_desc_info_details = 269 &reo_ent_ring->reo_level_mpdu_frame_info.rx_mpdu_desc_info_details; 270 271 *msdu_cnt = HAL_RX_GET(rx_mpdu_desc_info_details, 272 RX_MPDU_DESC_INFO_0, MSDU_COUNT); 273 274 loop_cnt = HAL_RX_GET(reo_ent_ring, REO_ENTRANCE_RING_7, LOOPING_COUNT); 275 276 buf_addr_info = 277 &reo_ent_ring->reo_level_mpdu_frame_info.msdu_link_desc_addr_info; 278 279 buf_info->paddr = 280 (HAL_RX_BUFFER_ADDR_31_0_GET(buf_addr_info) | 281 ((uint64_t) 282 (HAL_RX_BUFFER_ADDR_39_32_GET(buf_addr_info)) << 32)); 283 284 buf_info->sw_cookie = HAL_RX_BUF_COOKIE_GET(buf_addr_info); 285 286 QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG, 287 "[%s][%d] ReoAddr=%pK, addrInfo=%pK, paddr=0x%llx, loopcnt=%d", 288 __func__, __LINE__, reo_ent_ring, buf_addr_info, 289 (unsigned long long)buf_info->paddr, loop_cnt); 290 291 *pp_buf_addr_info = (void *)buf_addr_info; 292 } 293 294 static inline 295 void hal_rx_mon_next_link_desc_get(void *rx_msdu_link_desc, 296 struct hal_buf_info *buf_info, void **pp_buf_addr_info) 297 { 298 struct rx_msdu_link *msdu_link = 299 (struct rx_msdu_link *)rx_msdu_link_desc; 300 struct buffer_addr_info *buf_addr_info; 301 302 buf_addr_info = &msdu_link->next_msdu_link_desc_addr_info; 303 304 buf_info->paddr = 305 (HAL_RX_BUFFER_ADDR_31_0_GET(buf_addr_info) | 306 ((uint64_t) 307 (HAL_RX_BUFFER_ADDR_39_32_GET(buf_addr_info)) << 32)); 308 309 buf_info->sw_cookie = HAL_RX_BUF_COOKIE_GET(buf_addr_info); 310 311 *pp_buf_addr_info = (void *)buf_addr_info; 312 } 313 314 /** 315 * hal_rx_msdu_link_desc_set: Retrieves MSDU Link Descriptor to WBM 316 * 317 * @ soc : HAL version of the SOC pointer 318 * @ src_srng_desc : void pointer to the WBM Release Ring descriptor 319 * @ buf_addr_info : void pointer to the buffer_addr_info 320 * 321 * Return: void 322 */ 323 324 static inline void hal_rx_mon_msdu_link_desc_set(struct hal_soc *soc, 325 void *src_srng_desc, void *buf_addr_info) 326 { 327 struct buffer_addr_info *wbm_srng_buffer_addr_info = 328 (struct buffer_addr_info *)src_srng_desc; 329 uint64_t paddr; 330 struct buffer_addr_info *p_buffer_addr_info = 331 (struct buffer_addr_info *)buf_addr_info; 332 333 paddr = 334 (HAL_RX_BUFFER_ADDR_31_0_GET(buf_addr_info) | 335 ((uint64_t) 336 (HAL_RX_BUFFER_ADDR_39_32_GET(buf_addr_info)) << 32)); 337 338 QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG, 339 "[%s][%d] src_srng_desc=%pK, buf_addr=0x%llx, cookie=0x%llx", 340 __func__, __LINE__, src_srng_desc, (unsigned long long)paddr, 341 (unsigned long long)p_buffer_addr_info->sw_buffer_cookie); 342 343 /* Structure copy !!! */ 344 *wbm_srng_buffer_addr_info = 345 *((struct buffer_addr_info *)buf_addr_info); 346 } 347 348 static inline 349 uint32 hal_get_rx_msdu_link_desc_size(void) 350 { 351 return sizeof(struct rx_msdu_link); 352 } 353 354 enum { 355 HAL_PKT_TYPE_OFDM = 0, 356 HAL_PKT_TYPE_CCK, 357 HAL_PKT_TYPE_HT, 358 HAL_PKT_TYPE_VHT, 359 HAL_PKT_TYPE_HE, 360 }; 361 362 enum { 363 HAL_SGI_0_8_US, 364 HAL_SGI_0_4_US, 365 HAL_SGI_1_6_US, 366 HAL_SGI_3_2_US, 367 }; 368 369 enum { 370 HAL_FULL_RX_BW_20, 371 HAL_FULL_RX_BW_40, 372 HAL_FULL_RX_BW_80, 373 HAL_FULL_RX_BW_160, 374 }; 375 376 enum { 377 HAL_RX_TYPE_SU, 378 HAL_RX_TYPE_MU_MIMO, 379 HAL_RX_TYPE_MU_OFDMA, 380 HAL_RX_TYPE_MU_OFDMA_MIMO, 381 }; 382 383 /** 384 * enum 385 * @HAL_RX_MON_PPDU_START: PPDU start TLV is decoded in HAL 386 * @HAL_RX_MON_PPDU_END: PPDU end TLV is decided in HAL 387 */ 388 enum { 389 HAL_RX_MON_PPDU_START = 0, 390 HAL_RX_MON_PPDU_END, 391 }; 392 393 struct hal_rx_ppdu_common_info { 394 uint32_t ppdu_id; 395 uint32_t ppdu_timestamp; 396 uint32_t mpdu_cnt_fcs_ok; 397 uint32_t mpdu_cnt_fcs_err; 398 }; 399 400 struct hal_rx_msdu_payload_info { 401 uint8_t *first_msdu_payload; 402 uint32_t payload_len; 403 }; 404 405 /** 406 * struct hal_rx_nac_info - struct for neighbour info 407 * @fc_valid: flag indicate if it has valid frame control information 408 * @to_ds_flag: flag indicate to_ds bit 409 * @mac_addr2_valid: flag indicate if mac_addr2 is valid 410 * @mac_addr2: mac address2 in wh 411 */ 412 struct hal_rx_nac_info { 413 uint8_t fc_valid; 414 uint8_t to_ds_flag; 415 uint8_t mac_addr2_valid; 416 uint8_t mac_addr2[QDF_MAC_ADDR_SIZE]; 417 }; 418 419 struct hal_rx_ppdu_info { 420 struct hal_rx_ppdu_common_info com_info; 421 struct mon_rx_status rx_status; 422 struct mon_rx_user_status rx_user_status[HAL_MAX_UL_MU_USERS]; 423 struct hal_rx_msdu_payload_info msdu_info; 424 struct hal_rx_nac_info nac_info; 425 /* status ring PPDU start and end state */ 426 uint32_t rx_state; 427 /* MU user id for status ring TLV */ 428 uint32_t user_id; 429 /* MPDU/MSDU truncated to 128 bytes header start addr in status skb */ 430 unsigned char *data; 431 /* MPDU/MSDU truncated to 128 bytes header real length */ 432 uint32_t hdr_len; 433 /* MPDU FCS error */ 434 bool fcs_err; 435 }; 436 437 static inline uint32_t 438 hal_get_rx_status_buf_size(void) { 439 /* RX status buffer size is hard coded for now */ 440 return 2048; 441 } 442 443 static inline uint8_t* 444 hal_rx_status_get_next_tlv(uint8_t *rx_tlv) { 445 uint32_t tlv_len, tlv_tag; 446 447 tlv_len = HAL_RX_GET_USER_TLV32_LEN(rx_tlv); 448 tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(rx_tlv); 449 450 /* The actual length of PPDU_END is the combined length of many PHY 451 * TLVs that follow. Skip the TLV header and 452 * rx_rxpcu_classification_overview that follows the header to get to 453 * next TLV. 454 */ 455 if (tlv_tag == WIFIRX_PPDU_END_E) 456 tlv_len = sizeof(struct rx_rxpcu_classification_overview); 457 458 return (uint8_t *)(((unsigned long)(rx_tlv + tlv_len + 459 HAL_RX_TLV32_HDR_SIZE + 3)) & (~((unsigned long)3))); 460 } 461 462 /** 463 * hal_rx_proc_phyrx_other_receive_info_tlv() 464 * - process other receive info TLV 465 * @rx_tlv_hdr: pointer to TLV header 466 * @ppdu_info: pointer to ppdu_info 467 * 468 * Return: None 469 */ 470 static inline void hal_rx_proc_phyrx_other_receive_info_tlv(struct hal_soc *hal_soc, 471 void *rx_tlv_hdr, 472 struct hal_rx_ppdu_info 473 *ppdu_info) 474 { 475 hal_soc->ops->hal_rx_proc_phyrx_other_receive_info_tlv(rx_tlv_hdr, 476 (void *)ppdu_info); 477 } 478 479 /** 480 * hal_rx_status_get_tlv_info() - process receive info TLV 481 * @rx_tlv_hdr: pointer to TLV header 482 * @ppdu_info: pointer to ppdu_info 483 * 484 * Return: HAL_TLV_STATUS_PPDU_NOT_DONE or HAL_TLV_STATUS_PPDU_DONE from tlv 485 */ 486 static inline uint32_t 487 hal_rx_status_get_tlv_info(void *rx_tlv_hdr, void *ppdu_info, 488 struct hal_soc *hal_soc) 489 { 490 return hal_soc->ops->hal_rx_status_get_tlv_info(rx_tlv_hdr, 491 ppdu_info, hal_soc); 492 } 493 494 static inline 495 uint32_t hal_get_rx_status_done_tlv_size(void *hal_soc) 496 { 497 return HAL_RX_TLV32_HDR_SIZE; 498 } 499 500 static inline QDF_STATUS 501 hal_get_rx_status_done(uint8_t *rx_tlv) 502 { 503 uint32_t tlv_tag; 504 505 tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(rx_tlv); 506 507 if (tlv_tag == WIFIRX_STATUS_BUFFER_DONE_E) 508 return QDF_STATUS_SUCCESS; 509 else 510 return QDF_STATUS_E_EMPTY; 511 } 512 513 static inline QDF_STATUS 514 hal_clear_rx_status_done(uint8_t *rx_tlv) 515 { 516 *(uint32_t *)rx_tlv = 0; 517 return QDF_STATUS_SUCCESS; 518 } 519 520 #endif 521