1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _HAL_BE_RX_TLV_H_ 21 #define _HAL_BE_RX_TLV_H_ 22 23 #include "hal_api_mon.h" 24 25 /* 26 * Structures & Macros to obtain fields from the TLV's in the Rx packet 27 * pre-header. 28 */ 29 30 #define HAL_RX_BE_PKT_HDR_TLV_LEN 112 31 32 #ifndef CONFIG_WORD_BASED_TLV 33 typedef struct rx_mpdu_start hal_rx_mpdu_start_t; 34 typedef struct rx_msdu_end hal_rx_msdu_end_t; 35 #endif 36 37 #define RX_BE_PADDING0_BYTES 8 38 /* 39 * Each RX descriptor TLV is preceded by 1 QWORD "tag" 40 */ 41 42 struct rx_pkt_hdr_tlv { 43 uint64_t tag; /* 8 B */ 44 uint64_t phy_ppdu_id; /* 8 B */ 45 char rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; /* 112 B */ 46 }; 47 48 #ifndef CONFIG_NO_TLV_TAGS 49 struct rx_mpdu_start_tlv { 50 uint64_t tag; /* 8 B */ 51 hal_rx_mpdu_start_t rx_mpdu_start; 52 }; 53 54 struct rx_msdu_end_tlv { 55 uint64_t tag; /* 8 B */ 56 hal_rx_msdu_end_t rx_msdu_end; 57 }; 58 59 struct rx_pkt_tlvs { 60 struct rx_msdu_end_tlv msdu_end_tlv; /* 120 bytes */ 61 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */ 62 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */ 63 #ifndef NO_RX_PKT_HDR_TLV 64 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 65 #endif 66 }; 67 #else 68 struct rx_mpdu_start_tlv { 69 hal_rx_mpdu_start_t rx_mpdu_start; 70 }; 71 72 struct rx_msdu_end_tlv { 73 hal_rx_msdu_end_t rx_msdu_end; 74 }; 75 76 struct rx_pkt_tlvs { 77 struct rx_msdu_end_tlv msdu_end_tlv; /* 128 bytes */ 78 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */ 79 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */ 80 #ifndef NO_RX_PKT_HDR_TLV 81 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 82 #endif 83 }; 84 #endif 85 86 #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs) 87 88 #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV 89 90 #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field) 91 92 #ifndef CONFIG_WORD_BASED_TLV 93 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 94 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 95 96 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 97 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 98 rx_mpdu_start.rx_mpdu_info_details) 99 100 #else /* CONFIG_WORD_BASED_TLV */ 101 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 102 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 103 104 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 105 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 106 rx_mpdu_start) 107 #endif /* CONFIG_WORD_BASED_TLV */ 108 109 #define HAL_RX_TLV_MSDU_DONE_GET(_rx_pkt_tlv) \ 110 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_done 111 112 #define HAL_RX_TLV_DECAP_FORMAT_GET(_rx_pkt_tlv) \ 113 HAL_RX_MSDU_END(_rx_pkt_tlv).decap_format 114 115 #ifdef RECEIVE_OFFLOAD 116 #define HAL_RX_TLV_GET_TCP_PURE_ACK(_rx_pkt_tlv) \ 117 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_only_ack 118 119 #define HAL_RX_TLV_GET_TCP_PROTO(_rx_pkt_tlv) \ 120 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_proto 121 122 #define HAL_RX_TLV_GET_UDP_PROTO(_rx_pkt_tlv) \ 123 HAL_RX_MSDU_END(_rx_pkt_tlv).udp_proto 124 125 #define HAL_RX_TLV_GET_IPV6(_rx_pkt_tlv) \ 126 HAL_RX_MSDU_END(_rx_pkt_tlv).ipv6_proto 127 128 #define HAL_RX_TLV_GET_IP_OFFSET(_rx_pkt_tlv) \ 129 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_offset 130 131 #define HAL_RX_TLV_GET_TCP_OFFSET(_rx_pkt_tlv) \ 132 HAL_RX_MSDU_END(_rx_pkt_tlv).l4_offset 133 #endif /* RECEIVE_OFFLOAD */ 134 135 #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(_rx_pkt_tlv) \ 136 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 137 138 #define HAL_RX_TLV_MSDU_LEN_GET(_rx_pkt_tlv) \ 139 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_length 140 141 #define HAL_RX_TLV_CCE_MATCH_GET(_rx_pkt_tlv) \ 142 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_match 143 144 #define HAL_RX_TLV_PHY_PPDU_ID_GET(_rx_pkt_tlv) \ 145 HAL_RX_MSDU_END(_rx_pkt_tlv).phy_ppdu_id 146 147 #define HAL_RX_TLV_BW_GET(_rx_pkt_tlv) \ 148 HAL_RX_MSDU_END(_rx_pkt_tlv).receive_bandwidth 149 150 #define HAL_RX_TLV_FLOWID_TOEPLITZ_GET(_rx_pkt_tlv) \ 151 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 152 153 #define HAL_RX_TLV_SGI_GET(_rx_pkt_tlv) \ 154 HAL_RX_MSDU_END(_rx_pkt_tlv).sgi 155 156 #define HAL_RX_TLV_RATE_MCS_GET(_rx_pkt_tlv) \ 157 HAL_RX_MSDU_END(_rx_pkt_tlv).rate_mcs 158 159 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 160 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 161 162 #define HAL_RX_TLV_RSSI_GET(_rx_pkt_tlv) \ 163 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 164 165 #define HAL_RX_TLV_FREQ_GET(_rx_pkt_tlv) \ 166 HAL_RX_MSDU_END(_rx_pkt_tlv).sw_phy_meta_data 167 168 #define HAL_RX_TLV_PKT_TYPE_GET(_rx_pkt_tlv) \ 169 HAL_RX_MSDU_END(_rx_pkt_tlv).pkt_type 170 171 #define HAL_RX_TLV_DECRYPT_ERR_GET(_rx_pkt_tlv) \ 172 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_err 173 174 #define HAL_RX_TLV_MIC_ERR_GET(_rx_pkt_tlv) \ 175 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err 176 177 #define HAL_RX_TLV_MIMO_SS_BITMAP(_rx_pkt_tlv)\ 178 HAL_RX_MSDU_END(_rx_pkt_tlv).mimo_ss_bitmap 179 180 #define HAL_RX_TLV_ANT_SIGNAL_DB_GET(_rx_pkt_tlv) \ 181 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 182 183 #define HAL_RX_TLV_STBC_GET(_rx_pkt_tlv) \ 184 HAL_RX_MSDU_END(_rx_pkt_tlv).stbc 185 186 #define HAL_RX_TLV_RECEPTION_TYPE_GET(_rx_pkt_tlv) \ 187 HAL_RX_MSDU_END(_rx_pkt_tlv).reception_type 188 189 #define HAL_RX_TLV_IP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 190 HAL_RX_MSDU_END(_rx_pkt_tlv).ip_chksum_fail 191 192 #define HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 193 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum_fail 194 195 #define HAL_RX_TLV_MPDU_LEN_ERR_GET(_rx_pkt_tlv) \ 196 HAL_RX_MSDU_END(_rx_pkt_tlv).mpdu_length_err 197 198 #define HAL_RX_TLV_MPDU_FCS_ERR_GET(_rx_pkt_tlv) \ 199 HAL_RX_MSDU_END(_rx_pkt_tlv).fcs_err 200 201 #define HAL_RX_TLV_IS_MCAST_GET(_rx_pkt_tlv) \ 202 HAL_RX_MSDU_END(_rx_pkt_tlv).mcast_bcast 203 204 #ifndef CONFIG_WORD_BASED_TLV 205 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 206 HAL_RX_MPDU_START(_rx_pkt_tlv).first_mpdu 207 #else 208 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 209 HAL_RX_MSDU_END(_rx_pkt_tlv).first_mpdu 210 #endif 211 212 #ifdef RECEIVE_OFFLOAD 213 /** 214 * LRO information needed from the TLVs 215 */ 216 #define HAL_RX_TLV_GET_LRO_ELIGIBLE(_rx_pkt_tlv) \ 217 HAL_RX_MSDU_END(_rx_pkt_tlv).lro_eligible 218 219 #define HAL_RX_TLV_GET_TCP_ACK(_rx_pkt_tlv) \ 220 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_ack_number 221 222 #define HAL_RX_TLV_GET_TCP_SEQ(_rx_pkt_tlv) \ 223 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_seq_number 224 225 #define HAL_RX_TLV_GET_TCP_WIN(_rx_pkt_tlv) \ 226 HAL_RX_MSDU_END(_rx_pkt_tlv).window_size 227 #endif 228 229 #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \ 230 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type 231 232 #define HAL_RX_GET_FILTER_CATEGORY(_rx_pkt_tlv) \ 233 HAL_RX_MPDU_START(_rx_pkt_tlv).rxpcu_mpdu_filter_in_category 234 235 #define HAL_RX_GET_PPDU_ID(_rx_pkt_tlv) \ 236 HAL_RX_MPDU_START(_rx_pkt_tlv).phy_ppdu_id 237 238 #define HAL_RX_TLV_PEER_META_DATA_GET(_rx_pkt_tlv) \ 239 HAL_RX_MPDU_START(_rx_pkt_tlv).peer_meta_data 240 241 #define HAL_RX_TLV_AMPDU_FLAG_GET(_rx_pkt_tlv) \ 242 HAL_RX_MPDU_START(_rx_pkt_tlv).ampdu_flag 243 244 #define HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(_rx_pkt_tlv) \ 245 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_frame_group_id 246 247 #define HAL_RX_TLV_KEYID_OCTET_GET(_rx_pkt_tlv) \ 248 HAL_RX_MSDU_END(_rx_pkt_tlv).key_id_octet 249 250 #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(_rx_pkt_tlv) \ 251 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_number 252 253 #define HAL_RX_TLV_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 254 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 255 256 #define HAL_RX_TLV_L3_HEADER_PADDING_GET(_rx_pkt_tlv) \ 257 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_header_padding 258 259 #define HAL_RX_TLV_SA_IDX_GET(_rx_pkt_tlv) \ 260 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_idx 261 262 #define HAL_RX_TLV_DA_IDX_GET(_rx_pkt_tlv) \ 263 HAL_RX_MSDU_END(_rx_pkt_tlv).da_idx_or_sw_peer_id 264 265 #define HAL_RX_TLV_FIRST_MSDU_GET(_rx_pkt_tlv) \ 266 HAL_RX_MSDU_END(_rx_pkt_tlv).first_msdu 267 268 #define HAL_RX_TLV_LAST_MSDU_GET(_rx_pkt_tlv) \ 269 HAL_RX_MSDU_END(_rx_pkt_tlv).last_msdu 270 271 /* 272 * Get tid from RX_MPDU_START 273 */ 274 #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \ 275 HAL_RX_MPDU_START(_rx_pkt_tlv).tid 276 277 #define HAL_RX_TLV_DA_IS_MCBC_GET(_rx_pkt_tlv) \ 278 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_mcbc 279 280 #define HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(_rx_pkt_tlv) \ 281 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err 282 283 #define HAL_RX_TLV_SA_IS_VALID_GET(_rx_pkt_tlv) \ 284 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_is_valid 285 286 #define HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(_rx_pkt_tlv) \ 287 HAL_RX_MPDU_START(_rx_pkt_tlv).frame_encryption_info_valid 288 289 #define HAL_RX_TLV_MPDU_PN_31_0_GET(_rx_pkt_tlv) \ 290 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_31_0 291 292 #define HAL_RX_TLV_MPDU_PN_63_32_GET(_rx_pkt_tlv) \ 293 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_63_32 294 295 #define HAL_RX_TLV_MPDU_PN_95_64_GET(_rx_pkt_tlv) \ 296 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_95_64 297 298 #define HAL_RX_TLV_MPDU_PN_127_96_GET(_rx_pkt_tlv) \ 299 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_127_96 300 301 #define HAL_RX_TLV_DA_IS_VALID_GET(_rx_pkt_tlv) \ 302 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_valid 303 304 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_pkt_tlv) \ 305 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_valid 306 307 #define HAL_RX_TLV_SW_PEER_ID_GET(_rx_pkt_tlv) \ 308 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_peer_id 309 310 #define HAL_RX_TLV_MPDU_GET_TODS(_rx_pkt_tlv) \ 311 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 312 313 #define HAL_RX_TLV_MPDU_GET_FROMDS(_rx_pkt_tlv) \ 314 HAL_RX_MPDU_START(_rx_pkt_tlv).fr_ds 315 316 #define HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(_rx_pkt_tlv) \ 317 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 318 319 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_pkt_tlv) \ 320 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_valid 321 322 #define HAL_RX_TLV_MPDU_AD1_31_0_GET(_rx_pkt_tlv) \ 323 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_31_0 324 325 #define HAL_RX_TLV_MPDU_AD1_47_32_GET(_rx_pkt_tlv) \ 326 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_47_32 327 328 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_pkt_tlv) \ 329 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_valid 330 331 #define HAL_RX_TLV_MPDU_AD2_15_0_GET(_rx_pkt_tlv) \ 332 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_15_0 333 334 #define HAL_RX_TLV_MPDU_AD2_47_16_GET(_rx_pkt_tlv) \ 335 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_47_16 336 337 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_pkt_tlv) \ 338 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_valid 339 340 #define HAL_RX_TLV_MPDU_AD3_31_0_GET(_rx_pkt_tlv) \ 341 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_31_0 342 343 #define HAL_RX_TLV_MPDU_AD3_47_32_GET(_rx_pkt_tlv) \ 344 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_47_32 345 346 #define HAL_RX_TLV_MPDU_AD4_31_0_GET(_rx_pkt_tlv) \ 347 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_31_0 348 349 #define HAL_RX_TLV_MPDU_AD4_47_32_GET(_rx_pkt_tlv) \ 350 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_47_32 351 352 #define HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_pkt_tlv) \ 353 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_control_valid 354 355 #define HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 356 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 357 358 #define HAL_RX_TLV_GET_FC_VALID(_rx_pkt_tlv) \ 359 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 360 361 #define HAL_RX_TLV_GET_TO_DS_FLAG(_rx_pkt_tlv) \ 362 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 363 364 #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_pkt_tlv) \ 365 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_field 366 367 #define HAL_RX_TLV_FLOW_IDX_GET(_rx_pkt_tlv) \ 368 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx 369 370 #define HAL_RX_TLV_REO_DEST_IND_GET(_rx_pkt_tlv) \ 371 HAL_RX_MSDU_END(_rx_pkt_tlv).reo_destination_indication 372 373 #define HAL_RX_TLV_FLOW_IDX_INVALID_GET(_rx_pkt_tlv) \ 374 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_invalid 375 376 #define HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(_rx_pkt_tlv) \ 377 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_timeout 378 379 #define HAL_RX_TLV_FSE_METADATA_GET(_rx_pkt_tlv) \ 380 HAL_RX_MSDU_END(_rx_pkt_tlv).fse_metadata 381 382 #define HAL_RX_TLV_CCE_METADATA_GET(_rx_pkt_tlv) \ 383 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_metadata 384 385 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 386 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 387 388 #define HAL_RX_TLV_GET_TCP_CHKSUM(_rx_pkt_tlv) \ 389 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum 390 391 #define HAL_RX_TLV_GET_FLOW_AGGR_CONT(_rx_pkt_tlv) \ 392 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_aggregation_continuation 393 394 #define HAL_RX_TLV_GET_FLOW_AGGR_COUNT(_rx_pkt_tlv) \ 395 HAL_RX_MSDU_END(_rx_pkt_tlv).aggregation_count 396 397 #define HAL_RX_TLV_GET_FISA_TIMEOUT(_rx_pkt_tlv) \ 398 HAL_RX_MSDU_END(_rx_pkt_tlv).fisa_timeout 399 400 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(_rx_pkt_tlv) \ 401 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_l4_checksum 402 403 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(_rx_pkt_tlv) \ 404 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_ip_length 405 406 #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 407 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 408 409 #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 410 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 411 412 #define HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(_rx_pkt_tlv) \ 413 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_31_0 414 415 #define HAL_RX_REO_QUEUE_DESC_ADDR_39_32_GET(_rx_pkt_tlv) \ 416 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_39_32 417 418 /* used by monitor mode for parsing from full TLV */ 419 #define HAL_RX_MON_GET_FC_VALID(_rx_mpdu_start) \ 420 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MPDU_FRAME_CONTROL_VALID) 421 422 #define HAL_RX_MON_GET_TO_DS_FLAG(_rx_mpdu_start) \ 423 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, TO_DS) 424 425 #define HAL_RX_MON_GET_MAC_ADDR2_VALID(_rx_mpdu_start) \ 426 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MAC_ADDR_AD2_VALID) 427 428 static inline 429 uint32_t hal_rx_tlv_decap_format_get_be(void *hw_desc_addr) 430 { 431 struct rx_pkt_tlvs *rx_pkt_tlvs = 432 (struct rx_pkt_tlvs *)hw_desc_addr; 433 434 return HAL_RX_TLV_DECAP_FORMAT_GET(rx_pkt_tlvs); 435 } 436 437 static inline uint32_t hal_rx_tlv_msdu_done_get_be(uint8_t *buf) 438 { 439 return HAL_RX_TLV_MSDU_DONE_GET(buf); 440 } 441 442 /* 443 * hal_rx_attn_first_mpdu_get(): get fist_mpdu bit from rx attention 444 * @buf: pointer to rx_pkt_tlvs 445 * 446 * return: uint32_t(first_msdu) 447 */ 448 static inline uint32_t hal_rx_tlv_first_mpdu_get_be(uint8_t *buf) 449 { 450 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 451 452 return HAL_RX_TLV_FIRST_MPDU_GET(rx_pkt_tlvs); 453 } 454 455 /* 456 * hal_rx_msdu_cce_match_get(): get CCE match bit 457 * from rx attention 458 * @buf: pointer to rx_pkt_tlvs 459 * Return: CCE match value 460 */ 461 static inline bool hal_rx_msdu_cce_match_get_be(uint8_t *buf) 462 { 463 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 464 465 return HAL_RX_TLV_CCE_MATCH_GET(rx_pkt_tlvs); 466 } 467 468 /* 469 * hal_rx_attn_phy_ppdu_id_get(): get phy_ppdu_id value 470 * from rx attention 471 * @buf: pointer to rx_pkt_tlvs 472 * 473 * Return: phy_ppdu_id 474 */ 475 static inline uint16_t hal_rx_attn_phy_ppdu_id_get_be(uint8_t *buf) 476 { 477 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 478 uint16_t phy_ppdu_id; 479 480 phy_ppdu_id = HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 481 482 return phy_ppdu_id; 483 } 484 485 /* 486 * hal_rx_tlv_phy_ppdu_id_get(): get phy_ppdu_id value 487 * from rx attention 488 * @buf: pointer to rx_pkt_tlvs 489 * 490 * Return: phy_ppdu_id 491 */ 492 static inline uint16_t hal_rx_tlv_phy_ppdu_id_get_be(uint8_t *buf) 493 { 494 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 495 496 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 497 } 498 499 /* 500 * hal_rx_mpdu_peer_meta_data_set: set peer meta data in RX mpdu start tlv 501 * 502 * @buf: rx_tlv_hdr of the received packet 503 * @peer_mdata: peer meta data to be set. 504 * Return: void 505 */ 506 static inline void 507 hal_rx_mpdu_peer_meta_data_set_be(uint8_t *buf, uint32_t peer_mdata) 508 { 509 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 510 511 HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs) = peer_mdata; 512 } 513 514 /* 515 * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START 516 */ 517 518 static inline uint32_t hal_rx_mpdu_peer_meta_data_get_be(uint8_t *buf) 519 { 520 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 521 522 return HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs); 523 } 524 525 /** 526 * hal_rx_mpdu_info_ampdu_flag_get_be(): get ampdu flag bit 527 * from rx mpdu info 528 * @buf: pointer to rx_pkt_tlvs 529 * 530 * Return: ampdu flag 531 */ 532 static inline bool hal_rx_mpdu_info_ampdu_flag_get_be(uint8_t *buf) 533 { 534 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 535 536 return !!HAL_RX_TLV_AMPDU_FLAG_GET(rx_pkt_tlvs); 537 } 538 539 /** 540 * hal_rx_tlv_msdu_len_get(): API to get the MSDU length 541 * from rx_msdu_start TLV 542 * 543 * @ buf: pointer to the start of RX PKT TLV headers 544 * Return: msdu length 545 */ 546 static inline uint32_t hal_rx_tlv_msdu_len_get_be(uint8_t *buf) 547 { 548 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 549 550 return HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 551 } 552 553 /** 554 * hal_rx_tlv_msdu_len_set(): API to set the MSDU length 555 * from rx_msdu_start TLV 556 * 557 * @buf: pointer to the start of RX PKT TLV headers 558 * @len: msdu length 559 * 560 * Return: none 561 */ 562 static inline void hal_rx_tlv_msdu_len_set_be(uint8_t *buf, uint32_t len) 563 { 564 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 565 566 HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs) = len; 567 } 568 569 /* 570 * hal_rx_tlv_bw_get(): API to get the Bandwidth 571 * Interval from rx_msdu_start 572 * 573 * @buf: pointer to the start of RX PKT TLV header 574 * Return: uint32_t(bw) 575 */ 576 static inline uint32_t hal_rx_tlv_bw_get_be(uint8_t *buf) 577 { 578 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 579 580 return HAL_RX_TLV_BW_GET(rx_pkt_tlvs); 581 } 582 583 /** 584 * hal_rx_tlv_toeplitz_get: API to get the toeplitz hash 585 * from rx_msdu_start TLV 586 * 587 * @ buf: pointer to the start of RX PKT TLV headers 588 * Return: toeplitz hash 589 */ 590 static inline uint32_t hal_rx_tlv_toeplitz_get_be(uint8_t *buf) 591 { 592 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 593 594 return HAL_RX_TLV_FLOWID_TOEPLITZ_GET(rx_pkt_tlvs); 595 } 596 597 /** 598 * hal_rx_tlv_msdu_sgi_get(): API to get the Short Gaurd 599 * Interval from rx_msdu_start TLV 600 * 601 * @buf: pointer to the start of RX PKT TLV headers 602 * Return: uint32_t(sgi) 603 */ 604 static inline uint32_t hal_rx_tlv_sgi_get_be(uint8_t *buf) 605 { 606 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 607 608 return HAL_RX_TLV_SGI_GET(rx_pkt_tlvs); 609 } 610 611 /** 612 * hal_rx_tlv_msdu_rate_mcs_get(): API to get the MCS rate 613 * from rx_msdu_start TLV 614 * 615 * @buf: pointer to the start of RX PKT TLV headers 616 * Return: uint32_t(rate_mcs) 617 */ 618 static inline uint32_t hal_rx_tlv_rate_mcs_get_be(uint8_t *buf) 619 { 620 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 621 uint32_t rate_mcs; 622 623 rate_mcs = HAL_RX_TLV_RATE_MCS_GET(rx_pkt_tlvs); 624 625 return rate_mcs; 626 } 627 628 /* 629 * Get key index from RX_MSDU_END 630 */ 631 /* 632 * hal_rx_msdu_get_keyid(): API to get the key id if the decrypted packet 633 * from rx_msdu_end 634 * 635 * @buf: pointer to the start of RX PKT TLV header 636 * Return: uint32_t(key id) 637 */ 638 639 static inline uint8_t hal_rx_msdu_get_keyid_be(uint8_t *buf) 640 { 641 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 642 uint32_t keyid_octet; 643 644 keyid_octet = HAL_RX_TLV_KEYID_OCTET_GET(rx_pkt_tlvs); 645 646 return keyid_octet & 0x3; 647 } 648 649 /* 650 * hal_rx_tlv_get_rssi(): API to get the rssi of received pkt 651 * from rx_msdu_start 652 * 653 * @buf: pointer to the start of RX PKT TLV header 654 * Return: uint32_t(rssi) 655 */ 656 657 static inline uint32_t hal_rx_tlv_get_rssi_be(uint8_t *buf) 658 { 659 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 660 uint32_t rssi; 661 662 rssi = HAL_RX_TLV_RSSI_GET(rx_pkt_tlvs); 663 664 return rssi; 665 } 666 667 /* 668 * hal_rx_tlv_get_freq(): API to get the frequency of operating channel 669 * from rx_msdu_start 670 * 671 * @buf: pointer to the start of RX PKT TLV header 672 * Return: uint32_t(frequency) 673 */ 674 675 static inline uint32_t hal_rx_tlv_get_freq_be(uint8_t *buf) 676 { 677 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 678 uint32_t freq; 679 680 freq = HAL_RX_TLV_FREQ_GET(rx_pkt_tlvs); 681 682 return freq; 683 } 684 685 686 /* 687 * hal_rx_tlv_get_pkt_type(): API to get the pkt type 688 * from rx_msdu_start 689 * 690 * @buf: pointer to the start of RX PKT TLV header 691 * Return: uint32_t(pkt type) 692 */ 693 694 static inline uint32_t hal_rx_tlv_get_pkt_type_be(uint8_t *buf) 695 { 696 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 697 uint32_t pkt_type; 698 699 pkt_type = HAL_RX_TLV_PKT_TYPE_GET(rx_pkt_tlvs); 700 701 return pkt_type; 702 } 703 704 /******************************************************************************* 705 * RX ERROR APIS 706 ******************************************************************************/ 707 708 /** 709 * hal_rx_tlv_decrypt_err_get(): API to get the Decrypt ERR 710 * from rx_mpdu_end TLV 711 * 712 * @buf: pointer to the start of RX PKT TLV headers 713 * Return: uint32_t(decrypt_err) 714 */ 715 static inline uint32_t hal_rx_tlv_decrypt_err_get_be(uint8_t *buf) 716 { 717 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 718 uint32_t decrypt_err; 719 720 decrypt_err = HAL_RX_TLV_DECRYPT_ERR_GET(rx_pkt_tlvs); 721 722 return decrypt_err; 723 } 724 725 /** 726 * hal_rx_tlv_mic_err_get(): API to get the MIC ERR 727 * from rx_tlv TLV 728 * 729 * @buf: pointer to the start of RX PKT TLV headers 730 * Return: uint32_t(mic_err) 731 */ 732 static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf) 733 { 734 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 735 uint32_t mic_err; 736 737 mic_err = HAL_RX_TLV_MIC_ERR_GET(rx_pkt_tlvs); 738 739 return mic_err; 740 } 741 742 /** 743 * hal_get_reo_ent_desc_qdesc_addr_be(): API to get qdesc address of reo 744 * entrance ring desc 745 * 746 * @desc: reo entrance ring descriptor 747 * Return: qdesc adrress 748 */ 749 static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc) 750 { 751 return desc + REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET; 752 } 753 754 /** 755 * hal_rx_get_qdesc_addr_be(): API to get qdesc address of reo 756 * entrance ring desc 757 * 758 * @dst_ring_desc: reo dest ring descriptor (used for Lithium DP) 759 * @buf: pointer to the start of RX PKT TLV headers 760 * Return: qdesc adrress in reo destination ring buffer 761 */ 762 static inline uint64_t hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc, 763 uint8_t *buf) 764 { 765 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 766 767 return (uint64_t)HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(rx_pkt_tlvs); 768 } 769 770 /** 771 * hal_set_reo_ent_desc_reo_dest_ind_be(): API to set reo destination 772 * indication of reo entrance ring desc 773 * 774 * @desc: reo ent ring descriptor 775 * @dst_ind: reo destination indication value 776 * Return: None 777 */ 778 static inline void 779 hal_set_reo_ent_desc_reo_dest_ind_be(uint8_t *desc, uint32_t dst_ind) 780 { 781 HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING, 782 REO_DESTINATION_INDICATION, dst_ind); 783 } 784 785 /** 786 * hal_rx_mpdu_sequence_number_get() - Get mpdu sequence number 787 * @buf: pointer to packet buffer 788 * 789 * Return: mpdu sequence 790 */ 791 static inline int hal_rx_mpdu_sequence_number_get_be(uint8_t *buf) 792 { 793 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 794 795 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 796 } 797 798 /** 799 * hal_rx_msdu_packet_metadata_get(): API to get the 800 * msdu information from rx_msdu_end TLV 801 * 802 * @ buf: pointer to the start of RX PKT TLV headers 803 * @ hal_rx_msdu_metadata: pointer to the msdu info structure 804 */ 805 static inline void 806 hal_rx_msdu_packet_metadata_get_generic_be(uint8_t *buf, 807 void *pkt_msdu_metadata) 808 { 809 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 810 struct hal_rx_msdu_metadata *msdu_metadata = 811 (struct hal_rx_msdu_metadata *)pkt_msdu_metadata; 812 813 msdu_metadata->l3_hdr_pad = 814 HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 815 msdu_metadata->sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 816 msdu_metadata->da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 817 msdu_metadata->sa_sw_peer_id = 818 HAL_RX_TLV_SA_SW_PEER_ID_GET(rx_pkt_tlvs); 819 } 820 821 /* 822 * hal_rx_msdu_start_nss_get_kiwi(): API to get the NSS 823 * Interval from rx_msdu_start 824 * 825 * @buf: pointer to the start of RX PKT TLV header 826 * Return: uint32_t(nss) 827 */ 828 static inline uint32_t hal_rx_tlv_nss_get_be(uint8_t *buf) 829 { 830 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 831 uint8_t mimo_ss_bitmap; 832 833 mimo_ss_bitmap = HAL_RX_TLV_MIMO_SS_BITMAP(rx_pkt_tlvs); 834 835 return qdf_get_hweight8(mimo_ss_bitmap); 836 } 837 838 #ifdef GET_MSDU_AGGREGATION 839 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)\ 840 {\ 841 bool first_msdu, last_msdu; \ 842 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_desc);\ 843 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_desc);\ 844 if (first_msdu && last_msdu)\ 845 rs->rs_flags &= (~IEEE80211_AMSDU_FLAG);\ 846 else\ 847 rs->rs_flags |= (IEEE80211_AMSDU_FLAG); \ 848 } \ 849 850 #define HAL_RX_SET_MSDU_AGGREGATION((rs_mpdu), (rs_ppdu))\ 851 {\ 852 if (rs_mpdu->rs_flags & IEEE80211_AMSDU_FLAG)\ 853 rs_ppdu->rs_flags |= IEEE80211_AMSDU_FLAG;\ 854 } \ 855 856 #else 857 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs) 858 #define HAL_RX_SET_MSDU_AGGREGATION(rs_mpdu, rs_ppdu) 859 #endif 860 861 /** 862 * hal_rx_mon_hw_desc_get_mpdu_status_be(): Retrieve MPDU status 863 * 864 * @ hw_desc_addr: Start address of Rx HW TLVs 865 * @ rs: Status for monitor mode 866 * 867 * Return: void 868 */ 869 static inline void 870 hal_rx_mon_hw_desc_get_mpdu_status_be(void *hw_desc_addr, 871 struct mon_rx_status *rs) 872 { 873 uint32_t reg_value; 874 struct rx_pkt_tlvs *rx_desc = 875 (struct rx_pkt_tlvs *)hw_desc_addr; 876 const uint32_t sgi_hw_to_cdp[] = { 877 CDP_SGI_0_8_US, 878 CDP_SGI_0_4_US, 879 CDP_SGI_1_6_US, 880 CDP_SGI_3_2_US, 881 }; 882 883 HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs); 884 885 rs->ant_signal_db = HAL_RX_TLV_ANT_SIGNAL_DB_GET(rx_desc); 886 rs->is_stbc = HAL_RX_TLV_STBC_GET(rx_desc); 887 888 reg_value = HAL_RX_TLV_SGI_GET(rx_desc); 889 rs->sgi = sgi_hw_to_cdp[reg_value]; 890 891 reg_value = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_desc); 892 rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0; 893 /* TODO: rs->beamformed should be set for SU beamforming also */ 894 } 895 896 static inline uint32_t hal_rx_tlv_tid_get_be(uint8_t *buf) 897 { 898 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 899 uint32_t tid; 900 901 tid = HAL_RX_TLV_TID_GET(rx_pkt_tlvs); 902 903 return tid; 904 } 905 906 /* 907 * hal_rx_tlv_reception_type_get(): API to get the reception type 908 * Interval from rx_msdu_start 909 * 910 * @buf: pointer to the start of RX PKT TLV header 911 * Return: uint32_t(reception_type) 912 */ 913 static inline 914 uint32_t hal_rx_tlv_reception_type_get_be(uint8_t *buf) 915 { 916 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 917 uint32_t reception_type; 918 919 reception_type = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_pkt_tlvs); 920 921 return reception_type; 922 } 923 924 /** 925 * hal_rx_msdu_end_da_idx_get_be: API to get da_idx 926 * from rx_msdu_end TLV 927 * 928 * @ buf: pointer to the start of RX PKT TLV headers 929 * Return: da index 930 */ 931 static inline uint16_t hal_rx_msdu_end_da_idx_get_be(uint8_t *buf) 932 { 933 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 934 uint16_t da_idx; 935 936 da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 937 938 return da_idx; 939 } 940 941 /** 942 * hal_rx_get_rx_fragment_number_be(): Function to retrieve rx fragment number 943 * 944 * @nbuf: Network buffer 945 * Returns: rx fragment number 946 */ 947 static inline 948 uint8_t hal_rx_get_rx_fragment_number_be(uint8_t *buf) 949 { 950 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 951 952 /* Return first 4 bits as fragment number */ 953 return (HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs) & 954 DOT11_SEQ_FRAG_MASK); 955 } 956 957 /** 958 * hal_rx_msdu_end_da_is_mcbc_get_be(): API to check if pkt is MCBC 959 * from rx_msdu_end TLV 960 * 961 * @ buf: pointer to the start of RX PKT TLV headers 962 * Return: da_is_mcbc 963 */ 964 static inline uint8_t 965 hal_rx_tlv_da_is_mcbc_get_be(uint8_t *buf) 966 { 967 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 968 969 return HAL_RX_TLV_DA_IS_MCBC_GET(rx_pkt_tlvs); 970 } 971 972 /** 973 * hal_rx_tlv_is_tkip_mic_err_get_be(): API to get tkip Mic error 974 * from rx_msdu_end TLV 975 * 976 * @ buf: pointer to the start of RX PKT TLV headers 977 * Return: tkip_mic_err 978 */ 979 static inline uint8_t 980 hal_rx_tlv_is_tkip_mic_err_get_be(uint8_t *buf) 981 { 982 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 983 984 return HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(rx_pkt_tlvs); 985 } 986 987 /** 988 * hal_rx_tlvd_sa_is_valid_get_be(): API to get the sa_is_valid bit from 989 * rx_msdu_end TLV 990 * 991 * @ buf: pointer to the start of RX PKT TLV headers 992 * Return: sa_is_valid bit 993 */ 994 static inline uint8_t 995 hal_rx_tlv_sa_is_valid_get_be(uint8_t *buf) 996 { 997 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 998 uint8_t sa_is_valid; 999 1000 sa_is_valid = HAL_RX_TLV_SA_IS_VALID_GET(rx_pkt_tlvs); 1001 1002 return sa_is_valid; 1003 } 1004 1005 /** 1006 * hal_rx_tlv_sa_idx_get_be(): API to get the sa_idx from rx_msdu_end TLV 1007 * 1008 * @ buf: pointer to the start of RX PKT TLV headers 1009 * Return: sa_idx (SA AST index) 1010 */ 1011 static inline 1012 uint16_t hal_rx_tlv_sa_idx_get_be(uint8_t *buf) 1013 { 1014 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1015 uint16_t sa_idx; 1016 1017 sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 1018 1019 return sa_idx; 1020 } 1021 1022 /** 1023 * hal_rx_desc_is_first_msdu_be() - Check if first msdu 1024 * 1025 * @hal_soc_hdl: hal_soc handle 1026 * @hw_desc_addr: hardware descriptor address 1027 * 1028 * Return: 0 - success/ non-zero failure 1029 */ 1030 static inline uint32_t hal_rx_desc_is_first_msdu_be(void *hw_desc_addr) 1031 { 1032 struct rx_pkt_tlvs *rx_pkt_tlvs = 1033 (struct rx_pkt_tlvs *)hw_desc_addr; 1034 1035 return HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 1036 } 1037 1038 /** 1039 * hal_rx_tlv_l3_hdr_padding_get_be(): API to get the l3_header padding 1040 * from rx_msdu_end TLV 1041 * 1042 * @ buf: pointer to the start of RX PKT TLV headers 1043 * Return: number of l3 header padding bytes 1044 */ 1045 static inline uint32_t hal_rx_tlv_l3_hdr_padding_get_be(uint8_t *buf) 1046 { 1047 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1048 uint32_t l3_header_padding; 1049 1050 l3_header_padding = HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 1051 1052 return l3_header_padding; 1053 } 1054 1055 /* 1056 * @ hal_rx_encryption_info_valid_be: Returns encryption type. 1057 * 1058 * @ buf: rx_tlv_hdr of the received packet 1059 * @ Return: encryption type 1060 */ 1061 static inline uint32_t hal_rx_encryption_info_valid_be(uint8_t *buf) 1062 { 1063 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1064 uint32_t encryption_info = 1065 HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(rx_pkt_tlvs); 1066 1067 return encryption_info; 1068 } 1069 1070 /* 1071 * @ hal_rx_print_pn_be: Prints the PN of rx packet. 1072 * 1073 * @ buf: rx_tlv_hdr of the received packet 1074 * @ Return: void 1075 */ 1076 static inline void hal_rx_print_pn_be(uint8_t *buf) 1077 { 1078 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1079 1080 uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 1081 uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs); 1082 uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 1083 uint32_t pn_127_96 = HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs); 1084 1085 hal_debug_rl("PN number pn_127_96 0x%x pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x ", 1086 pn_127_96, pn_95_64, pn_63_32, pn_31_0); 1087 } 1088 1089 static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num) 1090 { 1091 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1092 1093 pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 1094 pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs) << 32); 1095 1096 pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 1097 pn_num[1] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs) << 32); 1098 } 1099 1100 /** 1101 * hal_rx_tlv_first_msdu_get_be: API to get first msdu status 1102 * from rx_msdu_end TLV 1103 * 1104 * @ buf: pointer to the start of RX PKT TLV headers 1105 * Return: first_msdu 1106 */ 1107 static inline uint8_t hal_rx_tlv_first_msdu_get_be(uint8_t *buf) 1108 { 1109 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1110 uint8_t first_msdu; 1111 1112 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 1113 1114 return first_msdu; 1115 } 1116 1117 /** 1118 * hal_rx_tlv_da_is_valid_get_be: API to check if da is valid 1119 * from rx_msdu_end TLV 1120 * 1121 * @ buf: pointer to the start of RX PKT TLV headers 1122 * Return: da_is_valid 1123 */ 1124 static inline uint8_t hal_rx_tlv_da_is_valid_get_be(uint8_t *buf) 1125 { 1126 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1127 uint8_t da_is_valid; 1128 1129 da_is_valid = HAL_RX_TLV_DA_IS_VALID_GET(rx_pkt_tlvs); 1130 1131 return da_is_valid; 1132 } 1133 1134 /** 1135 * hal_rx_tlv_last_msdu_get_be: API to get last msdu status 1136 * from rx_msdu_end TLV 1137 * 1138 * @ buf: pointer to the start of RX PKT TLV headers 1139 * Return: last_msdu 1140 */ 1141 static inline uint8_t hal_rx_tlv_last_msdu_get_be(uint8_t *buf) 1142 { 1143 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1144 uint8_t last_msdu; 1145 1146 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_pkt_tlvs); 1147 1148 return last_msdu; 1149 } 1150 1151 /* 1152 * hal_rx_get_mpdu_mac_ad4_valid_be(): Retrieves if mpdu 4th addr is valid 1153 * 1154 * @nbuf: Network buffer 1155 * Returns: value of mpdu 4th address valid field 1156 */ 1157 static inline bool hal_rx_get_mpdu_mac_ad4_valid_be(uint8_t *buf) 1158 { 1159 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1160 bool ad4_valid = 0; 1161 1162 ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs); 1163 1164 return ad4_valid; 1165 } 1166 1167 /** 1168 * hal_rx_mpdu_start_sw_peer_id_get_be: Retrieve sw peer_id 1169 * @buf: network buffer 1170 * 1171 * Return: sw peer_id 1172 */ 1173 static inline uint32_t hal_rx_mpdu_start_sw_peer_id_get_be(uint8_t *buf) 1174 { 1175 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1176 1177 return HAL_RX_TLV_SW_PEER_ID_GET(rx_pkt_tlvs); 1178 } 1179 1180 /** 1181 * hal_rx_mpdu_get_to_ds_be(): API to get the tods info 1182 * from rx_mpdu_start 1183 * 1184 * @buf: pointer to the start of RX PKT TLV header 1185 * Return: uint32_t(to_ds) 1186 */ 1187 static inline uint32_t hal_rx_mpdu_get_to_ds_be(uint8_t *buf) 1188 { 1189 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1190 1191 return HAL_RX_TLV_MPDU_GET_TODS(rx_pkt_tlvs); 1192 } 1193 1194 /* 1195 * hal_rx_mpdu_get_fr_ds_be(): API to get the from ds info 1196 * from rx_mpdu_start 1197 * 1198 * @buf: pointer to the start of RX PKT TLV header 1199 * Return: uint32_t(fr_ds) 1200 */ 1201 static inline uint32_t hal_rx_mpdu_get_fr_ds_be(uint8_t *buf) 1202 { 1203 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1204 1205 return HAL_RX_TLV_MPDU_GET_FROMDS(rx_pkt_tlvs); 1206 } 1207 1208 /* 1209 * hal_rx_get_mpdu_frame_control_valid_be(): Retrieves mpdu 1210 * frame control valid 1211 * 1212 * @nbuf: Network buffer 1213 * Returns: value of frame control valid field 1214 */ 1215 static inline uint8_t hal_rx_get_mpdu_frame_control_valid_be(uint8_t *buf) 1216 { 1217 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1218 1219 return HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(rx_pkt_tlvs); 1220 } 1221 1222 /* 1223 * hal_rx_mpdu_get_addr1_be(): API to check get address1 of the mpdu 1224 * 1225 * @buf: pointer to the start of RX PKT TLV headera 1226 * @mac_addr: pointer to mac address 1227 * Return: success/failure 1228 */ 1229 static inline QDF_STATUS hal_rx_mpdu_get_addr1_be(uint8_t *buf, 1230 uint8_t *mac_addr) 1231 { 1232 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1233 struct __attribute__((__packed__)) hal_addr1 { 1234 uint32_t ad1_31_0; 1235 uint16_t ad1_47_32; 1236 }; 1237 struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr; 1238 uint32_t mac_addr_ad1_valid; 1239 1240 mac_addr_ad1_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(rx_pkt_tlvs); 1241 1242 if (mac_addr_ad1_valid) { 1243 addr->ad1_31_0 = HAL_RX_TLV_MPDU_AD1_31_0_GET(rx_pkt_tlvs); 1244 addr->ad1_47_32 = HAL_RX_TLV_MPDU_AD1_47_32_GET(rx_pkt_tlvs); 1245 return QDF_STATUS_SUCCESS; 1246 } 1247 1248 return QDF_STATUS_E_FAILURE; 1249 } 1250 1251 /* 1252 * hal_rx_mpdu_get_addr2_be(): API to check get address2 of the mpdu 1253 * in the packet 1254 * 1255 * @buf: pointer to the start of RX PKT TLV header 1256 * @mac_addr: pointer to mac address 1257 * Return: success/failure 1258 */ 1259 static inline QDF_STATUS hal_rx_mpdu_get_addr2_be(uint8_t *buf, 1260 uint8_t *mac_addr) 1261 { 1262 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1263 struct __attribute__((__packed__)) hal_addr2 { 1264 uint16_t ad2_15_0; 1265 uint32_t ad2_47_16; 1266 }; 1267 struct hal_addr2 *addr = (struct hal_addr2 *)mac_addr; 1268 uint32_t mac_addr_ad2_valid; 1269 1270 mac_addr_ad2_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1271 1272 if (mac_addr_ad2_valid) { 1273 addr->ad2_15_0 = HAL_RX_TLV_MPDU_AD2_15_0_GET(rx_pkt_tlvs); 1274 addr->ad2_47_16 = HAL_RX_TLV_MPDU_AD2_47_16_GET(rx_pkt_tlvs); 1275 return QDF_STATUS_SUCCESS; 1276 } 1277 1278 return QDF_STATUS_E_FAILURE; 1279 } 1280 1281 /* 1282 * hal_rx_mpdu_get_addr3_be(): API to get address3 of the mpdu 1283 * in the packet 1284 * 1285 * @buf: pointer to the start of RX PKT TLV header 1286 * @mac_addr: pointer to mac address 1287 * Return: success/failure 1288 */ 1289 static inline QDF_STATUS hal_rx_mpdu_get_addr3_be(uint8_t *buf, 1290 uint8_t *mac_addr) 1291 { 1292 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1293 struct __attribute__((__packed__)) hal_addr3 { 1294 uint32_t ad3_31_0; 1295 uint16_t ad3_47_32; 1296 }; 1297 struct hal_addr3 *addr = (struct hal_addr3 *)mac_addr; 1298 uint32_t mac_addr_ad3_valid; 1299 1300 mac_addr_ad3_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(rx_pkt_tlvs); 1301 1302 if (mac_addr_ad3_valid) { 1303 addr->ad3_31_0 = HAL_RX_TLV_MPDU_AD3_31_0_GET(rx_pkt_tlvs); 1304 addr->ad3_47_32 = HAL_RX_TLV_MPDU_AD3_47_32_GET(rx_pkt_tlvs); 1305 return QDF_STATUS_SUCCESS; 1306 } 1307 1308 return QDF_STATUS_E_FAILURE; 1309 } 1310 1311 /* 1312 * hal_rx_mpdu_get_addr4_be(): API to get address4 of the mpdu 1313 * in the packet 1314 * 1315 * @buf: pointer to the start of RX PKT TLV header 1316 * @mac_addr: pointer to mac address 1317 * Return: success/failure 1318 */ 1319 static inline QDF_STATUS hal_rx_mpdu_get_addr4_be(uint8_t *buf, 1320 uint8_t *mac_addr) 1321 { 1322 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1323 struct __attribute__((__packed__)) hal_addr4 { 1324 uint32_t ad4_31_0; 1325 uint16_t ad4_47_32; 1326 }; 1327 struct hal_addr4 *addr = (struct hal_addr4 *)mac_addr; 1328 uint32_t mac_addr_ad4_valid; 1329 1330 mac_addr_ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs); 1331 1332 if (mac_addr_ad4_valid) { 1333 addr->ad4_31_0 = HAL_RX_TLV_MPDU_AD4_31_0_GET(rx_pkt_tlvs); 1334 addr->ad4_47_32 = HAL_RX_TLV_MPDU_AD4_47_32_GET(rx_pkt_tlvs); 1335 return QDF_STATUS_SUCCESS; 1336 } 1337 1338 return QDF_STATUS_E_FAILURE; 1339 } 1340 1341 /* 1342 * hal_rx_get_mpdu_sequence_control_valid_be(): Get mpdu 1343 * sequence control valid 1344 * 1345 * @nbuf: Network buffer 1346 * Returns: value of sequence control valid field 1347 */ 1348 static inline uint8_t hal_rx_get_mpdu_sequence_control_valid_be(uint8_t *buf) 1349 { 1350 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1351 1352 return HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_pkt_tlvs); 1353 } 1354 1355 /** 1356 * hal_rx_tid_get_be: get tid based on qos control valid. 1357 * @hal_soc_hdl: hal_soc handle 1358 * @ buf: pointer to rx pkt TLV. 1359 * 1360 * Return: tid 1361 */ 1362 static inline uint32_t hal_rx_tid_get_be(hal_soc_handle_t hal_soc_hdl, 1363 uint8_t *buf) 1364 { 1365 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1366 uint8_t qos_control_valid = 1367 HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(rx_pkt_tlvs); 1368 1369 if (qos_control_valid) 1370 return hal_rx_tlv_tid_get_be(buf); 1371 1372 return HAL_RX_NON_QOS_TID; 1373 } 1374 1375 static inline 1376 uint8_t hal_rx_get_fc_valid_be(uint8_t *buf) 1377 { 1378 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1379 1380 return HAL_RX_TLV_GET_FC_VALID(rx_pkt_tlvs); 1381 } 1382 1383 static inline uint8_t hal_rx_get_to_ds_flag_be(uint8_t *buf) 1384 { 1385 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1386 1387 return HAL_RX_TLV_GET_TO_DS_FLAG(rx_pkt_tlvs); 1388 } 1389 1390 static inline uint8_t hal_rx_get_mac_addr2_valid_be(uint8_t *buf) 1391 { 1392 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1393 1394 return HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1395 } 1396 1397 /** 1398 * hal_rx_is_unicast_be: check packet is unicast frame or not. 1399 * 1400 * @ buf: pointer to rx pkt TLV. 1401 * Return: true on unicast. 1402 */ 1403 static inline bool hal_rx_is_unicast_be(uint8_t *buf) 1404 { 1405 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1406 uint32_t grp_id; 1407 1408 grp_id = HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(rx_pkt_tlvs); 1409 1410 return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false; 1411 } 1412 1413 static inline uint8_t hal_rx_get_filter_category_be(uint8_t *buf) 1414 { 1415 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1416 1417 return HAL_RX_GET_FILTER_CATEGORY(rx_pkt_tlvs); 1418 } 1419 1420 /** 1421 * hal_rx_hw_desc_get_ppduid_get_be(): retrieve ppdu id 1422 * @rx_tlv_hdr: start address of rx_pkt_tlvs 1423 * @rxdma_dst_ring_desc: Rx HW descriptor 1424 * 1425 * Return: ppdu id 1426 */ 1427 static inline uint32_t 1428 hal_rx_hw_desc_get_ppduid_get_be(void *rx_tlv_hdr, void *rxdma_dst_ring_desc) 1429 { 1430 struct rx_pkt_tlvs *rx_pkt_tlvs = 1431 (struct rx_pkt_tlvs *)rx_tlv_hdr; 1432 1433 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 1434 } 1435 1436 static inline uint32_t 1437 hal_rx_get_ppdu_id_be(uint8_t *buf) 1438 { 1439 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1440 1441 return HAL_RX_GET_PPDU_ID(rx_pkt_tlvs); 1442 } 1443 1444 /** 1445 * hal_rx_msdu_flow_idx_get_be: API to get flow index 1446 * from rx_msdu_end TLV 1447 * @buf: pointer to the start of RX PKT TLV headers 1448 * 1449 * Return: flow index value from MSDU END TLV 1450 */ 1451 static inline uint32_t hal_rx_msdu_flow_idx_get_be(uint8_t *buf) 1452 { 1453 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1454 1455 return HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 1456 } 1457 1458 /** 1459 * hal_rx_msdu_get_reo_destination_indication_be: API to get 1460 * reo_destination_indication from rx_msdu_end TLV 1461 * @buf: pointer to the start of RX PKT TLV headers 1462 * @reo_destination_indication: pointer to return value of 1463 * reo_destination_indication 1464 * 1465 * Return: none 1466 */ 1467 static inline void 1468 hal_rx_msdu_get_reo_destination_indication_be(uint8_t *buf, 1469 uint32_t *reo_destination_indication) 1470 { 1471 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1472 1473 *reo_destination_indication = HAL_RX_TLV_REO_DEST_IND_GET(pkt_tlvs); 1474 } 1475 1476 /** 1477 * hal_rx_msdu_flow_idx_invalid_be: API to get flow index invalid 1478 * from rx_msdu_end TLV 1479 * @buf: pointer to the start of RX PKT TLV headers 1480 * 1481 * Return: flow index invalid value from MSDU END TLV 1482 */ 1483 static inline bool hal_rx_msdu_flow_idx_invalid_be(uint8_t *buf) 1484 { 1485 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1486 1487 return HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 1488 } 1489 1490 /** 1491 * hal_rx_msdu_flow_idx_timeout_be: API to get flow index timeout 1492 * from rx_msdu_end TLV 1493 * @buf: pointer to the start of RX PKT TLV headers 1494 * 1495 * Return: flow index timeout value from MSDU END TLV 1496 */ 1497 static inline bool hal_rx_msdu_flow_idx_timeout_be(uint8_t *buf) 1498 { 1499 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1500 1501 return HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 1502 } 1503 1504 /** 1505 * hal_rx_msdu_fse_metadata_get_be: API to get FSE metadata 1506 * from rx_msdu_end TLV 1507 * @buf: pointer to the start of RX PKT TLV headers 1508 * 1509 * Return: fse metadata value from MSDU END TLV 1510 */ 1511 static inline uint32_t hal_rx_msdu_fse_metadata_get_be(uint8_t *buf) 1512 { 1513 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1514 1515 return HAL_RX_TLV_FSE_METADATA_GET(pkt_tlvs); 1516 } 1517 1518 /** 1519 * hal_rx_msdu_cce_metadata_get_be: API to get CCE metadata 1520 * from rx_msdu_end TLV 1521 * @buf: pointer to the start of RX PKT TLV headers 1522 * 1523 * Return: cce_metadata 1524 */ 1525 static inline uint16_t 1526 hal_rx_msdu_cce_metadata_get_be(uint8_t *buf) 1527 { 1528 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1529 1530 return HAL_RX_TLV_CCE_METADATA_GET(pkt_tlvs); 1531 } 1532 1533 /** 1534 * hal_rx_msdu_get_flow_params_be: API to get flow index, flow index invalid 1535 * and flow index timeout from rx_msdu_end TLV 1536 * @buf: pointer to the start of RX PKT TLV headers 1537 * @flow_invalid: pointer to return value of flow_idx_valid 1538 * @flow_timeout: pointer to return value of flow_idx_timeout 1539 * @flow_index: pointer to return value of flow_idx 1540 * 1541 * Return: none 1542 */ 1543 static inline void 1544 hal_rx_msdu_get_flow_params_be(uint8_t *buf, 1545 bool *flow_invalid, 1546 bool *flow_timeout, 1547 uint32_t *flow_index) 1548 { 1549 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1550 1551 *flow_invalid = HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 1552 *flow_timeout = HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 1553 *flow_index = HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 1554 } 1555 1556 /** 1557 * hal_rx_tlv_get_tcp_chksum_be() - API to get tcp checksum 1558 * @buf: rx_tlv_hdr 1559 * 1560 * Return: tcp checksum 1561 */ 1562 static inline uint16_t 1563 hal_rx_tlv_get_tcp_chksum_be(uint8_t *buf) 1564 { 1565 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1566 1567 return HAL_RX_TLV_GET_TCP_CHKSUM(rx_pkt_tlvs); 1568 } 1569 1570 /** 1571 * hal_rx_get_rx_sequence_be(): Function to retrieve rx sequence number 1572 * 1573 * @nbuf: Network buffer 1574 * Returns: rx sequence number 1575 */ 1576 static inline 1577 uint16_t hal_rx_get_rx_sequence_be(uint8_t *buf) 1578 { 1579 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1580 1581 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 1582 } 1583 1584 #ifdef RECEIVE_OFFLOAD 1585 #ifdef QCA_WIFI_KIWI_V2 1586 static inline 1587 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf) 1588 { 1589 /* 1590 * cumulative l4 checksum is not supported in V2 and 1591 * cumulative_l4_checksum field is not present 1592 */ 1593 return 0; 1594 } 1595 #else 1596 /** 1597 * hal_rx_get_fisa_cumulative_l4_checksum_be() - Retrieve cumulative 1598 * checksum 1599 * @buf: buffer pointer 1600 * 1601 * Return: cumulative checksum 1602 */ 1603 static inline 1604 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf) 1605 { 1606 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1607 1608 return HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(rx_pkt_tlvs); 1609 } 1610 #endif 1611 1612 /** 1613 * hal_rx_get_fisa_cumulative_ip_length_be() - Retrieve cumulative 1614 * ip length 1615 * @buf: buffer pointer 1616 * 1617 * Return: cumulative length 1618 */ 1619 static inline 1620 uint16_t hal_rx_get_fisa_cumulative_ip_length_be(uint8_t *buf) 1621 { 1622 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1623 1624 return HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(rx_pkt_tlvs); 1625 } 1626 1627 /** 1628 * hal_rx_get_udp_proto_be() - Retrieve udp proto value 1629 * @buf: buffer 1630 * 1631 * Return: udp proto bit 1632 */ 1633 static inline 1634 bool hal_rx_get_udp_proto_be(uint8_t *buf) 1635 { 1636 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1637 1638 return HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 1639 } 1640 #endif 1641 1642 /** 1643 * hal_rx_get_flow_agg_continuation_be() - retrieve flow agg 1644 * continuation 1645 * @buf: buffer 1646 * 1647 * Return: flow agg 1648 */ 1649 static inline 1650 bool hal_rx_get_flow_agg_continuation_be(uint8_t *buf) 1651 { 1652 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1653 1654 return HAL_RX_TLV_GET_FLOW_AGGR_CONT(rx_pkt_tlvs); 1655 } 1656 1657 /** 1658 * hal_rx_get_flow_agg_count_be()- Retrieve flow agg count 1659 * @buf: buffer 1660 * 1661 * Return: flow agg count 1662 */ 1663 static inline 1664 uint8_t hal_rx_get_flow_agg_count_be(uint8_t *buf) 1665 { 1666 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1667 1668 return HAL_RX_TLV_GET_FLOW_AGGR_COUNT(rx_pkt_tlvs); 1669 } 1670 1671 /** 1672 * hal_rx_get_fisa_timeout_be() - Retrieve fisa timeout 1673 * @buf: buffer 1674 * 1675 * Return: fisa timeout 1676 */ 1677 static inline 1678 bool hal_rx_get_fisa_timeout_be(uint8_t *buf) 1679 { 1680 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1681 1682 return HAL_RX_TLV_GET_FISA_TIMEOUT(rx_pkt_tlvs); 1683 } 1684 1685 /** 1686 * hal_rx_mpdu_start_tlv_tag_valid_be () - API to check if RX_MPDU_START 1687 * tlv tag is valid 1688 * 1689 *@rx_tlv_hdr: start address of rx_pkt_tlvs 1690 * 1691 * Return: true if RX_MPDU_START is valied, else false. 1692 */ 1693 static inline uint8_t hal_rx_mpdu_start_tlv_tag_valid_be(void *rx_tlv_hdr) 1694 { 1695 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)rx_tlv_hdr; 1696 uint32_t tlv_tag; 1697 1698 tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(&rx_desc->mpdu_start_tlv); 1699 1700 return tlv_tag == WIFIRX_MPDU_START_E ? true : false; 1701 } 1702 1703 /** 1704 * hal_rx_msdu_end_offset_get_generic(): API to get the 1705 * msdu_end structure offset rx_pkt_tlv structure 1706 * 1707 * NOTE: API returns offset of msdu_end TLV from structure 1708 * rx_pkt_tlvs 1709 */ 1710 static inline uint32_t hal_rx_msdu_end_offset_get_generic(void) 1711 { 1712 return RX_PKT_TLV_OFFSET(msdu_end_tlv); 1713 } 1714 1715 /** 1716 * hal_rx_mpdu_start_offset_get_generic(): API to get the 1717 * mpdu_start structure offset rx_pkt_tlv structure 1718 * 1719 * NOTE: API returns offset of attn TLV from structure 1720 * rx_pkt_tlvs 1721 */ 1722 static inline uint32_t hal_rx_mpdu_start_offset_get_generic(void) 1723 { 1724 return RX_PKT_TLV_OFFSET(mpdu_start_tlv); 1725 } 1726 1727 #ifndef NO_RX_PKT_HDR_TLV 1728 static inline uint32_t hal_rx_pkt_tlv_offset_get_generic(void) 1729 { 1730 return RX_PKT_TLV_OFFSET(pkt_hdr_tlv); 1731 } 1732 #endif 1733 1734 #ifdef RECEIVE_OFFLOAD 1735 static inline int 1736 hal_rx_tlv_get_offload_info_be(uint8_t *rx_tlv, 1737 struct hal_offload_info *offload_info) 1738 { 1739 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)rx_tlv; 1740 1741 offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_pkt_tlvs); 1742 offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_pkt_tlvs); 1743 offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 1744 offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs); 1745 1746 if (offload_info->tcp_proto) { 1747 offload_info->tcp_pure_ack = 1748 HAL_RX_TLV_GET_TCP_PURE_ACK(rx_pkt_tlvs); 1749 offload_info->tcp_offset = 1750 HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 1751 offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_pkt_tlvs); 1752 offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_pkt_tlvs); 1753 offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_pkt_tlvs); 1754 } 1755 return 0; 1756 } 1757 1758 static inline int hal_rx_get_proto_params_be(uint8_t *buf, void *proto_params) 1759 { 1760 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1761 struct hal_proto_params *param = 1762 (struct hal_proto_params *)proto_params; 1763 1764 param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs); 1765 param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 1766 param->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 1767 1768 return 0; 1769 } 1770 1771 static inline int hal_rx_get_l3_l4_offsets_be(uint8_t *buf, 1772 uint32_t *l3_hdr_offset, 1773 uint32_t *l4_hdr_offset) 1774 { 1775 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1776 1777 *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(rx_pkt_tlvs); 1778 *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 1779 1780 return 0; 1781 } 1782 #endif 1783 1784 /** 1785 * hal_rx_msdu_start_msdu_len_get(): API to get the MSDU length 1786 * from rx_msdu_start TLV 1787 * 1788 * @ buf: pointer to the start of RX PKT TLV headers 1789 * Return: msdu length 1790 */ 1791 static inline uint32_t hal_rx_msdu_start_msdu_len_get_be(uint8_t *buf) 1792 { 1793 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1794 uint32_t msdu_len; 1795 1796 msdu_len = HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 1797 1798 return msdu_len; 1799 } 1800 1801 /** 1802 * hal_rx_get_frame_ctrl_field(): Function to retrieve frame control field 1803 * 1804 * @nbuf: Network buffer 1805 * Returns: rx more fragment bit 1806 * 1807 */ 1808 static inline uint16_t hal_rx_get_frame_ctrl_field_be(uint8_t *buf) 1809 { 1810 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1811 uint16_t frame_ctrl = 0; 1812 1813 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_pkt_tlvs); 1814 1815 return frame_ctrl; 1816 } 1817 1818 /* 1819 * hal_rx_tlv_get_is_decrypted_be(): API to get the decrypt status of the 1820 * packet from msdu_end 1821 * 1822 * @buf: pointer to the start of RX PKT TLV header 1823 * Return: uint32_t(decryt status) 1824 */ 1825 static inline uint32_t hal_rx_tlv_get_is_decrypted_be(uint8_t *buf) 1826 { 1827 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1828 uint32_t is_decrypt = 0; 1829 uint32_t decrypt_status; 1830 1831 decrypt_status = HAL_RX_TLV_DECRYPT_STATUS_GET(rx_pkt_tlvs); 1832 1833 if (!decrypt_status) 1834 is_decrypt = 1; 1835 1836 return is_decrypt; 1837 } 1838 1839 //TODO - Currently going with NO-PKT-HDR, need to add pkt hdr tlv and check 1840 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf) 1841 { 1842 return buf + RX_PKT_TLVS_LEN; 1843 } 1844 1845 /** 1846 * hal_rx_priv_info_set_in_tlv_be(): Save the private info to 1847 * the reserved bytes of rx_tlv_hdr 1848 * @buf: start of rx_tlv_hdr 1849 * @priv_data: hal_wbm_err_desc_info structure 1850 * @len: length of the private data 1851 * Return: void 1852 */ 1853 static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf, 1854 uint8_t *priv_data, 1855 uint32_t len) 1856 { 1857 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1858 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1859 RX_BE_PADDING0_BYTES : len; 1860 1861 qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len); 1862 } 1863 1864 /** 1865 * hal_rx_priv_info_get_from_tlv_be(): retrieve the private data from 1866 * the reserved bytes of rx_tlv_hdr. 1867 * @buf: start of rx_tlv_hdr 1868 * @priv_data: Handle to get the private data, output parameter. 1869 * @len: length of the private data 1870 * Return: void 1871 */ 1872 static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf, 1873 uint8_t *priv_data, 1874 uint32_t len) 1875 { 1876 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1877 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1878 RX_BE_PADDING0_BYTES : len; 1879 1880 qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len); 1881 } 1882 1883 /** 1884 * hal_rx_tlv_csum_err_get_be() - Get IP and tcp-udp checksum fail flag 1885 * @rx_tlv_hdr: start address of rx_tlv_hdr 1886 * @ip_csum_err: buffer to return ip_csum_fail flag 1887 * @tcp_udp_csum_fail: placeholder to return tcp-udp checksum fail flag 1888 * 1889 * Return: None 1890 */ 1891 static inline void 1892 hal_rx_tlv_csum_err_get_be(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err, 1893 uint32_t *tcp_udp_csum_err) 1894 { 1895 struct rx_pkt_tlvs *rx_pkt_tlvs = 1896 (struct rx_pkt_tlvs *)rx_tlv_hdr; 1897 1898 *ip_csum_err = HAL_RX_TLV_IP_CSUM_FAIL_GET(rx_pkt_tlvs); 1899 *tcp_udp_csum_err = HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(rx_pkt_tlvs); 1900 } 1901 1902 static inline 1903 uint32_t hal_rx_tlv_mpdu_len_err_get_be(void *hw_desc_addr) 1904 { 1905 struct rx_pkt_tlvs *rx_pkt_tlvs = 1906 (struct rx_pkt_tlvs *)hw_desc_addr; 1907 1908 return HAL_RX_TLV_MPDU_LEN_ERR_GET(rx_pkt_tlvs); 1909 } 1910 1911 static inline 1912 uint32_t hal_rx_tlv_mpdu_fcs_err_get_be(void *hw_desc_addr) 1913 { 1914 struct rx_pkt_tlvs *rx_pkt_tlvs = 1915 (struct rx_pkt_tlvs *)hw_desc_addr; 1916 1917 return HAL_RX_TLV_MPDU_FCS_ERR_GET(rx_pkt_tlvs); 1918 } 1919 1920 /** 1921 * hal_rx_get_rx_more_frag_bit(): Function to retrieve more fragment bit 1922 * 1923 * @nbuf: Network buffer 1924 * Returns: rx more fragment bit 1925 */ 1926 static inline 1927 uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf) 1928 { 1929 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1930 uint16_t frame_ctrl = 0; 1931 1932 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(pkt_tlvs) >> 1933 DOT11_FC1_MORE_FRAG_OFFSET; 1934 1935 /* more fragment bit if at offset bit 4 */ 1936 return frame_ctrl; 1937 } 1938 1939 /* 1940 * hal_rx_msdu_is_wlan_mcast_generic_be(): Check if the buffer is for multicast 1941 * address 1942 * @nbuf: Network buffer 1943 * 1944 * Returns: flag to indicate whether the nbuf has MC/BC address 1945 */ 1946 static inline uint32_t hal_rx_msdu_is_wlan_mcast_generic_be(qdf_nbuf_t nbuf) 1947 { 1948 uint8_t *buf = qdf_nbuf_data(nbuf); 1949 1950 return HAL_RX_TLV_IS_MCAST_GET(buf);; 1951 } 1952 1953 /** 1954 * hal_rx_msdu_start_msdu_len_set_be(): API to set the MSDU length 1955 * from rx_msdu_start TLV 1956 * 1957 * @buf: pointer to the start of RX PKT TLV headers 1958 * @len: msdu length 1959 * 1960 * Return: none 1961 */ 1962 static inline void 1963 hal_rx_msdu_start_msdu_len_set_be(uint8_t *buf, uint32_t len) 1964 { 1965 HAL_RX_TLV_MSDU_LEN_GET(buf) = len; 1966 } 1967 1968 /** 1969 * hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(): 1970 * Retrieve qos control valid bit from the tlv. 1971 * @buf: pointer to rx pkt TLV. 1972 * 1973 * Return: qos control value. 1974 */ 1975 static inline uint32_t 1976 hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(uint8_t *buf) 1977 { 1978 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1979 1980 return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(pkt_tlvs); 1981 } 1982 1983 /** 1984 * hal_rx_msdu_end_sa_sw_peer_id_get_be(): API to get the 1985 * sa_sw_peer_id from rx_msdu_end TLV 1986 * @buf: pointer to the start of RX PKT TLV headers 1987 * 1988 * Return: sa_sw_peer_id index 1989 */ 1990 static inline uint32_t 1991 hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t *buf) 1992 { 1993 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1994 1995 hal_rx_msdu_end_t *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; 1996 1997 return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end); 1998 } 1999 2000 /** 2001 * hal_rx_tlv_l3_type_get_be(): API to get the l3 type 2002 * from rx_msdu_start TLV 2003 * 2004 * @buf: pointer to the start of RX PKT TLV headers 2005 * Return: uint32_t(l3 type) 2006 */ 2007 static inline uint32_t hal_rx_tlv_l3_type_get_be(uint8_t *buf) 2008 { 2009 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2010 2011 return HAL_RX_TLV_L3_TYPE_GET(rx_pkt_tlvs); 2012 } 2013 #endif /* _HAL_BE_RX_TLV_H_ */ 2014