1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _HAL_BE_RX_TLV_H_ 21 #define _HAL_BE_RX_TLV_H_ 22 23 #include "hal_api_mon.h" 24 25 /* 26 * Structures & Macros to obtain fields from the TLV's in the Rx packet 27 * pre-header. 28 */ 29 30 #ifdef CONFIG_4_BYTES_TLV_TAG 31 #define TLV_TAG_T uint32_t 32 #else 33 #define TLV_TAG_T uint64_t 34 #endif 35 36 #define HAL_RX_BE_PKT_HDR_TLV_LEN 112 37 38 struct rx_pkt_hdr_tlv { 39 TLV_TAG_T tag; /* TLV_TAG_T B */ 40 uint64_t phy_ppdu_id; /* 8 B */ 41 char rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; /* 112 B */ 42 }; 43 44 #ifdef CONFIG_WORD_BASED_TLV 45 #ifndef BIG_ENDIAN_HOST 46 struct rx_msdu_end_compact { 47 uint32_t sa_sw_peer_id : 16, 48 sa_idx_timeout : 1, 49 da_idx_timeout : 1, 50 to_ds : 1, 51 tid : 4, 52 sa_is_valid : 1, 53 da_is_valid : 1, 54 da_is_mcbc : 1, 55 l3_header_padding : 2, 56 first_msdu : 1, 57 last_msdu : 1, 58 fr_ds : 1, 59 ip_chksum_fail_copy : 1; 60 uint32_t sa_idx : 16, 61 da_idx_or_sw_peer_id : 16; 62 uint32_t msdu_drop : 1, 63 reo_destination_indication : 5, 64 flow_idx : 20, 65 use_ppe : 1, 66 mesh_sta : 2, 67 vlan_ctag_stripped : 1, 68 vlan_stag_stripped : 1, 69 fragment_flag : 1; 70 uint32_t fse_metadata : 32; 71 uint32_t cce_metadata : 16, 72 tcp_udp_chksum : 16; 73 uint32_t aggregation_count : 8, 74 flow_aggregation_continuation : 1, 75 fisa_timeout : 1, 76 tcp_udp_chksum_fail_copy : 1, 77 msdu_limit_error : 1, 78 flow_idx_timeout : 1, 79 flow_idx_invalid : 1, 80 cce_match : 1, 81 amsdu_parser_error : 1, 82 cumulative_ip_length : 16; 83 uint32_t key_id_octet : 8, 84 reserved_8a : 24; 85 uint32_t reserved_9a : 6, 86 service_code : 9, 87 priority_valid : 1, 88 intra_bss : 1, 89 dest_chip_id : 2, 90 multicast_echo : 1, 91 wds_learning_event : 1, 92 wds_roaming_event : 1, 93 wds_keep_alive_event : 1, 94 dest_chip_pmac_id : 1, 95 reserved_9b : 8; 96 uint32_t msdu_length : 14, 97 stbc : 1, 98 ipsec_esp : 1, 99 l3_offset : 7, 100 ipsec_ah : 1, 101 l4_offset : 8; 102 uint32_t msdu_number : 8, 103 decap_format : 2, 104 ipv4_proto : 1, 105 ipv6_proto : 1, 106 tcp_proto : 1, 107 udp_proto : 1, 108 ip_frag : 1, 109 tcp_only_ack : 1, 110 da_is_bcast_mcast : 1, 111 toeplitz_hash_sel : 2, 112 ip_fixed_header_valid : 1, 113 ip_extn_header_valid : 1, 114 tcp_udp_header_valid : 1, 115 mesh_control_present : 1, 116 ldpc : 1, 117 ip4_protocol_ip6_next_header : 8; 118 uint32_t vlan_ctag_ci : 16, 119 vlan_stag_ci : 16; 120 uint32_t peer_meta_data : 32; 121 uint32_t user_rssi : 8, 122 pkt_type : 4, 123 sgi : 2, 124 rate_mcs : 4, 125 receive_bandwidth : 3, 126 reception_type : 3, 127 mimo_ss_bitmap : 7, 128 msdu_done_copy : 1; 129 uint32_t flow_id_toeplitz : 32; 130 uint32_t ppdu_start_timestamp_63_32; 131 uint32_t sw_phy_meta_data : 32; 132 uint32_t first_mpdu : 1, 133 reserved_16a : 1, 134 mcast_bcast : 1, 135 ast_index_not_found : 1, 136 ast_index_timeout : 1, 137 power_mgmt : 1, 138 non_qos : 1, 139 null_data : 1, 140 mgmt_type : 1, 141 ctrl_type : 1, 142 more_data : 1, 143 eosp : 1, 144 a_msdu_error : 1, 145 reserved_16b : 1, 146 order : 1, 147 wifi_parser_error : 1, 148 overflow_err : 1, 149 msdu_length_err : 1, 150 tcp_udp_chksum_fail : 1, 151 ip_chksum_fail : 1, 152 sa_idx_invalid : 1, 153 da_idx_invalid : 1, 154 amsdu_addr_mismatch : 1, 155 rx_in_tx_decrypt_byp : 1, 156 encrypt_required : 1, 157 directed : 1, 158 buffer_fragment : 1, 159 mpdu_length_err : 1, 160 tkip_mic_err : 1, 161 decrypt_err : 1, 162 unencrypted_frame_err : 1, 163 fcs_err : 1; 164 uint32_t reserved_17a : 10, 165 decrypt_status_code : 3, 166 rx_bitmap_not_updated : 1, 167 reserved_17b : 17, 168 msdu_done : 1; 169 }; 170 171 struct rx_mpdu_start_compact { 172 uint32_t rx_reo_queue_desc_addr_39_32 : 8, 173 receive_queue_number : 16, 174 pre_delim_err_warning : 1, 175 first_delim_err : 1, 176 reserved_0 : 6; 177 uint32_t pn_31_0 : 32; 178 uint32_t pn_63_32 : 32; 179 uint32_t pn_95_64 : 32; 180 uint32_t ast_index : 16, 181 sw_peer_id : 16; 182 uint32_t mpdu_frame_control_valid : 1, 183 mpdu_duration_valid : 1, 184 mac_addr_ad1_valid : 1, 185 mac_addr_ad2_valid : 1, 186 mac_addr_ad3_valid : 1, 187 mac_addr_ad4_valid : 1, 188 mpdu_sequence_control_valid : 1, 189 mpdu_qos_control_valid : 1, 190 mpdu_ht_control_valid : 1, 191 frame_encryption_info_valid : 1, 192 mpdu_fragment_number : 4, 193 more_fragment_flag : 1, 194 reserved_7a : 1, 195 fr_ds : 1, 196 to_ds : 1, 197 encrypted : 1, 198 mpdu_retry : 1, 199 mpdu_sequence_number : 12; 200 uint32_t mpdu_frame_control_field : 16, 201 mpdu_duration_field : 16; 202 uint32_t mac_addr_ad1_31_0 : 32; 203 uint32_t mac_addr_ad1_47_32 : 16, 204 mac_addr_ad2_15_0 : 16; 205 uint32_t mac_addr_ad2_47_16 : 32; 206 uint32_t mac_addr_ad3_31_0 : 32; 207 uint32_t mac_addr_ad3_47_32 : 16, 208 mpdu_sequence_control_field : 16; 209 }; 210 #else 211 struct rx_msdu_end_compact { 212 uint32_t ip_chksum_fail_copy : 1, 213 fr_ds : 1, 214 last_msdu : 1, 215 first_msdu : 1, 216 l3_header_padding : 2, 217 da_is_mcbc : 1, 218 da_is_valid : 1, 219 sa_is_valid : 1, 220 tid : 4, 221 to_ds : 1, 222 da_idx_timeout : 1, 223 sa_idx_timeout : 1, 224 sa_sw_peer_id : 16; 225 uint32_t da_idx_or_sw_peer_id : 16, 226 sa_idx : 16; 227 uint32_t fragment_flag : 1, 228 vlan_stag_stripped : 1, 229 vlan_ctag_stripped : 1, 230 mesh_sta : 2, 231 use_ppe : 1, 232 flow_idx : 20, 233 reo_destination_indication : 5, 234 msdu_drop : 1; 235 uint32_t fse_metadata : 32; 236 uint32_t tcp_udp_chksum : 16, 237 cce_metadata : 16; 238 uint32_t cumulative_ip_length : 16, 239 amsdu_parser_error : 1, 240 cce_match : 1, 241 flow_idx_invalid : 1, 242 flow_idx_timeout : 1, 243 msdu_limit_error : 1, 244 tcp_udp_chksum_fail_copy : 1, 245 fisa_timeout : 1, 246 flow_aggregation_continuation : 1, 247 aggregation_count : 8; 248 uint32_t reserved_8a : 24, 249 key_id_octet : 8; 250 uint32_t reserved_9b : 8, 251 dest_chip_pmac_id : 1, 252 wds_keep_alive_event : 1, 253 wds_roaming_event : 1, 254 wds_learning_event : 1, 255 multicast_echo : 1, 256 dest_chip_id : 2, 257 intra_bss : 1, 258 priority_valid : 1, 259 service_code : 9, 260 reserved_9a : 6; 261 uint32_t l4_offset : 8, 262 ipsec_ah : 1, 263 l3_offset : 7, 264 ipsec_esp : 1, 265 stbc : 1, 266 msdu_length : 14; 267 uint32_t ip4_protocol_ip6_next_header : 8, 268 ldpc : 1, 269 mesh_control_present : 1, 270 tcp_udp_header_valid : 1, 271 ip_extn_header_valid : 1, 272 ip_fixed_header_valid : 1, 273 toeplitz_hash_sel : 2, 274 da_is_bcast_mcast : 1, 275 tcp_only_ack : 1, 276 ip_frag : 1, 277 udp_proto : 1, 278 tcp_proto : 1, 279 ipv6_proto : 1, 280 ipv4_proto : 1, 281 decap_format : 2, 282 msdu_number : 8; 283 uint32_t vlan_stag_ci : 16, 284 vlan_ctag_ci : 16; 285 uint32_t peer_meta_data : 32; 286 uint32_t msdu_done_copy : 1, 287 mimo_ss_bitmap : 7, 288 reception_type : 3, 289 receive_bandwidth : 3, 290 rate_mcs : 4, 291 sgi : 2, 292 pkt_type : 4, 293 user_rssi : 8; 294 uint32_t flow_id_toeplitz : 32; 295 uint32_t ppdu_start_timestamp_63_32; 296 uint32_t sw_phy_meta_data : 32; 297 uint32_t fcs_err : 1, 298 unencrypted_frame_err : 1, 299 decrypt_err : 1, 300 tkip_mic_err : 1, 301 mpdu_length_err : 1, 302 buffer_fragment : 1, 303 directed : 1, 304 encrypt_required : 1, 305 rx_in_tx_decrypt_byp : 1, 306 amsdu_addr_mismatch : 1, 307 da_idx_invalid : 1, 308 sa_idx_invalid : 1, 309 ip_chksum_fail : 1, 310 tcp_udp_chksum_fail : 1, 311 msdu_length_err : 1, 312 overflow_err : 1, 313 wifi_parser_error : 1, 314 order : 1, 315 reserved_16b : 1, 316 a_msdu_error : 1, 317 eosp : 1, 318 more_data : 1, 319 ctrl_type : 1, 320 mgmt_type : 1, 321 null_data : 1, 322 non_qos : 1, 323 power_mgmt : 1, 324 ast_index_timeout : 1, 325 ast_index_not_found : 1, 326 mcast_bcast : 1, 327 reserved_16a : 1, 328 first_mpdu : 1; 329 uint32_t msdu_done : 1, 330 reserved_17b : 17, 331 rx_bitmap_not_updated : 1, 332 decrypt_status_code : 3, 333 reserved_17a : 10; 334 }; 335 336 struct rx_mpdu_start_compact { 337 uint32_t reserved_0 : 6, 338 first_delim_err : 1, 339 pre_delim_err_warning : 1, 340 receive_queue_number : 16, 341 rx_reo_queue_desc_addr_39_32 : 8; 342 uint32_t pn_31_0 : 32; 343 uint32_t pn_63_32 : 32; 344 uint32_t pn_95_64 : 32; 345 uint32_t sw_peer_id : 16, 346 ast_index : 16; 347 uint32_t mpdu_sequence_number : 12, 348 mpdu_retry : 1, 349 encrypted : 1, 350 to_ds : 1, 351 fr_ds : 1, 352 reserved_7a : 1, 353 more_fragment_flag : 1, 354 mpdu_fragment_number : 4, 355 frame_encryption_info_valid : 1, 356 mpdu_ht_control_valid : 1, 357 mpdu_qos_control_valid : 1, 358 mpdu_sequence_control_valid : 1, 359 mac_addr_ad4_valid : 1, 360 mac_addr_ad3_valid : 1, 361 mac_addr_ad2_valid : 1, 362 mac_addr_ad1_valid : 1, 363 mpdu_duration_valid : 1, 364 mpdu_frame_control_valid : 1; 365 uint32_t mpdu_duration_field : 16, 366 mpdu_frame_control_field : 16; 367 uint32_t mac_addr_ad1_31_0 : 32; 368 uint32_t mac_addr_ad2_15_0 : 16, 369 mac_addr_ad1_47_32 : 16; 370 uint32_t mac_addr_ad2_47_16 : 32; 371 uint32_t mac_addr_ad3_31_0 : 32; 372 uint32_t mpdu_sequence_control_field : 16, 373 mac_addr_ad3_47_32 : 16; 374 }; 375 #endif 376 #define RX_BE_PADDING0_BYTES 4 377 378 typedef struct rx_mpdu_start_compact hal_rx_mpdu_start_t; 379 typedef struct rx_msdu_end_compact hal_rx_msdu_end_t; 380 381 struct rx_mpdu_start_tlv { 382 hal_rx_mpdu_start_t rx_mpdu_start; 383 }; 384 385 struct rx_msdu_end_tlv { 386 TLV_TAG_T tag; /* TLV_TAG_T B */ 387 hal_rx_msdu_end_t rx_msdu_end; 388 }; 389 390 struct rx_pkt_tlvs { 391 struct rx_msdu_end_tlv msdu_end_tlv; /* 80 bytes */ 392 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 48 bytes */ 393 }; 394 395 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 396 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 397 398 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 399 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 400 rx_mpdu_start) 401 402 #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \ 403 HAL_RX_MSDU_END(_rx_pkt_tlv).tid 404 405 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 406 HAL_RX_MSDU_END(_rx_pkt_tlv).first_mpdu 407 #else /* CONFIG_WORD_BASED_TLV */ 408 typedef struct rx_mpdu_start hal_rx_mpdu_start_t; 409 typedef struct rx_msdu_end hal_rx_msdu_end_t; 410 411 #define RX_BE_PADDING0_BYTES 8 412 /* 413 * Each RX descriptor TLV is preceded by sizeof TLV_TAG_T "tag" 414 */ 415 416 #ifndef CONFIG_NO_TLV_TAGS 417 struct rx_mpdu_start_tlv { 418 TLV_TAG_T tag; 419 hal_rx_mpdu_start_t rx_mpdu_start; 420 }; 421 422 struct rx_msdu_end_tlv { 423 TLV_TAG_T tag; 424 hal_rx_msdu_end_t rx_msdu_end; 425 }; 426 427 struct rx_pkt_tlvs { 428 struct rx_msdu_end_tlv msdu_end_tlv; /* 128 + TLV_TAG_T bytes */ 429 uint8_t rx_padding0[RX_BE_PADDING0_BYTES];/* 8 bytes */ 430 struct rx_mpdu_start_tlv mpdu_start_tlv;/* 120 + TLV_TAG_T bytes */ 431 #ifndef NO_RX_PKT_HDR_TLV 432 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 433 #endif 434 }; 435 436 #else 437 struct rx_mpdu_start_tlv { 438 hal_rx_mpdu_start_t rx_mpdu_start; 439 }; 440 441 struct rx_msdu_end_tlv { 442 hal_rx_msdu_end_t rx_msdu_end; 443 }; 444 445 struct rx_pkt_tlvs { 446 struct rx_msdu_end_tlv msdu_end_tlv; /* 128 bytes */ 447 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */ 448 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */ 449 #ifndef NO_RX_PKT_HDR_TLV 450 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 451 #endif 452 }; 453 #endif /*CONFIG_NO_TLV_TAGS */ 454 455 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 456 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 457 458 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 459 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 460 rx_mpdu_start.rx_mpdu_info_details) 461 462 #define HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(_rx_pkt_tlv) \ 463 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_31_0 464 465 #define HAL_RX_TLV_AMPDU_FLAG_GET(_rx_pkt_tlv) \ 466 HAL_RX_MPDU_START(_rx_pkt_tlv).ampdu_flag 467 468 #define HAL_RX_TLV_MPDU_PN_127_96_GET(_rx_pkt_tlv) \ 469 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_127_96 470 471 #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \ 472 HAL_RX_MPDU_START(_rx_pkt_tlv).tid 473 474 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 475 HAL_RX_MPDU_START(_rx_pkt_tlv).first_mpdu 476 477 #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \ 478 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type 479 480 #define HAL_RX_GET_PPDU_ID(_rx_pkt_tlv) \ 481 HAL_RX_MPDU_START(_rx_pkt_tlv).phy_ppdu_id 482 483 #define HAL_RX_TLV_PHY_PPDU_ID_GET(_rx_pkt_tlv) \ 484 HAL_RX_MSDU_END(_rx_pkt_tlv).phy_ppdu_id 485 486 #define HAL_RX_GET_FILTER_CATEGORY(_rx_pkt_tlv) \ 487 HAL_RX_MPDU_START(_rx_pkt_tlv).rxpcu_mpdu_filter_in_category 488 489 #define HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(_rx_pkt_tlv) \ 490 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_frame_group_id 491 492 #endif /* CONFIG_WORD_BASED_TLV */ 493 494 /** 495 * struct rx_mon_pkt_tlvs - RX packet data structure for DEST ring in the 496 * monitor mode. 497 * @msdu_end_tlv: MSDU end TLV 498 * @rx_padding0: Padding bytes 499 * @mpdu_start_tlv: MPDU start TLV 500 * @pkt_hdr_tlv: 802.11 packet header TLV 501 */ 502 struct rx_mon_pkt_tlvs { 503 struct rx_msdu_end_tlv msdu_end_tlv; /* 128B + sizeof(tag) */ 504 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8B */ 505 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120B + sizeof(tag) */ 506 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 120B + sizeof(tag) */ 507 }; 508 509 #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs) 510 #define SIZE_OF_MON_DATA_RX_TLV sizeof(struct rx_mon_pkt_tlvs) 511 512 #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV 513 #define MON_RX_PKT_TLVS_LEN SIZE_OF_MON_DATA_RX_TLV 514 515 #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field) 516 517 #define HAL_RX_TLV_MSDU_DONE_GET(_rx_pkt_tlv) \ 518 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_done 519 520 #define HAL_RX_TLV_DECAP_FORMAT_GET(_rx_pkt_tlv) \ 521 HAL_RX_MSDU_END(_rx_pkt_tlv).decap_format 522 523 #ifdef RECEIVE_OFFLOAD 524 #define HAL_RX_TLV_GET_TCP_PURE_ACK(_rx_pkt_tlv) \ 525 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_only_ack 526 527 #define HAL_RX_TLV_GET_TCP_PROTO(_rx_pkt_tlv) \ 528 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_proto 529 530 #define HAL_RX_TLV_GET_UDP_PROTO(_rx_pkt_tlv) \ 531 HAL_RX_MSDU_END(_rx_pkt_tlv).udp_proto 532 533 #define HAL_RX_TLV_GET_IPV6(_rx_pkt_tlv) \ 534 HAL_RX_MSDU_END(_rx_pkt_tlv).ipv6_proto 535 536 #define HAL_RX_TLV_GET_IP_OFFSET(_rx_pkt_tlv) \ 537 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_offset 538 539 #define HAL_RX_TLV_GET_TCP_OFFSET(_rx_pkt_tlv) \ 540 HAL_RX_MSDU_END(_rx_pkt_tlv).l4_offset 541 #endif /* RECEIVE_OFFLOAD */ 542 543 #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(_rx_pkt_tlv) \ 544 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 545 546 #define HAL_RX_TLV_MSDU_LEN_GET(_rx_pkt_tlv) \ 547 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_length 548 549 #define HAL_RX_TLV_CCE_MATCH_GET(_rx_pkt_tlv) \ 550 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_match 551 552 #define HAL_RX_TLV_BW_GET(_rx_pkt_tlv) \ 553 HAL_RX_MSDU_END(_rx_pkt_tlv).receive_bandwidth 554 555 #define HAL_RX_TLV_FLOWID_TOEPLITZ_GET(_rx_pkt_tlv) \ 556 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 557 558 #define HAL_RX_TLV_SGI_GET(_rx_pkt_tlv) \ 559 HAL_RX_MSDU_END(_rx_pkt_tlv).sgi 560 561 #define HAL_RX_TLV_RATE_MCS_GET(_rx_pkt_tlv) \ 562 HAL_RX_MSDU_END(_rx_pkt_tlv).rate_mcs 563 564 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 565 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 566 567 #define HAL_RX_TLV_RSSI_GET(_rx_pkt_tlv) \ 568 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 569 570 #define HAL_RX_TLV_FREQ_GET(_rx_pkt_tlv) \ 571 HAL_RX_MSDU_END(_rx_pkt_tlv).sw_phy_meta_data 572 573 #define HAL_RX_TLV_PKT_TYPE_GET(_rx_pkt_tlv) \ 574 HAL_RX_MSDU_END(_rx_pkt_tlv).pkt_type 575 576 #define HAL_RX_TLV_DECRYPT_ERR_GET(_rx_pkt_tlv) \ 577 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_err 578 579 #define HAL_RX_TLV_MIC_ERR_GET(_rx_pkt_tlv) \ 580 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err 581 582 #define HAL_RX_TLV_MIMO_SS_BITMAP(_rx_pkt_tlv)\ 583 HAL_RX_MSDU_END(_rx_pkt_tlv).mimo_ss_bitmap 584 585 #define HAL_RX_TLV_ANT_SIGNAL_DB_GET(_rx_pkt_tlv) \ 586 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 587 588 #define HAL_RX_TLV_STBC_GET(_rx_pkt_tlv) \ 589 HAL_RX_MSDU_END(_rx_pkt_tlv).stbc 590 591 #define HAL_RX_TLV_RECEPTION_TYPE_GET(_rx_pkt_tlv) \ 592 HAL_RX_MSDU_END(_rx_pkt_tlv).reception_type 593 594 #define HAL_RX_TLV_IP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 595 HAL_RX_MSDU_END(_rx_pkt_tlv).ip_chksum_fail 596 597 #define HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 598 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum_fail 599 600 #define HAL_RX_TLV_MPDU_LEN_ERR_GET(_rx_pkt_tlv) \ 601 HAL_RX_MSDU_END(_rx_pkt_tlv).mpdu_length_err 602 603 #define HAL_RX_TLV_MPDU_FCS_ERR_GET(_rx_pkt_tlv) \ 604 HAL_RX_MSDU_END(_rx_pkt_tlv).fcs_err 605 606 #define HAL_RX_TLV_IS_MCAST_GET(_rx_pkt_tlv) \ 607 HAL_RX_MSDU_END(_rx_pkt_tlv).mcast_bcast 608 609 #ifdef RECEIVE_OFFLOAD 610 /* 611 * LRO information needed from the TLVs 612 */ 613 #define HAL_RX_TLV_GET_LRO_ELIGIBLE(_rx_pkt_tlv) \ 614 HAL_RX_MSDU_END(_rx_pkt_tlv).lro_eligible 615 616 #define HAL_RX_TLV_GET_TCP_ACK(_rx_pkt_tlv) \ 617 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_ack_number 618 619 #define HAL_RX_TLV_GET_TCP_SEQ(_rx_pkt_tlv) \ 620 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_seq_number 621 622 #define HAL_RX_TLV_GET_TCP_WIN(_rx_pkt_tlv) \ 623 HAL_RX_MSDU_END(_rx_pkt_tlv).window_size 624 #endif 625 626 #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \ 627 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type 628 629 #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET 630 #define HAL_RX_TLV_MSDU_PEER_META_DATA_GET(_rx_pkt_tlv) \ 631 HAL_RX_MSDU_END(_rx_pkt_tlv).peer_meta_data 632 #endif 633 634 #define HAL_RX_TLV_PEER_META_DATA_GET(_rx_pkt_tlv) \ 635 HAL_RX_MPDU_START(_rx_pkt_tlv).peer_meta_data 636 637 #define HAL_RX_TLV_KEYID_OCTET_GET(_rx_pkt_tlv) \ 638 HAL_RX_MSDU_END(_rx_pkt_tlv).key_id_octet 639 640 #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(_rx_pkt_tlv) \ 641 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_number 642 643 #define HAL_RX_TLV_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 644 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 645 646 #define HAL_RX_TLV_L3_HEADER_PADDING_GET(_rx_pkt_tlv) \ 647 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_header_padding 648 649 #define HAL_RX_TLV_SA_IDX_GET(_rx_pkt_tlv) \ 650 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_idx 651 652 #define HAL_RX_TLV_DA_IDX_GET(_rx_pkt_tlv) \ 653 HAL_RX_MSDU_END(_rx_pkt_tlv).da_idx_or_sw_peer_id 654 655 #define HAL_RX_TLV_FIRST_MSDU_GET(_rx_pkt_tlv) \ 656 HAL_RX_MSDU_END(_rx_pkt_tlv).first_msdu 657 658 #define HAL_RX_TLV_LAST_MSDU_GET(_rx_pkt_tlv) \ 659 HAL_RX_MSDU_END(_rx_pkt_tlv).last_msdu 660 661 #define HAL_RX_TLV_DA_IS_MCBC_GET(_rx_pkt_tlv) \ 662 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_mcbc 663 664 #define HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(_rx_pkt_tlv) \ 665 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err 666 667 #define HAL_RX_TLV_SA_IS_VALID_GET(_rx_pkt_tlv) \ 668 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_is_valid 669 670 #define HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(_rx_pkt_tlv) \ 671 HAL_RX_MPDU_START(_rx_pkt_tlv).frame_encryption_info_valid 672 673 #define HAL_RX_TLV_MPDU_PN_31_0_GET(_rx_pkt_tlv) \ 674 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_31_0 675 676 #define HAL_RX_TLV_MPDU_PN_63_32_GET(_rx_pkt_tlv) \ 677 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_63_32 678 679 #define HAL_RX_TLV_MPDU_PN_95_64_GET(_rx_pkt_tlv) \ 680 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_95_64 681 682 #define HAL_RX_TLV_DA_IS_VALID_GET(_rx_pkt_tlv) \ 683 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_valid 684 685 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_pkt_tlv) \ 686 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_valid 687 688 #define HAL_RX_TLV_SW_PEER_ID_GET(_rx_pkt_tlv) \ 689 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_peer_id 690 691 #define HAL_RX_TLV_MPDU_GET_TODS(_rx_pkt_tlv) \ 692 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 693 694 #define HAL_RX_TLV_MPDU_GET_FROMDS(_rx_pkt_tlv) \ 695 HAL_RX_MPDU_START(_rx_pkt_tlv).fr_ds 696 697 #define HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(_rx_pkt_tlv) \ 698 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 699 700 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_pkt_tlv) \ 701 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_valid 702 703 #define HAL_RX_TLV_MPDU_AD1_31_0_GET(_rx_pkt_tlv) \ 704 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_31_0 705 706 #define HAL_RX_TLV_MPDU_AD1_47_32_GET(_rx_pkt_tlv) \ 707 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_47_32 708 709 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_pkt_tlv) \ 710 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_valid 711 712 #define HAL_RX_TLV_MPDU_AD2_15_0_GET(_rx_pkt_tlv) \ 713 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_15_0 714 715 #define HAL_RX_TLV_MPDU_AD2_47_16_GET(_rx_pkt_tlv) \ 716 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_47_16 717 718 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_pkt_tlv) \ 719 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_valid 720 721 #define HAL_RX_TLV_MPDU_AD3_31_0_GET(_rx_pkt_tlv) \ 722 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_31_0 723 724 #define HAL_RX_TLV_MPDU_AD3_47_32_GET(_rx_pkt_tlv) \ 725 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_47_32 726 727 #define HAL_RX_TLV_MPDU_AD4_31_0_GET(_rx_pkt_tlv) \ 728 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_31_0 729 730 #define HAL_RX_TLV_MPDU_AD4_47_32_GET(_rx_pkt_tlv) \ 731 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_47_32 732 733 #define HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_pkt_tlv) \ 734 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_control_valid 735 736 #define HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 737 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 738 739 #define HAL_RX_TLV_GET_FC_VALID(_rx_pkt_tlv) \ 740 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 741 742 #define HAL_RX_TLV_GET_TO_DS_FLAG(_rx_pkt_tlv) \ 743 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 744 745 #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_pkt_tlv) \ 746 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_field 747 748 #define HAL_RX_TLV_FLOW_IDX_GET(_rx_pkt_tlv) \ 749 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx 750 751 #define HAL_RX_TLV_REO_DEST_IND_GET(_rx_pkt_tlv) \ 752 HAL_RX_MSDU_END(_rx_pkt_tlv).reo_destination_indication 753 754 #define HAL_RX_TLV_FLOW_IDX_INVALID_GET(_rx_pkt_tlv) \ 755 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_invalid 756 757 #define HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(_rx_pkt_tlv) \ 758 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_timeout 759 760 #define HAL_RX_TLV_FSE_METADATA_GET(_rx_pkt_tlv) \ 761 HAL_RX_MSDU_END(_rx_pkt_tlv).fse_metadata 762 763 #define HAL_RX_TLV_CCE_METADATA_GET(_rx_pkt_tlv) \ 764 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_metadata 765 766 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 767 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 768 769 #define HAL_RX_TLV_GET_TCP_CHKSUM(_rx_pkt_tlv) \ 770 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum 771 772 #define HAL_RX_TLV_GET_FLOW_AGGR_CONT(_rx_pkt_tlv) \ 773 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_aggregation_continuation 774 775 #define HAL_RX_TLV_GET_FLOW_AGGR_COUNT(_rx_pkt_tlv) \ 776 HAL_RX_MSDU_END(_rx_pkt_tlv).aggregation_count 777 778 #define HAL_RX_TLV_GET_FISA_TIMEOUT(_rx_pkt_tlv) \ 779 HAL_RX_MSDU_END(_rx_pkt_tlv).fisa_timeout 780 781 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(_rx_pkt_tlv) \ 782 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_l4_checksum 783 784 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(_rx_pkt_tlv) \ 785 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_ip_length 786 787 #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 788 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 789 790 #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 791 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 792 793 #define HAL_RX_REO_QUEUE_DESC_ADDR_39_32_GET(_rx_pkt_tlv) \ 794 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_39_32 795 796 /* used by monitor mode for parsing from full TLV */ 797 #define HAL_RX_MON_GET_FC_VALID(_rx_mpdu_start) \ 798 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MPDU_FRAME_CONTROL_VALID) 799 800 #define HAL_RX_MON_GET_TO_DS_FLAG(_rx_mpdu_start) \ 801 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, TO_DS) 802 803 #define HAL_RX_MON_GET_MAC_ADDR2_VALID(_rx_mpdu_start) \ 804 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MAC_ADDR_AD2_VALID) 805 806 static inline 807 uint32_t hal_rx_tlv_decap_format_get_be(void *hw_desc_addr) 808 { 809 struct rx_pkt_tlvs *rx_pkt_tlvs = 810 (struct rx_pkt_tlvs *)hw_desc_addr; 811 812 return HAL_RX_TLV_DECAP_FORMAT_GET(rx_pkt_tlvs); 813 } 814 815 static inline uint32_t hal_rx_tlv_msdu_done_get_be(uint8_t *buf) 816 { 817 return HAL_RX_TLV_MSDU_DONE_GET(buf); 818 } 819 820 /** 821 * hal_rx_tlv_first_mpdu_get_be() - get first_mpdu bit from rx attention 822 * @buf: pointer to rx_pkt_tlvs 823 * 824 * Return: uint32_t(first_msdu) 825 */ 826 static inline uint32_t hal_rx_tlv_first_mpdu_get_be(uint8_t *buf) 827 { 828 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 829 830 return HAL_RX_TLV_FIRST_MPDU_GET(rx_pkt_tlvs); 831 } 832 833 /** 834 * hal_rx_msdu_cce_match_get_be() - get CCE match bit from rx attention 835 * @buf: pointer to rx_pkt_tlvs 836 * 837 * Return: CCE match value 838 */ 839 static inline bool hal_rx_msdu_cce_match_get_be(uint8_t *buf) 840 { 841 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 842 843 return HAL_RX_TLV_CCE_MATCH_GET(rx_pkt_tlvs); 844 } 845 846 #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET 847 /* 848 * Get peer_meta_data from RX_MSDU_END 849 */ 850 851 static inline uint32_t hal_rx_msdu_peer_meta_data_get_be(uint8_t *buf) 852 { 853 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 854 855 return HAL_RX_TLV_MSDU_PEER_META_DATA_GET(rx_pkt_tlvs); 856 } 857 #endif 858 859 /** 860 * hal_rx_mpdu_get_addr1_be() - API to check get address1 of the mpdu 861 * @buf: pointer to the start of RX PKT TLV headera 862 * @mac_addr: pointer to mac address 863 * 864 * Return: success/failure 865 */ 866 static inline QDF_STATUS hal_rx_mpdu_get_addr1_be(uint8_t *buf, 867 uint8_t *mac_addr) 868 { 869 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 870 struct __attribute__((__packed__)) hal_addr1 { 871 uint32_t ad1_31_0; 872 uint16_t ad1_47_32; 873 }; 874 struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr; 875 uint32_t mac_addr_ad1_valid; 876 877 mac_addr_ad1_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET( 878 rx_pkt_tlvs); 879 880 if (mac_addr_ad1_valid) { 881 addr->ad1_31_0 = HAL_RX_TLV_MPDU_AD1_31_0_GET(rx_pkt_tlvs); 882 addr->ad1_47_32 = HAL_RX_TLV_MPDU_AD1_47_32_GET(rx_pkt_tlvs); 883 return QDF_STATUS_SUCCESS; 884 } 885 886 return QDF_STATUS_E_FAILURE; 887 } 888 889 #ifndef CONFIG_WORD_BASED_TLV 890 /** 891 * hal_rx_mpdu_info_ampdu_flag_get_be() - get ampdu flag bit 892 * from rx mpdu info 893 * @buf: pointer to rx_pkt_tlvs 894 * 895 * Return: ampdu flag 896 */ 897 static inline bool hal_rx_mpdu_info_ampdu_flag_get_be(uint8_t *buf) 898 { 899 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 900 901 return !!HAL_RX_TLV_AMPDU_FLAG_GET(rx_pkt_tlvs); 902 } 903 904 /** 905 * hal_rx_get_qdesc_addr_be() - API to get qdesc address of reo 906 * entrance ring desc 907 * 908 * @dst_ring_desc: reo dest ring descriptor (used for Lithium DP) 909 * @buf: pointer to the start of RX PKT TLV headers 910 * Return: qdesc address in reo destination ring buffer 911 */ 912 static inline uint64_t hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc, 913 uint8_t *buf) 914 { 915 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 916 917 return (uint64_t)HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(rx_pkt_tlvs); 918 } 919 920 /** 921 * hal_rx_print_pn_be() - Prints the PN of rx packet. 922 * @buf: rx_tlv_hdr of the received packet 923 * 924 * Return: void 925 */ 926 static inline void hal_rx_print_pn_be(uint8_t *buf) 927 { 928 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 929 930 uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 931 uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs); 932 uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 933 uint32_t pn_127_96 = HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs); 934 935 hal_debug("PN number pn_127_96 0x%x pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x", 936 pn_127_96, pn_95_64, pn_63_32, pn_31_0); 937 } 938 939 static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num) 940 { 941 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 942 943 pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(pkt_tlvs); 944 pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(pkt_tlvs) << 32); 945 946 pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(pkt_tlvs); 947 pn_num[1] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_127_96_GET(pkt_tlvs) << 32); 948 } 949 950 /** 951 * hal_rx_mpdu_get_addr4_be() - API to get address4 of the mpdu 952 * in the packet 953 * @buf: pointer to the start of RX PKT TLV header 954 * @mac_addr: pointer to mac address 955 * 956 * Return: success/failure 957 */ 958 static inline QDF_STATUS hal_rx_mpdu_get_addr4_be(uint8_t *buf, 959 uint8_t *mac_addr) 960 { 961 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 962 struct __attribute__((__packed__)) hal_addr4 { 963 uint32_t ad4_31_0; 964 uint16_t ad4_47_32; 965 }; 966 struct hal_addr4 *addr = (struct hal_addr4 *)mac_addr; 967 uint32_t mac_addr_ad4_valid; 968 969 mac_addr_ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(pkt_tlvs); 970 971 if (mac_addr_ad4_valid) { 972 addr->ad4_31_0 = HAL_RX_TLV_MPDU_AD4_31_0_GET(pkt_tlvs); 973 addr->ad4_47_32 = HAL_RX_TLV_MPDU_AD4_47_32_GET(pkt_tlvs); 974 return QDF_STATUS_SUCCESS; 975 } 976 977 return QDF_STATUS_E_FAILURE; 978 } 979 980 /** 981 * hal_rx_priv_info_set_in_tlv_be() - Save the private info to 982 * the reserved bytes of rx_tlv_hdr 983 * @buf: start of rx_tlv_hdr 984 * @priv_data: hal_wbm_err_desc_info structure 985 * @len: length of the private data 986 * Return: void 987 */ 988 static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf, 989 uint8_t *priv_data, 990 uint32_t len) 991 { 992 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 993 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 994 RX_BE_PADDING0_BYTES : len; 995 996 qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len); 997 } 998 999 /** 1000 * hal_rx_priv_info_get_from_tlv_be() - retrieve the private data from 1001 * the reserved bytes of rx_tlv_hdr. 1002 * @buf: start of rx_tlv_hdr 1003 * @priv_data: Handle to get the private data, output parameter. 1004 * @len: length of the private data 1005 * Return: void 1006 */ 1007 static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf, 1008 uint8_t *priv_data, 1009 uint32_t len) 1010 { 1011 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1012 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1013 RX_BE_PADDING0_BYTES : len; 1014 1015 qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len); 1016 } 1017 1018 /** 1019 * hal_rx_tlv_l3_type_get_be() - API to get the l3 type from 1020 * rx_msdu_start TLV 1021 * @buf: pointer to the start of RX PKT TLV headers 1022 * 1023 * Return: uint32_t(l3 type) 1024 */ 1025 static inline uint32_t hal_rx_tlv_l3_type_get_be(uint8_t *buf) 1026 { 1027 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1028 1029 return HAL_RX_TLV_L3_TYPE_GET(rx_pkt_tlvs); 1030 } 1031 1032 /** 1033 * hal_rx_hw_desc_get_ppduid_get_be() - retrieve ppdu id 1034 * @rx_tlv_hdr: start address of rx_pkt_tlvs 1035 * @rxdma_dst_ring_desc: Rx HW descriptor 1036 * 1037 * Return: ppdu id 1038 */ 1039 static inline uint32_t 1040 hal_rx_hw_desc_get_ppduid_get_be(void *rx_tlv_hdr, void *rxdma_dst_ring_desc) 1041 { 1042 struct rx_pkt_tlvs *rx_pkt_tlvs = 1043 (struct rx_pkt_tlvs *)rx_tlv_hdr; 1044 1045 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 1046 } 1047 1048 /** 1049 * hal_rx_tlv_phy_ppdu_id_get_be() - get phy_ppdu_id value 1050 * from rx attention 1051 * @buf: pointer to rx_pkt_tlvs 1052 * 1053 * Return: phy_ppdu_id 1054 */ 1055 static inline uint16_t hal_rx_tlv_phy_ppdu_id_get_be(uint8_t *buf) 1056 { 1057 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1058 1059 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 1060 } 1061 1062 /** 1063 * hal_rx_attn_phy_ppdu_id_get_be() - get phy_ppdu_id value 1064 * from rx attention 1065 * @buf: pointer to rx_pkt_tlvs 1066 * 1067 * Return: phy_ppdu_id 1068 */ 1069 static inline uint16_t hal_rx_attn_phy_ppdu_id_get_be(uint8_t *buf) 1070 { 1071 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1072 uint16_t phy_ppdu_id; 1073 1074 phy_ppdu_id = HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 1075 1076 return phy_ppdu_id; 1077 } 1078 1079 static inline uint32_t 1080 hal_rx_get_ppdu_id_be(uint8_t *buf) 1081 { 1082 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1083 1084 return HAL_RX_GET_PPDU_ID(rx_pkt_tlvs); 1085 } 1086 1087 /** 1088 * hal_rx_mpdu_peer_meta_data_set_be() - set peer meta data in RX mpdu start tlv 1089 * @buf: rx_tlv_hdr of the received packet 1090 * @peer_mdata: peer meta data to be set. 1091 * 1092 * Return: void 1093 */ 1094 static inline void 1095 hal_rx_mpdu_peer_meta_data_set_be(uint8_t *buf, uint32_t peer_mdata) 1096 { 1097 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1098 1099 HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs) = peer_mdata; 1100 } 1101 1102 /* 1103 * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START 1104 */ 1105 1106 static inline uint32_t hal_rx_mpdu_peer_meta_data_get_be(uint8_t *buf) 1107 { 1108 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1109 1110 return HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs); 1111 } 1112 1113 static inline uint8_t hal_rx_get_filter_category_be(uint8_t *buf) 1114 { 1115 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1116 1117 return HAL_RX_GET_FILTER_CATEGORY(rx_pkt_tlvs); 1118 } 1119 1120 /** 1121 * hal_rx_is_unicast_be() - check packet is unicast frame or not. 1122 * @buf: pointer to rx pkt TLV. 1123 * 1124 * Return: true on unicast. 1125 */ 1126 static inline bool hal_rx_is_unicast_be(uint8_t *buf) 1127 { 1128 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1129 uint32_t grp_id; 1130 1131 grp_id = HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(rx_pkt_tlvs); 1132 1133 return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false; 1134 } 1135 1136 #else 1137 #define IS_ADDR_MULTICAST(_a) (*(_a) & 0x01) 1138 static inline bool hal_rx_is_unicast_be(uint8_t *buf) 1139 { 1140 uint8_t mac[QDF_MAC_ADDR_SIZE] = {0}; 1141 1142 hal_rx_mpdu_get_addr1_be(buf, &mac[0]); 1143 1144 return !IS_ADDR_MULTICAST(mac); 1145 } 1146 1147 /** 1148 * hal_rx_priv_info_set_in_tlv_be() - Save the private info to 1149 * the reserved bytes of rx_tlv_hdr 1150 * @buf: start of rx_tlv_hdr 1151 * @priv_data: hal_wbm_err_desc_info structure 1152 * @len: length of the private data 1153 * 1154 * Return: void 1155 */ 1156 static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf, 1157 uint8_t *priv_data, 1158 uint32_t len) 1159 { 1160 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1161 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1162 RX_BE_PADDING0_BYTES : len; 1163 1164 qdf_mem_copy(&(HAL_RX_MSDU_END(pkt_tlvs).ppdu_start_timestamp_63_32), 1165 priv_data, copy_len); 1166 } 1167 1168 /** 1169 * hal_rx_priv_info_get_from_tlv_be() - retrieve the private data from 1170 * the reserved bytes of rx_tlv_hdr. 1171 * @buf: start of rx_tlv_hdr 1172 * @priv_data: Handle to get the private data, output parameter. 1173 * @len: length of the private data 1174 * 1175 * Return: void 1176 */ 1177 static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf, 1178 uint8_t *priv_data, 1179 uint32_t len) 1180 { 1181 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1182 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1183 RX_BE_PADDING0_BYTES : len; 1184 1185 qdf_mem_copy(priv_data, 1186 &(HAL_RX_MSDU_END(pkt_tlvs).ppdu_start_timestamp_63_32), 1187 copy_len); 1188 } 1189 1190 /** 1191 * hal_rx_print_pn_be() - Prints the PN of rx packet. 1192 * @buf: rx_tlv_hdr of the received packet 1193 * 1194 * Return: void 1195 */ 1196 static inline void hal_rx_print_pn_be(uint8_t *buf) 1197 { 1198 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1199 1200 uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 1201 uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs); 1202 uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 1203 1204 hal_debug("PN number pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x", 1205 pn_95_64, pn_63_32, pn_31_0); 1206 } 1207 1208 static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num) 1209 { 1210 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1211 1212 pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(pkt_tlvs); 1213 pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(pkt_tlvs) << 32); 1214 1215 pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(pkt_tlvs); 1216 } 1217 #endif 1218 1219 /** 1220 * hal_rx_tlv_msdu_len_get_be() - API to get the MSDU length from 1221 * rx_msdu_start TLV 1222 * @buf: pointer to the start of RX PKT TLV headers 1223 * 1224 * Return: msdu length 1225 */ 1226 static inline uint32_t hal_rx_tlv_msdu_len_get_be(uint8_t *buf) 1227 { 1228 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1229 1230 return HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 1231 } 1232 1233 /** 1234 * hal_rx_tlv_msdu_len_set_be() - API to set the MSDU length from 1235 * rx_msdu_start TLV 1236 * @buf: pointer to the start of RX PKT TLV headers 1237 * @len: msdu length 1238 * 1239 * Return: none 1240 */ 1241 static inline void hal_rx_tlv_msdu_len_set_be(uint8_t *buf, uint32_t len) 1242 { 1243 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1244 1245 HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs) = len; 1246 } 1247 1248 /** 1249 * hal_rx_tlv_bw_get_be() - API to get the Bandwidth Interval from 1250 * rx_msdu_start 1251 * @buf: pointer to the start of RX PKT TLV header 1252 * 1253 * Return: uint32_t(bw) 1254 */ 1255 static inline uint32_t hal_rx_tlv_bw_get_be(uint8_t *buf) 1256 { 1257 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1258 1259 return HAL_RX_TLV_BW_GET(rx_pkt_tlvs); 1260 } 1261 1262 /** 1263 * hal_rx_tlv_toeplitz_get_be() - API to get the toeplitz hash from 1264 * rx_msdu_start TLV 1265 * @buf: pointer to the start of RX PKT TLV headers 1266 * 1267 * Return: toeplitz hash 1268 */ 1269 static inline uint32_t hal_rx_tlv_toeplitz_get_be(uint8_t *buf) 1270 { 1271 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1272 1273 return HAL_RX_TLV_FLOWID_TOEPLITZ_GET(rx_pkt_tlvs); 1274 } 1275 1276 /** 1277 * hal_rx_tlv_sgi_get_be() - API to get the Short Guard Interval from 1278 * rx_msdu_start TLV 1279 * @buf: pointer to the start of RX PKT TLV headers 1280 * 1281 * Return: uint32_t(sgi) 1282 */ 1283 static inline uint32_t hal_rx_tlv_sgi_get_be(uint8_t *buf) 1284 { 1285 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1286 1287 return HAL_RX_TLV_SGI_GET(rx_pkt_tlvs); 1288 } 1289 1290 /** 1291 * hal_rx_tlv_rate_mcs_get_be() - API to get the MCS rate from 1292 * rx_msdu_start TLV 1293 * @buf: pointer to the start of RX PKT TLV headers 1294 * 1295 * Return: uint32_t(rate_mcs) 1296 */ 1297 static inline uint32_t hal_rx_tlv_rate_mcs_get_be(uint8_t *buf) 1298 { 1299 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1300 uint32_t rate_mcs; 1301 1302 rate_mcs = HAL_RX_TLV_RATE_MCS_GET(rx_pkt_tlvs); 1303 1304 return rate_mcs; 1305 } 1306 1307 /** 1308 * hal_rx_msdu_get_keyid_be() - API to get the key id of the decrypted packet 1309 * from rx_msdu_end 1310 * @buf: pointer to the start of RX PKT TLV header 1311 * 1312 * Return: uint32_t(key id) 1313 */ 1314 1315 static inline uint8_t hal_rx_msdu_get_keyid_be(uint8_t *buf) 1316 { 1317 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1318 uint32_t keyid_octet; 1319 1320 keyid_octet = HAL_RX_TLV_KEYID_OCTET_GET(rx_pkt_tlvs); 1321 1322 return keyid_octet & 0x3; 1323 } 1324 1325 /** 1326 * hal_rx_tlv_get_rssi_be() - API to get the rssi of received pkt from 1327 * rx_msdu_start 1328 * @buf: pointer to the start of RX PKT TLV header 1329 * 1330 * Return: uint32_t(rssi) 1331 */ 1332 1333 static inline uint32_t hal_rx_tlv_get_rssi_be(uint8_t *buf) 1334 { 1335 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1336 uint32_t rssi; 1337 1338 rssi = HAL_RX_TLV_RSSI_GET(rx_pkt_tlvs); 1339 1340 return rssi; 1341 } 1342 1343 /** 1344 * hal_rx_tlv_get_freq_be() - API to get the frequency of operating 1345 * channel from rx_msdu_start 1346 * @buf: pointer to the start of RX PKT TLV header 1347 * 1348 * Return: uint32_t(frequency) 1349 */ 1350 1351 static inline uint32_t hal_rx_tlv_get_freq_be(uint8_t *buf) 1352 { 1353 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1354 uint32_t freq; 1355 1356 freq = HAL_RX_TLV_FREQ_GET(rx_pkt_tlvs); 1357 1358 return freq; 1359 } 1360 1361 1362 /** 1363 * hal_rx_tlv_get_pkt_type_be() - API to get the pkt type from 1364 * rx_msdu_start 1365 * @buf: pointer to the start of RX PKT TLV header 1366 * 1367 * Return: uint32_t(pkt type) 1368 */ 1369 1370 static inline uint32_t hal_rx_tlv_get_pkt_type_be(uint8_t *buf) 1371 { 1372 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1373 uint32_t pkt_type; 1374 1375 pkt_type = HAL_RX_TLV_PKT_TYPE_GET(rx_pkt_tlvs); 1376 1377 return pkt_type; 1378 } 1379 1380 /******************************************************************************* 1381 * RX ERROR APIS 1382 ******************************************************************************/ 1383 1384 /** 1385 * hal_rx_tlv_decrypt_err_get_be() - API to get the Decrypt ERR from 1386 * rx_mpdu_end TLV 1387 * @buf: pointer to the start of RX PKT TLV headers 1388 * 1389 * Return: uint32_t(decrypt_err) 1390 */ 1391 static inline uint32_t hal_rx_tlv_decrypt_err_get_be(uint8_t *buf) 1392 { 1393 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1394 uint32_t decrypt_err; 1395 1396 decrypt_err = HAL_RX_TLV_DECRYPT_ERR_GET(rx_pkt_tlvs); 1397 1398 return decrypt_err; 1399 } 1400 1401 /** 1402 * hal_rx_tlv_mic_err_get_be() - API to get the MIC ERR from rx_tlv TLV 1403 * @buf: pointer to the start of RX PKT TLV headers 1404 * 1405 * Return: uint32_t(mic_err) 1406 */ 1407 static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf) 1408 { 1409 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1410 uint32_t mic_err; 1411 1412 mic_err = HAL_RX_TLV_MIC_ERR_GET(rx_pkt_tlvs); 1413 1414 return mic_err; 1415 } 1416 1417 /** 1418 * hal_get_reo_ent_desc_qdesc_addr_be() - API to get qdesc address of 1419 * reo entrance ring desc 1420 * @desc: reo entrance ring descriptor 1421 * 1422 * Return: qdesc address 1423 */ 1424 static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc) 1425 { 1426 return desc + REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET; 1427 } 1428 1429 /** 1430 * hal_set_reo_ent_desc_reo_dest_ind_be() - API to set reo destination 1431 * indication of reo entrance ring desc 1432 * @desc: reo ent ring descriptor 1433 * @dst_ind: reo destination indication value 1434 * 1435 * Return: None 1436 */ 1437 static inline void 1438 hal_set_reo_ent_desc_reo_dest_ind_be(uint8_t *desc, uint32_t dst_ind) 1439 { 1440 HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING, 1441 REO_DESTINATION_INDICATION, dst_ind); 1442 } 1443 1444 /** 1445 * hal_rx_mpdu_sequence_number_get_be() - Get mpdu sequence number 1446 * @buf: pointer to packet buffer 1447 * 1448 * Return: mpdu sequence 1449 */ 1450 static inline int hal_rx_mpdu_sequence_number_get_be(uint8_t *buf) 1451 { 1452 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1453 1454 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 1455 } 1456 1457 /** 1458 * hal_rx_msdu_packet_metadata_get_generic_be() - API to get the msdu 1459 * information from 1460 * rx_msdu_end TLV 1461 * @buf: pointer to the start of RX PKT TLV headers 1462 * @pkt_msdu_metadata: pointer to the msdu info structure 1463 */ 1464 static inline void 1465 hal_rx_msdu_packet_metadata_get_generic_be(uint8_t *buf, 1466 void *pkt_msdu_metadata) 1467 { 1468 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1469 struct hal_rx_msdu_metadata *msdu_metadata = 1470 (struct hal_rx_msdu_metadata *)pkt_msdu_metadata; 1471 1472 msdu_metadata->l3_hdr_pad = 1473 HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 1474 msdu_metadata->sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 1475 msdu_metadata->da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 1476 msdu_metadata->sa_sw_peer_id = 1477 HAL_RX_TLV_SA_SW_PEER_ID_GET(rx_pkt_tlvs); 1478 } 1479 1480 /** 1481 * hal_rx_tlv_nss_get_be() - API to get the NSS Interval from 1482 * rx_msdu_start 1483 * @buf: pointer to the start of RX PKT TLV header 1484 * 1485 * Return: uint32_t(nss) 1486 */ 1487 static inline uint32_t hal_rx_tlv_nss_get_be(uint8_t *buf) 1488 { 1489 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1490 uint8_t mimo_ss_bitmap; 1491 1492 mimo_ss_bitmap = HAL_RX_TLV_MIMO_SS_BITMAP(rx_pkt_tlvs); 1493 1494 return qdf_get_hweight8(mimo_ss_bitmap); 1495 } 1496 1497 #ifdef GET_MSDU_AGGREGATION 1498 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)\ 1499 {\ 1500 bool first_msdu, last_msdu; \ 1501 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_desc);\ 1502 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_desc);\ 1503 if (first_msdu && last_msdu)\ 1504 rs->rs_flags &= (~IEEE80211_AMSDU_FLAG);\ 1505 else\ 1506 rs->rs_flags |= (IEEE80211_AMSDU_FLAG); \ 1507 } \ 1508 1509 #define HAL_RX_SET_MSDU_AGGREGATION((rs_mpdu), (rs_ppdu))\ 1510 {\ 1511 if (rs_mpdu->rs_flags & IEEE80211_AMSDU_FLAG)\ 1512 rs_ppdu->rs_flags |= IEEE80211_AMSDU_FLAG;\ 1513 } \ 1514 1515 #else 1516 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs) 1517 #define HAL_RX_SET_MSDU_AGGREGATION(rs_mpdu, rs_ppdu) 1518 #endif 1519 1520 /** 1521 * hal_rx_mon_hw_desc_get_mpdu_status_be() - Retrieve MPDU status 1522 * @hw_desc_addr: Start address of Rx HW TLVs 1523 * @rs: Status for monitor mode 1524 * 1525 * Return: void 1526 */ 1527 static inline void 1528 hal_rx_mon_hw_desc_get_mpdu_status_be(void *hw_desc_addr, 1529 struct mon_rx_status *rs) 1530 { 1531 uint32_t reg_value; 1532 struct rx_pkt_tlvs *rx_desc = 1533 (struct rx_pkt_tlvs *)hw_desc_addr; 1534 const uint32_t sgi_hw_to_cdp[] = { 1535 CDP_SGI_0_8_US, 1536 CDP_SGI_0_4_US, 1537 CDP_SGI_1_6_US, 1538 CDP_SGI_3_2_US, 1539 }; 1540 1541 HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs); 1542 1543 rs->ant_signal_db = HAL_RX_TLV_ANT_SIGNAL_DB_GET(rx_desc); 1544 rs->is_stbc = HAL_RX_TLV_STBC_GET(rx_desc); 1545 1546 reg_value = HAL_RX_TLV_SGI_GET(rx_desc); 1547 rs->sgi = sgi_hw_to_cdp[reg_value]; 1548 1549 reg_value = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_desc); 1550 rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0; 1551 /* TODO: rs->beamformed should be set for SU beamforming also */ 1552 } 1553 1554 static inline uint32_t hal_rx_tlv_tid_get_be(uint8_t *buf) 1555 { 1556 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1557 uint32_t tid; 1558 1559 tid = HAL_RX_TLV_TID_GET(rx_pkt_tlvs); 1560 1561 return tid; 1562 } 1563 1564 /** 1565 * hal_rx_tlv_reception_type_get_be() - API to get the reception type 1566 * Interval from rx_msdu_start 1567 * @buf: pointer to the start of RX PKT TLV header 1568 * 1569 * Return: uint32_t(reception_type) 1570 */ 1571 static inline 1572 uint32_t hal_rx_tlv_reception_type_get_be(uint8_t *buf) 1573 { 1574 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1575 uint32_t reception_type; 1576 1577 reception_type = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_pkt_tlvs); 1578 1579 return reception_type; 1580 } 1581 1582 /** 1583 * hal_rx_msdu_end_da_idx_get_be() - API to get da_idx from 1584 * rx_msdu_end TLV 1585 * @buf: pointer to the start of RX PKT TLV headers 1586 * 1587 * Return: da index 1588 */ 1589 static inline uint16_t hal_rx_msdu_end_da_idx_get_be(uint8_t *buf) 1590 { 1591 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1592 uint16_t da_idx; 1593 1594 da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 1595 1596 return da_idx; 1597 } 1598 1599 /** 1600 * hal_rx_get_rx_fragment_number_be() - Function to retrieve rx fragment number 1601 * @buf: Network buffer 1602 * 1603 * Return: rx fragment number 1604 */ 1605 static inline 1606 uint8_t hal_rx_get_rx_fragment_number_be(uint8_t *buf) 1607 { 1608 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1609 1610 /* Return first 4 bits as fragment number */ 1611 return (HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs) & 1612 DOT11_SEQ_FRAG_MASK); 1613 } 1614 1615 /** 1616 * hal_rx_tlv_da_is_mcbc_get_be() - API to check if pkt is MCBC from 1617 * rx_msdu_end TLV 1618 * @buf: pointer to the start of RX PKT TLV headers 1619 * 1620 * Return: da_is_mcbc 1621 */ 1622 static inline uint8_t 1623 hal_rx_tlv_da_is_mcbc_get_be(uint8_t *buf) 1624 { 1625 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1626 1627 return HAL_RX_TLV_DA_IS_MCBC_GET(rx_pkt_tlvs); 1628 } 1629 1630 /** 1631 * hal_rx_tlv_is_tkip_mic_err_get_be() - API to get tkip Mic error 1632 * from rx_msdu_end TLV 1633 * @buf: pointer to the start of RX PKT TLV headers 1634 * 1635 * Return: tkip_mic_err 1636 */ 1637 static inline uint8_t 1638 hal_rx_tlv_is_tkip_mic_err_get_be(uint8_t *buf) 1639 { 1640 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1641 1642 return HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(rx_pkt_tlvs); 1643 } 1644 1645 /** 1646 * hal_rx_tlv_sa_is_valid_get_be() - API to get the sa_is_valid bit from 1647 * rx_msdu_end TLV 1648 * @buf: pointer to the start of RX PKT TLV headers 1649 * 1650 * Return: sa_is_valid bit 1651 */ 1652 static inline uint8_t 1653 hal_rx_tlv_sa_is_valid_get_be(uint8_t *buf) 1654 { 1655 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1656 uint8_t sa_is_valid; 1657 1658 sa_is_valid = HAL_RX_TLV_SA_IS_VALID_GET(rx_pkt_tlvs); 1659 1660 return sa_is_valid; 1661 } 1662 1663 /** 1664 * hal_rx_tlv_sa_idx_get_be() - API to get the sa_idx from rx_msdu_end TLV 1665 * @buf: pointer to the start of RX PKT TLV headers 1666 * 1667 * Return: sa_idx (SA AST index) 1668 */ 1669 static inline 1670 uint16_t hal_rx_tlv_sa_idx_get_be(uint8_t *buf) 1671 { 1672 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1673 uint16_t sa_idx; 1674 1675 sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 1676 1677 return sa_idx; 1678 } 1679 1680 /** 1681 * hal_rx_desc_is_first_msdu_be() - Check if first msdu 1682 * @hw_desc_addr: hardware descriptor address 1683 * 1684 * Return: 0 - success/ non-zero failure 1685 */ 1686 static inline uint32_t hal_rx_desc_is_first_msdu_be(void *hw_desc_addr) 1687 { 1688 struct rx_pkt_tlvs *rx_pkt_tlvs = 1689 (struct rx_pkt_tlvs *)hw_desc_addr; 1690 1691 return HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 1692 } 1693 1694 /** 1695 * hal_rx_tlv_l3_hdr_padding_get_be() - API to get the l3_header padding 1696 * from rx_msdu_end TLV 1697 * @buf: pointer to the start of RX PKT TLV headers 1698 * 1699 * Return: number of l3 header padding bytes 1700 */ 1701 static inline uint32_t hal_rx_tlv_l3_hdr_padding_get_be(uint8_t *buf) 1702 { 1703 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1704 uint32_t l3_header_padding; 1705 1706 l3_header_padding = HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 1707 1708 return l3_header_padding; 1709 } 1710 1711 /** 1712 * hal_rx_encryption_info_valid_be() - Returns encryption type. 1713 * @buf: rx_tlv_hdr of the received packet 1714 * 1715 * Return: encryption type 1716 */ 1717 static inline uint32_t hal_rx_encryption_info_valid_be(uint8_t *buf) 1718 { 1719 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1720 uint32_t encryption_info = 1721 HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(rx_pkt_tlvs); 1722 1723 return encryption_info; 1724 } 1725 1726 /** 1727 * hal_rx_tlv_first_msdu_get_be() - API to get first msdu status from 1728 * rx_msdu_end TLV 1729 * @buf: pointer to the start of RX PKT TLV headers 1730 * 1731 * Return: first_msdu 1732 */ 1733 static inline uint8_t hal_rx_tlv_first_msdu_get_be(uint8_t *buf) 1734 { 1735 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1736 uint8_t first_msdu; 1737 1738 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 1739 1740 return first_msdu; 1741 } 1742 1743 /** 1744 * hal_rx_tlv_da_is_valid_get_be() - API to check if da is valid from 1745 * rx_msdu_end TLV 1746 * @buf: pointer to the start of RX PKT TLV headers 1747 * 1748 * Return: da_is_valid 1749 */ 1750 static inline uint8_t hal_rx_tlv_da_is_valid_get_be(uint8_t *buf) 1751 { 1752 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1753 uint8_t da_is_valid; 1754 1755 da_is_valid = HAL_RX_TLV_DA_IS_VALID_GET(rx_pkt_tlvs); 1756 1757 return da_is_valid; 1758 } 1759 1760 /** 1761 * hal_rx_tlv_last_msdu_get_be() - API to get last msdu status from 1762 * rx_msdu_end TLV 1763 * @buf: pointer to the start of RX PKT TLV headers 1764 * 1765 * Return: last_msdu 1766 */ 1767 static inline uint8_t hal_rx_tlv_last_msdu_get_be(uint8_t *buf) 1768 { 1769 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1770 uint8_t last_msdu; 1771 1772 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_pkt_tlvs); 1773 1774 return last_msdu; 1775 } 1776 1777 /** 1778 * hal_rx_get_mpdu_mac_ad4_valid_be() - Retrieves if mpdu 4th addr is valid 1779 * @buf: Network buffer 1780 * 1781 * Return: value of mpdu 4th address valid field 1782 */ 1783 static inline bool hal_rx_get_mpdu_mac_ad4_valid_be(uint8_t *buf) 1784 { 1785 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1786 bool ad4_valid = 0; 1787 1788 ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs); 1789 1790 return ad4_valid; 1791 } 1792 1793 /** 1794 * hal_rx_mpdu_start_sw_peer_id_get_be() - Retrieve sw peer_id 1795 * @buf: network buffer 1796 * 1797 * Return: sw peer_id 1798 */ 1799 static inline uint32_t hal_rx_mpdu_start_sw_peer_id_get_be(uint8_t *buf) 1800 { 1801 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1802 1803 return HAL_RX_TLV_SW_PEER_ID_GET(rx_pkt_tlvs); 1804 } 1805 1806 /** 1807 * hal_rx_mpdu_get_to_ds_be() - API to get the tods info 1808 * from rx_mpdu_start 1809 * 1810 * @buf: pointer to the start of RX PKT TLV header 1811 * Return: uint32_t(to_ds) 1812 */ 1813 static inline uint32_t hal_rx_mpdu_get_to_ds_be(uint8_t *buf) 1814 { 1815 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1816 1817 return HAL_RX_TLV_MPDU_GET_TODS(rx_pkt_tlvs); 1818 } 1819 1820 /** 1821 * hal_rx_mpdu_get_fr_ds_be() - API to get the from ds info 1822 * from rx_mpdu_start 1823 * @buf: pointer to the start of RX PKT TLV header 1824 * 1825 * Return: uint32_t(fr_ds) 1826 */ 1827 static inline uint32_t hal_rx_mpdu_get_fr_ds_be(uint8_t *buf) 1828 { 1829 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1830 1831 return HAL_RX_TLV_MPDU_GET_FROMDS(rx_pkt_tlvs); 1832 } 1833 1834 /** 1835 * hal_rx_get_mpdu_frame_control_valid_be() - Retrieves mpdu frame 1836 * control valid 1837 * @buf: Network buffer 1838 * 1839 * Return: value of frame control valid field 1840 */ 1841 static inline uint8_t hal_rx_get_mpdu_frame_control_valid_be(uint8_t *buf) 1842 { 1843 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1844 1845 return HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(rx_pkt_tlvs); 1846 } 1847 1848 /** 1849 * hal_rx_mpdu_get_addr2_be() - API to check get address2 of the mpdu 1850 * in the packet 1851 * @buf: pointer to the start of RX PKT TLV header 1852 * @mac_addr: pointer to mac address 1853 * 1854 * Return: success/failure 1855 */ 1856 static inline QDF_STATUS hal_rx_mpdu_get_addr2_be(uint8_t *buf, 1857 uint8_t *mac_addr) 1858 { 1859 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1860 struct __attribute__((__packed__)) hal_addr2 { 1861 uint16_t ad2_15_0; 1862 uint32_t ad2_47_16; 1863 }; 1864 struct hal_addr2 *addr = (struct hal_addr2 *)mac_addr; 1865 uint32_t mac_addr_ad2_valid; 1866 1867 mac_addr_ad2_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1868 1869 if (mac_addr_ad2_valid) { 1870 addr->ad2_15_0 = HAL_RX_TLV_MPDU_AD2_15_0_GET(rx_pkt_tlvs); 1871 addr->ad2_47_16 = HAL_RX_TLV_MPDU_AD2_47_16_GET(rx_pkt_tlvs); 1872 return QDF_STATUS_SUCCESS; 1873 } 1874 1875 return QDF_STATUS_E_FAILURE; 1876 } 1877 1878 /** 1879 * hal_rx_mpdu_get_addr3_be() - API to get address3 of the mpdu in the 1880 * packet 1881 * @buf: pointer to the start of RX PKT TLV header 1882 * @mac_addr: pointer to mac address 1883 * 1884 * Return: success/failure 1885 */ 1886 static inline QDF_STATUS hal_rx_mpdu_get_addr3_be(uint8_t *buf, 1887 uint8_t *mac_addr) 1888 { 1889 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1890 struct __attribute__((__packed__)) hal_addr3 { 1891 uint32_t ad3_31_0; 1892 uint16_t ad3_47_32; 1893 }; 1894 struct hal_addr3 *addr = (struct hal_addr3 *)mac_addr; 1895 uint32_t mac_addr_ad3_valid; 1896 1897 mac_addr_ad3_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(rx_pkt_tlvs); 1898 1899 if (mac_addr_ad3_valid) { 1900 addr->ad3_31_0 = HAL_RX_TLV_MPDU_AD3_31_0_GET(rx_pkt_tlvs); 1901 addr->ad3_47_32 = HAL_RX_TLV_MPDU_AD3_47_32_GET(rx_pkt_tlvs); 1902 return QDF_STATUS_SUCCESS; 1903 } 1904 1905 return QDF_STATUS_E_FAILURE; 1906 } 1907 1908 /** 1909 * hal_rx_get_mpdu_sequence_control_valid_be() - Get mpdu sequence 1910 * control valid 1911 * @buf: Network buffer 1912 * 1913 * Return: value of sequence control valid field 1914 */ 1915 static inline uint8_t hal_rx_get_mpdu_sequence_control_valid_be(uint8_t *buf) 1916 { 1917 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1918 1919 return HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_pkt_tlvs); 1920 } 1921 1922 /** 1923 * hal_rx_tid_get_be() - get tid based on qos control valid. 1924 * @hal_soc_hdl: hal_soc handle 1925 * @buf: pointer to rx pkt TLV. 1926 * 1927 * Return: tid 1928 */ 1929 static inline uint32_t hal_rx_tid_get_be(hal_soc_handle_t hal_soc_hdl, 1930 uint8_t *buf) 1931 { 1932 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1933 uint8_t qos_control_valid = 1934 HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(rx_pkt_tlvs); 1935 1936 if (qos_control_valid) 1937 return hal_rx_tlv_tid_get_be(buf); 1938 1939 return HAL_RX_NON_QOS_TID; 1940 } 1941 1942 static inline 1943 uint8_t hal_rx_get_fc_valid_be(uint8_t *buf) 1944 { 1945 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1946 1947 return HAL_RX_TLV_GET_FC_VALID(rx_pkt_tlvs); 1948 } 1949 1950 static inline uint8_t hal_rx_get_to_ds_flag_be(uint8_t *buf) 1951 { 1952 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1953 1954 return HAL_RX_TLV_GET_TO_DS_FLAG(rx_pkt_tlvs); 1955 } 1956 1957 static inline uint8_t hal_rx_get_mac_addr2_valid_be(uint8_t *buf) 1958 { 1959 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1960 1961 return HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1962 } 1963 1964 /** 1965 * hal_rx_msdu_flow_idx_get_be() - API to get flow index from 1966 * rx_msdu_end TLV 1967 * @buf: pointer to the start of RX PKT TLV headers 1968 * 1969 * Return: flow index value from MSDU END TLV 1970 */ 1971 static inline uint32_t hal_rx_msdu_flow_idx_get_be(uint8_t *buf) 1972 { 1973 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1974 1975 return HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 1976 } 1977 1978 /** 1979 * hal_rx_msdu_get_reo_destination_indication_be() - API to get 1980 * reo_destination_indication 1981 * from rx_msdu_end 1982 * TLV 1983 * @buf: pointer to the start of RX PKT TLV headers 1984 * @reo_destination_indication: pointer to return value of 1985 * reo_destination_indication 1986 * 1987 * Return: none 1988 */ 1989 static inline void 1990 hal_rx_msdu_get_reo_destination_indication_be(uint8_t *buf, 1991 uint32_t *reo_destination_indication) 1992 { 1993 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1994 1995 *reo_destination_indication = HAL_RX_TLV_REO_DEST_IND_GET(pkt_tlvs); 1996 } 1997 1998 /** 1999 * hal_rx_msdu_flow_idx_invalid_be() - API to get flow index invalid 2000 * from rx_msdu_end TLV 2001 * @buf: pointer to the start of RX PKT TLV headers 2002 * 2003 * Return: flow index invalid value from MSDU END TLV 2004 */ 2005 static inline bool hal_rx_msdu_flow_idx_invalid_be(uint8_t *buf) 2006 { 2007 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2008 2009 return HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 2010 } 2011 2012 /** 2013 * hal_rx_msdu_flow_idx_timeout_be() - API to get flow index timeout 2014 * from rx_msdu_end TLV 2015 * @buf: pointer to the start of RX PKT TLV headers 2016 * 2017 * Return: flow index timeout value from MSDU END TLV 2018 */ 2019 static inline bool hal_rx_msdu_flow_idx_timeout_be(uint8_t *buf) 2020 { 2021 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2022 2023 return HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 2024 } 2025 2026 /** 2027 * hal_rx_msdu_fse_metadata_get_be() - API to get FSE metadata from 2028 * rx_msdu_end TLV 2029 * @buf: pointer to the start of RX PKT TLV headers 2030 * 2031 * Return: fse metadata value from MSDU END TLV 2032 */ 2033 static inline uint32_t hal_rx_msdu_fse_metadata_get_be(uint8_t *buf) 2034 { 2035 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2036 2037 return HAL_RX_TLV_FSE_METADATA_GET(pkt_tlvs); 2038 } 2039 2040 /** 2041 * hal_rx_msdu_cce_metadata_get_be() - API to get CCE metadata from 2042 * rx_msdu_end TLV 2043 * @buf: pointer to the start of RX PKT TLV headers 2044 * 2045 * Return: cce_metadata 2046 */ 2047 static inline uint16_t 2048 hal_rx_msdu_cce_metadata_get_be(uint8_t *buf) 2049 { 2050 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2051 2052 return HAL_RX_TLV_CCE_METADATA_GET(pkt_tlvs); 2053 } 2054 2055 /** 2056 * hal_rx_msdu_get_flow_params_be() - API to get flow index, flow 2057 * index invalid and flow index 2058 * timeout from rx_msdu_end TLV 2059 * @buf: pointer to the start of RX PKT TLV headers 2060 * @flow_invalid: pointer to return value of flow_idx_valid 2061 * @flow_timeout: pointer to return value of flow_idx_timeout 2062 * @flow_index: pointer to return value of flow_idx 2063 * 2064 * Return: none 2065 */ 2066 static inline void 2067 hal_rx_msdu_get_flow_params_be(uint8_t *buf, 2068 bool *flow_invalid, 2069 bool *flow_timeout, 2070 uint32_t *flow_index) 2071 { 2072 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2073 2074 *flow_invalid = HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 2075 *flow_timeout = HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 2076 *flow_index = HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 2077 } 2078 2079 /** 2080 * hal_rx_tlv_get_tcp_chksum_be() - API to get tcp checksum 2081 * @buf: rx_tlv_hdr 2082 * 2083 * Return: tcp checksum 2084 */ 2085 static inline uint16_t 2086 hal_rx_tlv_get_tcp_chksum_be(uint8_t *buf) 2087 { 2088 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2089 2090 return HAL_RX_TLV_GET_TCP_CHKSUM(rx_pkt_tlvs); 2091 } 2092 2093 /** 2094 * hal_rx_get_rx_sequence_be() - Function to retrieve rx sequence number 2095 * @buf: Network buffer 2096 * 2097 * Return: rx sequence number 2098 */ 2099 static inline 2100 uint16_t hal_rx_get_rx_sequence_be(uint8_t *buf) 2101 { 2102 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2103 2104 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 2105 } 2106 2107 #ifdef RECEIVE_OFFLOAD 2108 #ifdef QCA_WIFI_KIWI_V2 2109 static inline 2110 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf) 2111 { 2112 /* 2113 * cumulative l4 checksum is not supported in V2 and 2114 * cumulative_l4_checksum field is not present 2115 */ 2116 return 0; 2117 } 2118 #else 2119 /** 2120 * hal_rx_get_fisa_cumulative_l4_checksum_be() - Retrieve cumulative 2121 * checksum 2122 * @buf: buffer pointer 2123 * 2124 * Return: cumulative checksum 2125 */ 2126 static inline 2127 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf) 2128 { 2129 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2130 2131 return HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(rx_pkt_tlvs); 2132 } 2133 #endif 2134 2135 /** 2136 * hal_rx_get_fisa_cumulative_ip_length_be() - Retrieve cumulative 2137 * ip length 2138 * @buf: buffer pointer 2139 * 2140 * Return: cumulative length 2141 */ 2142 static inline 2143 uint16_t hal_rx_get_fisa_cumulative_ip_length_be(uint8_t *buf) 2144 { 2145 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2146 2147 return HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(rx_pkt_tlvs); 2148 } 2149 2150 /** 2151 * hal_rx_get_udp_proto_be() - Retrieve udp proto value 2152 * @buf: buffer 2153 * 2154 * Return: udp proto bit 2155 */ 2156 static inline 2157 bool hal_rx_get_udp_proto_be(uint8_t *buf) 2158 { 2159 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2160 2161 return HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 2162 } 2163 #endif 2164 2165 /** 2166 * hal_rx_get_flow_agg_continuation_be() - retrieve flow agg 2167 * continuation 2168 * @buf: buffer 2169 * 2170 * Return: flow agg 2171 */ 2172 static inline 2173 bool hal_rx_get_flow_agg_continuation_be(uint8_t *buf) 2174 { 2175 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2176 2177 return HAL_RX_TLV_GET_FLOW_AGGR_CONT(rx_pkt_tlvs); 2178 } 2179 2180 /** 2181 * hal_rx_get_flow_agg_count_be()- Retrieve flow agg count 2182 * @buf: buffer 2183 * 2184 * Return: flow agg count 2185 */ 2186 static inline 2187 uint8_t hal_rx_get_flow_agg_count_be(uint8_t *buf) 2188 { 2189 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2190 2191 return HAL_RX_TLV_GET_FLOW_AGGR_COUNT(rx_pkt_tlvs); 2192 } 2193 2194 /** 2195 * hal_rx_get_fisa_timeout_be() - Retrieve fisa timeout 2196 * @buf: buffer 2197 * 2198 * Return: fisa timeout 2199 */ 2200 static inline 2201 bool hal_rx_get_fisa_timeout_be(uint8_t *buf) 2202 { 2203 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2204 2205 return HAL_RX_TLV_GET_FISA_TIMEOUT(rx_pkt_tlvs); 2206 } 2207 2208 /** 2209 * hal_rx_mpdu_start_tlv_tag_valid_be () - API to check if RX_MPDU_START 2210 * tlv tag is valid 2211 * 2212 *@rx_tlv_hdr: start address of rx_pkt_tlvs 2213 * 2214 * Return: true if RX_MPDU_START is valid, else false. 2215 */ 2216 static inline uint8_t hal_rx_mpdu_start_tlv_tag_valid_be(void *rx_tlv_hdr) 2217 { 2218 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)rx_tlv_hdr; 2219 uint32_t tlv_tag; 2220 2221 tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(&rx_desc->mpdu_start_tlv); 2222 2223 return tlv_tag == WIFIRX_MPDU_START_E ? true : false; 2224 } 2225 2226 /** 2227 * hal_rx_msdu_end_offset_get_generic() - API to get the 2228 * msdu_end structure offset rx_pkt_tlv structure 2229 * 2230 * NOTE: API returns offset of msdu_end TLV from structure 2231 * rx_pkt_tlvs 2232 */ 2233 static inline uint32_t hal_rx_msdu_end_offset_get_generic(void) 2234 { 2235 return RX_PKT_TLV_OFFSET(msdu_end_tlv); 2236 } 2237 2238 /** 2239 * hal_rx_mpdu_start_offset_get_generic() - API to get the 2240 * mpdu_start structure offset rx_pkt_tlv structure 2241 * 2242 * NOTE: API returns offset of attn TLV from structure 2243 * rx_pkt_tlvs 2244 */ 2245 static inline uint32_t hal_rx_mpdu_start_offset_get_generic(void) 2246 { 2247 return RX_PKT_TLV_OFFSET(mpdu_start_tlv); 2248 } 2249 2250 #ifndef NO_RX_PKT_HDR_TLV 2251 static inline uint32_t hal_rx_pkt_tlv_offset_get_generic(void) 2252 { 2253 return RX_PKT_TLV_OFFSET(pkt_hdr_tlv); 2254 } 2255 #endif 2256 2257 #ifdef CONFIG_WORD_BASED_TLV 2258 #define MPDU_START_WMASK 0x074C 2259 #define MSDU_END_WMASK 0x13FC1 2260 2261 /** 2262 * hal_rx_mpdu_start_wmask_get_be() - API to get the mpdu_start_tlv word mask 2263 * 2264 * return: Word mask for MPDU start tlv 2265 */ 2266 static inline uint32_t hal_rx_mpdu_start_wmask_get_be(void) 2267 { 2268 return MPDU_START_WMASK; 2269 } 2270 2271 /** 2272 * hal_rx_msdu_end_wmask_get_be() - API to get the msdu_end_tlv word mask 2273 * 2274 * return: Word mask for MSDU end tlv 2275 */ 2276 static inline uint32_t hal_rx_msdu_end_wmask_get_be(void) 2277 { 2278 return MSDU_END_WMASK; 2279 } 2280 #endif 2281 2282 #ifdef RECEIVE_OFFLOAD 2283 static inline int 2284 hal_rx_tlv_get_offload_info_be(uint8_t *rx_tlv, 2285 struct hal_offload_info *offload_info) 2286 { 2287 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)rx_tlv; 2288 2289 offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_pkt_tlvs); 2290 offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_pkt_tlvs); 2291 offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 2292 offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs); 2293 2294 if (offload_info->tcp_proto) { 2295 offload_info->tcp_pure_ack = 2296 HAL_RX_TLV_GET_TCP_PURE_ACK(rx_pkt_tlvs); 2297 offload_info->tcp_offset = 2298 HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 2299 offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_pkt_tlvs); 2300 offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_pkt_tlvs); 2301 offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_pkt_tlvs); 2302 } 2303 return 0; 2304 } 2305 2306 static inline int hal_rx_get_proto_params_be(uint8_t *buf, void *proto_params) 2307 { 2308 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2309 struct hal_proto_params *param = 2310 (struct hal_proto_params *)proto_params; 2311 2312 param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs); 2313 param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 2314 param->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 2315 2316 return 0; 2317 } 2318 2319 static inline int hal_rx_get_l3_l4_offsets_be(uint8_t *buf, 2320 uint32_t *l3_hdr_offset, 2321 uint32_t *l4_hdr_offset) 2322 { 2323 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2324 2325 *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(rx_pkt_tlvs); 2326 *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 2327 2328 return 0; 2329 } 2330 #endif 2331 2332 /** 2333 * hal_rx_msdu_start_msdu_len_get_be() - API to get the MSDU length from 2334 * rx_msdu_start TLV 2335 * @buf: pointer to the start of RX PKT TLV headers 2336 * 2337 * Return: msdu length 2338 */ 2339 static inline uint32_t hal_rx_msdu_start_msdu_len_get_be(uint8_t *buf) 2340 { 2341 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2342 uint32_t msdu_len; 2343 2344 msdu_len = HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 2345 2346 return msdu_len; 2347 } 2348 2349 /** 2350 * hal_rx_get_frame_ctrl_field_be() - Function to retrieve frame control field 2351 * @buf: Network buffer 2352 * 2353 * Return: frame control field 2354 */ 2355 static inline uint16_t hal_rx_get_frame_ctrl_field_be(uint8_t *buf) 2356 { 2357 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2358 uint16_t frame_ctrl = 0; 2359 2360 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_pkt_tlvs); 2361 2362 return frame_ctrl; 2363 } 2364 2365 /** 2366 * hal_rx_tlv_get_is_decrypted_be() - API to get the decrypt status of 2367 * the packet from msdu_end 2368 * @buf: pointer to the start of RX PKT TLV header 2369 * 2370 * Return: uint32_t(decryt status) 2371 */ 2372 static inline uint32_t hal_rx_tlv_get_is_decrypted_be(uint8_t *buf) 2373 { 2374 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2375 uint32_t is_decrypt = 0; 2376 uint32_t decrypt_status; 2377 2378 decrypt_status = HAL_RX_TLV_DECRYPT_STATUS_GET(rx_pkt_tlvs); 2379 2380 if (!decrypt_status) 2381 is_decrypt = 1; 2382 2383 return is_decrypt; 2384 } 2385 2386 #ifdef NO_RX_PKT_HDR_TLV 2387 /** 2388 * hal_rx_pkt_hdr_get_be() - API to get 80211 header 2389 * @buf: start of rx_pkt_tlv 2390 * 2391 * If NO_RX_PKT_HDR_TLV is enabled, then this API assume caller gives a raw 2392 * data, get 80211 header from packet data directly. 2393 * If NO_RX_PKT_HDR_TLV is disabled, then get it from rx_pkt_hdr_tlv in 2394 * rx_pkt_tlvs. 2395 * 2396 * Return: pointer to start of 80211 header 2397 */ 2398 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf) 2399 { 2400 return buf + RX_PKT_TLVS_LEN; 2401 } 2402 #else 2403 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf) 2404 { 2405 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2406 2407 return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr; 2408 } 2409 #endif 2410 2411 /** 2412 * hal_rx_tlv_csum_err_get_be() - Get IP and tcp-udp checksum fail flag 2413 * @rx_tlv_hdr: start address of rx_tlv_hdr 2414 * @ip_csum_err: buffer to return ip_csum_fail flag 2415 * @tcp_udp_csum_err: placeholder to return tcp-udp checksum fail flag 2416 * 2417 * Return: None 2418 */ 2419 static inline void 2420 hal_rx_tlv_csum_err_get_be(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err, 2421 uint32_t *tcp_udp_csum_err) 2422 { 2423 struct rx_pkt_tlvs *rx_pkt_tlvs = 2424 (struct rx_pkt_tlvs *)rx_tlv_hdr; 2425 2426 *ip_csum_err = HAL_RX_TLV_IP_CSUM_FAIL_GET(rx_pkt_tlvs); 2427 *tcp_udp_csum_err = HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(rx_pkt_tlvs); 2428 } 2429 2430 static inline 2431 uint32_t hal_rx_tlv_mpdu_len_err_get_be(void *hw_desc_addr) 2432 { 2433 struct rx_pkt_tlvs *rx_pkt_tlvs = 2434 (struct rx_pkt_tlvs *)hw_desc_addr; 2435 2436 return HAL_RX_TLV_MPDU_LEN_ERR_GET(rx_pkt_tlvs); 2437 } 2438 2439 static inline 2440 uint32_t hal_rx_tlv_mpdu_fcs_err_get_be(void *hw_desc_addr) 2441 { 2442 struct rx_pkt_tlvs *rx_pkt_tlvs = 2443 (struct rx_pkt_tlvs *)hw_desc_addr; 2444 2445 return HAL_RX_TLV_MPDU_FCS_ERR_GET(rx_pkt_tlvs); 2446 } 2447 2448 /** 2449 * hal_rx_get_rx_more_frag_bit() - Function to retrieve more fragment bit 2450 * @buf: Network buffer 2451 * 2452 * Return: rx more fragment bit 2453 */ 2454 static inline 2455 uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf) 2456 { 2457 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2458 uint16_t frame_ctrl = 0; 2459 2460 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(pkt_tlvs) >> 2461 DOT11_FC1_MORE_FRAG_OFFSET; 2462 2463 /* more fragment bit if at offset bit 4 */ 2464 return frame_ctrl; 2465 } 2466 2467 /** 2468 * hal_rx_msdu_is_wlan_mcast_generic_be() - Check if the buffer is for 2469 * multicast address 2470 * @nbuf: Network buffer 2471 * 2472 * Return: flag to indicate whether the nbuf has MC/BC address 2473 */ 2474 static inline uint32_t hal_rx_msdu_is_wlan_mcast_generic_be(qdf_nbuf_t nbuf) 2475 { 2476 uint8_t *buf = qdf_nbuf_data(nbuf); 2477 2478 return HAL_RX_TLV_IS_MCAST_GET(buf);; 2479 } 2480 2481 /** 2482 * hal_rx_msdu_start_msdu_len_set_be() - API to set the MSDU length 2483 * from rx_msdu_start TLV 2484 * @buf: pointer to the start of RX PKT TLV headers 2485 * @len: msdu length 2486 * 2487 * Return: none 2488 */ 2489 static inline void 2490 hal_rx_msdu_start_msdu_len_set_be(uint8_t *buf, uint32_t len) 2491 { 2492 HAL_RX_TLV_MSDU_LEN_GET(buf) = len; 2493 } 2494 2495 /** 2496 * hal_rx_mpdu_start_mpdu_qos_control_valid_get_be() - 2497 * Retrieve qos control valid bit from the tlv. 2498 * @buf: pointer to rx pkt TLV. 2499 * 2500 * Return: qos control value. 2501 */ 2502 static inline uint32_t 2503 hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(uint8_t *buf) 2504 { 2505 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2506 2507 return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(pkt_tlvs); 2508 } 2509 2510 /** 2511 * hal_rx_msdu_end_sa_sw_peer_id_get_be() - API to get the 2512 * sa_sw_peer_id from rx_msdu_end TLV 2513 * @buf: pointer to the start of RX PKT TLV headers 2514 * 2515 * Return: sa_sw_peer_id index 2516 */ 2517 static inline uint32_t 2518 hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t *buf) 2519 { 2520 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2521 2522 hal_rx_msdu_end_t *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; 2523 2524 return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end); 2525 } 2526 #endif /* _HAL_BE_RX_TLV_H_ */ 2527