1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _HAL_BE_RX_TLV_H_ 21 #define _HAL_BE_RX_TLV_H_ 22 23 #include "hal_api_mon.h" 24 25 /* 26 * Structures & Macros to obtain fields from the TLV's in the Rx packet 27 * pre-header. 28 */ 29 30 #define HAL_RX_BE_PKT_HDR_TLV_LEN 112 31 32 #ifndef CONFIG_WORD_BASED_TLV 33 typedef struct rx_mpdu_start hal_rx_mpdu_start_t; 34 typedef struct rx_msdu_end hal_rx_msdu_end_t; 35 #endif 36 37 #define RX_BE_PADDING0_BYTES 8 38 /* 39 * Each RX descriptor TLV is preceded by 1 QWORD "tag" 40 */ 41 42 struct rx_pkt_hdr_tlv { 43 uint64_t tag; /* 8 B */ 44 uint64_t phy_ppdu_id; /* 8 B */ 45 char rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; /* 112 B */ 46 }; 47 48 #ifndef CONFIG_NO_TLV_TAGS 49 struct rx_mpdu_start_tlv { 50 uint64_t tag; /* 8 B */ 51 hal_rx_mpdu_start_t rx_mpdu_start; 52 }; 53 54 struct rx_msdu_end_tlv { 55 uint64_t tag; /* 8 B */ 56 hal_rx_msdu_end_t rx_msdu_end; 57 }; 58 59 struct rx_pkt_tlvs { 60 struct rx_msdu_end_tlv msdu_end_tlv; /* 120 bytes */ 61 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */ 62 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */ 63 #ifndef NO_RX_PKT_HDR_TLV 64 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 65 #endif 66 }; 67 68 #else 69 struct rx_mpdu_start_tlv { 70 hal_rx_mpdu_start_t rx_mpdu_start; 71 }; 72 73 struct rx_msdu_end_tlv { 74 hal_rx_msdu_end_t rx_msdu_end; 75 }; 76 77 struct rx_pkt_tlvs { 78 struct rx_msdu_end_tlv msdu_end_tlv; /* 128 bytes */ 79 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */ 80 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */ 81 #ifndef NO_RX_PKT_HDR_TLV 82 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 83 #endif 84 }; 85 #endif 86 87 /** 88 * struct rx_mon_pkt_tlvs - RX packet data structure for DEST ring in the 89 * monitor mode. 90 * @msdu_end_tlv: MSDU end TLV 91 * @rx_padding0: Padding bytes 92 * @mpdu_start_tlv: MPDU start TLV 93 * @pkt_hdr_tlv: 802.11 packet header TLV 94 */ 95 struct rx_mon_pkt_tlvs { 96 struct rx_msdu_end_tlv msdu_end_tlv; /* 128B + sizeof(tag) */ 97 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8B */ 98 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120B + sizeof(tag) */ 99 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 120B + sizeof(tag) */ 100 }; 101 102 #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs) 103 #define SIZE_OF_MON_DATA_RX_TLV sizeof(struct rx_mon_pkt_tlvs) 104 105 #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV 106 #define MON_RX_PKT_TLVS_LEN SIZE_OF_MON_DATA_RX_TLV 107 108 #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field) 109 110 #ifndef CONFIG_WORD_BASED_TLV 111 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 112 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 113 114 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 115 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 116 rx_mpdu_start.rx_mpdu_info_details) 117 118 #else /* CONFIG_WORD_BASED_TLV */ 119 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 120 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 121 122 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 123 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 124 rx_mpdu_start) 125 #endif /* CONFIG_WORD_BASED_TLV */ 126 127 #define HAL_RX_TLV_MSDU_DONE_GET(_rx_pkt_tlv) \ 128 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_done 129 130 #define HAL_RX_TLV_DECAP_FORMAT_GET(_rx_pkt_tlv) \ 131 HAL_RX_MSDU_END(_rx_pkt_tlv).decap_format 132 133 #ifdef RECEIVE_OFFLOAD 134 #define HAL_RX_TLV_GET_TCP_PURE_ACK(_rx_pkt_tlv) \ 135 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_only_ack 136 137 #define HAL_RX_TLV_GET_TCP_PROTO(_rx_pkt_tlv) \ 138 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_proto 139 140 #define HAL_RX_TLV_GET_UDP_PROTO(_rx_pkt_tlv) \ 141 HAL_RX_MSDU_END(_rx_pkt_tlv).udp_proto 142 143 #define HAL_RX_TLV_GET_IPV6(_rx_pkt_tlv) \ 144 HAL_RX_MSDU_END(_rx_pkt_tlv).ipv6_proto 145 146 #define HAL_RX_TLV_GET_IP_OFFSET(_rx_pkt_tlv) \ 147 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_offset 148 149 #define HAL_RX_TLV_GET_TCP_OFFSET(_rx_pkt_tlv) \ 150 HAL_RX_MSDU_END(_rx_pkt_tlv).l4_offset 151 #endif /* RECEIVE_OFFLOAD */ 152 153 #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(_rx_pkt_tlv) \ 154 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 155 156 #define HAL_RX_TLV_MSDU_LEN_GET(_rx_pkt_tlv) \ 157 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_length 158 159 #define HAL_RX_TLV_CCE_MATCH_GET(_rx_pkt_tlv) \ 160 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_match 161 162 #define HAL_RX_TLV_PHY_PPDU_ID_GET(_rx_pkt_tlv) \ 163 HAL_RX_MSDU_END(_rx_pkt_tlv).phy_ppdu_id 164 165 #define HAL_RX_TLV_BW_GET(_rx_pkt_tlv) \ 166 HAL_RX_MSDU_END(_rx_pkt_tlv).receive_bandwidth 167 168 #define HAL_RX_TLV_FLOWID_TOEPLITZ_GET(_rx_pkt_tlv) \ 169 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 170 171 #define HAL_RX_TLV_SGI_GET(_rx_pkt_tlv) \ 172 HAL_RX_MSDU_END(_rx_pkt_tlv).sgi 173 174 #define HAL_RX_TLV_RATE_MCS_GET(_rx_pkt_tlv) \ 175 HAL_RX_MSDU_END(_rx_pkt_tlv).rate_mcs 176 177 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 178 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 179 180 #define HAL_RX_TLV_RSSI_GET(_rx_pkt_tlv) \ 181 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 182 183 #define HAL_RX_TLV_FREQ_GET(_rx_pkt_tlv) \ 184 HAL_RX_MSDU_END(_rx_pkt_tlv).sw_phy_meta_data 185 186 #define HAL_RX_TLV_PKT_TYPE_GET(_rx_pkt_tlv) \ 187 HAL_RX_MSDU_END(_rx_pkt_tlv).pkt_type 188 189 #define HAL_RX_TLV_DECRYPT_ERR_GET(_rx_pkt_tlv) \ 190 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_err 191 192 #define HAL_RX_TLV_MIC_ERR_GET(_rx_pkt_tlv) \ 193 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err 194 195 #define HAL_RX_TLV_MIMO_SS_BITMAP(_rx_pkt_tlv)\ 196 HAL_RX_MSDU_END(_rx_pkt_tlv).mimo_ss_bitmap 197 198 #define HAL_RX_TLV_ANT_SIGNAL_DB_GET(_rx_pkt_tlv) \ 199 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 200 201 #define HAL_RX_TLV_STBC_GET(_rx_pkt_tlv) \ 202 HAL_RX_MSDU_END(_rx_pkt_tlv).stbc 203 204 #define HAL_RX_TLV_RECEPTION_TYPE_GET(_rx_pkt_tlv) \ 205 HAL_RX_MSDU_END(_rx_pkt_tlv).reception_type 206 207 #define HAL_RX_TLV_IP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 208 HAL_RX_MSDU_END(_rx_pkt_tlv).ip_chksum_fail 209 210 #define HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 211 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum_fail 212 213 #define HAL_RX_TLV_MPDU_LEN_ERR_GET(_rx_pkt_tlv) \ 214 HAL_RX_MSDU_END(_rx_pkt_tlv).mpdu_length_err 215 216 #define HAL_RX_TLV_MPDU_FCS_ERR_GET(_rx_pkt_tlv) \ 217 HAL_RX_MSDU_END(_rx_pkt_tlv).fcs_err 218 219 #define HAL_RX_TLV_IS_MCAST_GET(_rx_pkt_tlv) \ 220 HAL_RX_MSDU_END(_rx_pkt_tlv).mcast_bcast 221 222 #ifndef CONFIG_WORD_BASED_TLV 223 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 224 HAL_RX_MPDU_START(_rx_pkt_tlv).first_mpdu 225 #else 226 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 227 HAL_RX_MSDU_END(_rx_pkt_tlv).first_mpdu 228 #endif 229 230 #ifdef RECEIVE_OFFLOAD 231 /** 232 * LRO information needed from the TLVs 233 */ 234 #define HAL_RX_TLV_GET_LRO_ELIGIBLE(_rx_pkt_tlv) \ 235 HAL_RX_MSDU_END(_rx_pkt_tlv).lro_eligible 236 237 #define HAL_RX_TLV_GET_TCP_ACK(_rx_pkt_tlv) \ 238 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_ack_number 239 240 #define HAL_RX_TLV_GET_TCP_SEQ(_rx_pkt_tlv) \ 241 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_seq_number 242 243 #define HAL_RX_TLV_GET_TCP_WIN(_rx_pkt_tlv) \ 244 HAL_RX_MSDU_END(_rx_pkt_tlv).window_size 245 #endif 246 247 #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \ 248 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type 249 250 #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET 251 #define HAL_RX_TLV_MSDU_PEER_META_DATA_GET(_rx_pkt_tlv) \ 252 HAL_RX_MSDU_END(_rx_pkt_tlv).peer_meta_data 253 #endif 254 255 #define HAL_RX_GET_FILTER_CATEGORY(_rx_pkt_tlv) \ 256 HAL_RX_MPDU_START(_rx_pkt_tlv).rxpcu_mpdu_filter_in_category 257 258 #define HAL_RX_GET_PPDU_ID(_rx_pkt_tlv) \ 259 HAL_RX_MPDU_START(_rx_pkt_tlv).phy_ppdu_id 260 261 #define HAL_RX_TLV_PEER_META_DATA_GET(_rx_pkt_tlv) \ 262 HAL_RX_MPDU_START(_rx_pkt_tlv).peer_meta_data 263 264 #define HAL_RX_TLV_AMPDU_FLAG_GET(_rx_pkt_tlv) \ 265 HAL_RX_MPDU_START(_rx_pkt_tlv).ampdu_flag 266 267 #define HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(_rx_pkt_tlv) \ 268 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_frame_group_id 269 270 #define HAL_RX_TLV_KEYID_OCTET_GET(_rx_pkt_tlv) \ 271 HAL_RX_MSDU_END(_rx_pkt_tlv).key_id_octet 272 273 #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(_rx_pkt_tlv) \ 274 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_number 275 276 #define HAL_RX_TLV_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 277 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 278 279 #define HAL_RX_TLV_L3_HEADER_PADDING_GET(_rx_pkt_tlv) \ 280 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_header_padding 281 282 #define HAL_RX_TLV_SA_IDX_GET(_rx_pkt_tlv) \ 283 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_idx 284 285 #define HAL_RX_TLV_DA_IDX_GET(_rx_pkt_tlv) \ 286 HAL_RX_MSDU_END(_rx_pkt_tlv).da_idx_or_sw_peer_id 287 288 #define HAL_RX_TLV_FIRST_MSDU_GET(_rx_pkt_tlv) \ 289 HAL_RX_MSDU_END(_rx_pkt_tlv).first_msdu 290 291 #define HAL_RX_TLV_LAST_MSDU_GET(_rx_pkt_tlv) \ 292 HAL_RX_MSDU_END(_rx_pkt_tlv).last_msdu 293 294 /* 295 * Get tid from RX_MPDU_START 296 */ 297 #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \ 298 HAL_RX_MPDU_START(_rx_pkt_tlv).tid 299 300 #define HAL_RX_TLV_DA_IS_MCBC_GET(_rx_pkt_tlv) \ 301 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_mcbc 302 303 #define HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(_rx_pkt_tlv) \ 304 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err 305 306 #define HAL_RX_TLV_SA_IS_VALID_GET(_rx_pkt_tlv) \ 307 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_is_valid 308 309 #define HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(_rx_pkt_tlv) \ 310 HAL_RX_MPDU_START(_rx_pkt_tlv).frame_encryption_info_valid 311 312 #define HAL_RX_TLV_MPDU_PN_31_0_GET(_rx_pkt_tlv) \ 313 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_31_0 314 315 #define HAL_RX_TLV_MPDU_PN_63_32_GET(_rx_pkt_tlv) \ 316 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_63_32 317 318 #define HAL_RX_TLV_MPDU_PN_95_64_GET(_rx_pkt_tlv) \ 319 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_95_64 320 321 #define HAL_RX_TLV_MPDU_PN_127_96_GET(_rx_pkt_tlv) \ 322 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_127_96 323 324 #define HAL_RX_TLV_DA_IS_VALID_GET(_rx_pkt_tlv) \ 325 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_valid 326 327 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_pkt_tlv) \ 328 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_valid 329 330 #define HAL_RX_TLV_SW_PEER_ID_GET(_rx_pkt_tlv) \ 331 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_peer_id 332 333 #define HAL_RX_TLV_MPDU_GET_TODS(_rx_pkt_tlv) \ 334 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 335 336 #define HAL_RX_TLV_MPDU_GET_FROMDS(_rx_pkt_tlv) \ 337 HAL_RX_MPDU_START(_rx_pkt_tlv).fr_ds 338 339 #define HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(_rx_pkt_tlv) \ 340 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 341 342 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_pkt_tlv) \ 343 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_valid 344 345 #define HAL_RX_TLV_MPDU_AD1_31_0_GET(_rx_pkt_tlv) \ 346 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_31_0 347 348 #define HAL_RX_TLV_MPDU_AD1_47_32_GET(_rx_pkt_tlv) \ 349 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_47_32 350 351 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_pkt_tlv) \ 352 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_valid 353 354 #define HAL_RX_TLV_MPDU_AD2_15_0_GET(_rx_pkt_tlv) \ 355 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_15_0 356 357 #define HAL_RX_TLV_MPDU_AD2_47_16_GET(_rx_pkt_tlv) \ 358 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_47_16 359 360 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_pkt_tlv) \ 361 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_valid 362 363 #define HAL_RX_TLV_MPDU_AD3_31_0_GET(_rx_pkt_tlv) \ 364 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_31_0 365 366 #define HAL_RX_TLV_MPDU_AD3_47_32_GET(_rx_pkt_tlv) \ 367 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_47_32 368 369 #define HAL_RX_TLV_MPDU_AD4_31_0_GET(_rx_pkt_tlv) \ 370 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_31_0 371 372 #define HAL_RX_TLV_MPDU_AD4_47_32_GET(_rx_pkt_tlv) \ 373 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_47_32 374 375 #define HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_pkt_tlv) \ 376 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_control_valid 377 378 #define HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 379 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 380 381 #define HAL_RX_TLV_GET_FC_VALID(_rx_pkt_tlv) \ 382 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 383 384 #define HAL_RX_TLV_GET_TO_DS_FLAG(_rx_pkt_tlv) \ 385 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 386 387 #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_pkt_tlv) \ 388 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_field 389 390 #define HAL_RX_TLV_FLOW_IDX_GET(_rx_pkt_tlv) \ 391 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx 392 393 #define HAL_RX_TLV_REO_DEST_IND_GET(_rx_pkt_tlv) \ 394 HAL_RX_MSDU_END(_rx_pkt_tlv).reo_destination_indication 395 396 #define HAL_RX_TLV_FLOW_IDX_INVALID_GET(_rx_pkt_tlv) \ 397 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_invalid 398 399 #define HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(_rx_pkt_tlv) \ 400 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_timeout 401 402 #define HAL_RX_TLV_FSE_METADATA_GET(_rx_pkt_tlv) \ 403 HAL_RX_MSDU_END(_rx_pkt_tlv).fse_metadata 404 405 #define HAL_RX_TLV_CCE_METADATA_GET(_rx_pkt_tlv) \ 406 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_metadata 407 408 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 409 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 410 411 #define HAL_RX_TLV_GET_TCP_CHKSUM(_rx_pkt_tlv) \ 412 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum 413 414 #define HAL_RX_TLV_GET_FLOW_AGGR_CONT(_rx_pkt_tlv) \ 415 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_aggregation_continuation 416 417 #define HAL_RX_TLV_GET_FLOW_AGGR_COUNT(_rx_pkt_tlv) \ 418 HAL_RX_MSDU_END(_rx_pkt_tlv).aggregation_count 419 420 #define HAL_RX_TLV_GET_FISA_TIMEOUT(_rx_pkt_tlv) \ 421 HAL_RX_MSDU_END(_rx_pkt_tlv).fisa_timeout 422 423 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(_rx_pkt_tlv) \ 424 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_l4_checksum 425 426 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(_rx_pkt_tlv) \ 427 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_ip_length 428 429 #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 430 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 431 432 #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 433 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 434 435 #define HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(_rx_pkt_tlv) \ 436 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_31_0 437 438 #define HAL_RX_REO_QUEUE_DESC_ADDR_39_32_GET(_rx_pkt_tlv) \ 439 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_39_32 440 441 /* used by monitor mode for parsing from full TLV */ 442 #define HAL_RX_MON_GET_FC_VALID(_rx_mpdu_start) \ 443 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MPDU_FRAME_CONTROL_VALID) 444 445 #define HAL_RX_MON_GET_TO_DS_FLAG(_rx_mpdu_start) \ 446 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, TO_DS) 447 448 #define HAL_RX_MON_GET_MAC_ADDR2_VALID(_rx_mpdu_start) \ 449 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MAC_ADDR_AD2_VALID) 450 451 static inline 452 uint32_t hal_rx_tlv_decap_format_get_be(void *hw_desc_addr) 453 { 454 struct rx_pkt_tlvs *rx_pkt_tlvs = 455 (struct rx_pkt_tlvs *)hw_desc_addr; 456 457 return HAL_RX_TLV_DECAP_FORMAT_GET(rx_pkt_tlvs); 458 } 459 460 static inline uint32_t hal_rx_tlv_msdu_done_get_be(uint8_t *buf) 461 { 462 return HAL_RX_TLV_MSDU_DONE_GET(buf); 463 } 464 465 /* 466 * hal_rx_attn_first_mpdu_get(): get fist_mpdu bit from rx attention 467 * @buf: pointer to rx_pkt_tlvs 468 * 469 * return: uint32_t(first_msdu) 470 */ 471 static inline uint32_t hal_rx_tlv_first_mpdu_get_be(uint8_t *buf) 472 { 473 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 474 475 return HAL_RX_TLV_FIRST_MPDU_GET(rx_pkt_tlvs); 476 } 477 478 /* 479 * hal_rx_msdu_cce_match_get(): get CCE match bit 480 * from rx attention 481 * @buf: pointer to rx_pkt_tlvs 482 * Return: CCE match value 483 */ 484 static inline bool hal_rx_msdu_cce_match_get_be(uint8_t *buf) 485 { 486 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 487 488 return HAL_RX_TLV_CCE_MATCH_GET(rx_pkt_tlvs); 489 } 490 491 /* 492 * hal_rx_attn_phy_ppdu_id_get(): get phy_ppdu_id value 493 * from rx attention 494 * @buf: pointer to rx_pkt_tlvs 495 * 496 * Return: phy_ppdu_id 497 */ 498 static inline uint16_t hal_rx_attn_phy_ppdu_id_get_be(uint8_t *buf) 499 { 500 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 501 uint16_t phy_ppdu_id; 502 503 phy_ppdu_id = HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 504 505 return phy_ppdu_id; 506 } 507 508 /* 509 * hal_rx_tlv_phy_ppdu_id_get(): get phy_ppdu_id value 510 * from rx attention 511 * @buf: pointer to rx_pkt_tlvs 512 * 513 * Return: phy_ppdu_id 514 */ 515 static inline uint16_t hal_rx_tlv_phy_ppdu_id_get_be(uint8_t *buf) 516 { 517 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 518 519 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 520 } 521 522 /* 523 * hal_rx_mpdu_peer_meta_data_set: set peer meta data in RX mpdu start tlv 524 * 525 * @buf: rx_tlv_hdr of the received packet 526 * @peer_mdata: peer meta data to be set. 527 * Return: void 528 */ 529 static inline void 530 hal_rx_mpdu_peer_meta_data_set_be(uint8_t *buf, uint32_t peer_mdata) 531 { 532 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 533 534 HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs) = peer_mdata; 535 } 536 537 /* 538 * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START 539 */ 540 541 static inline uint32_t hal_rx_mpdu_peer_meta_data_get_be(uint8_t *buf) 542 { 543 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 544 545 return HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs); 546 } 547 548 #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET 549 /* 550 * Get peer_meta_data from RX_MSDU_END 551 */ 552 553 static inline uint32_t hal_rx_msdu_peer_meta_data_get_be(uint8_t *buf) 554 { 555 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 556 557 return HAL_RX_TLV_MSDU_PEER_META_DATA_GET(rx_pkt_tlvs); 558 } 559 #endif 560 561 /** 562 * hal_rx_mpdu_info_ampdu_flag_get_be(): get ampdu flag bit 563 * from rx mpdu info 564 * @buf: pointer to rx_pkt_tlvs 565 * 566 * Return: ampdu flag 567 */ 568 static inline bool hal_rx_mpdu_info_ampdu_flag_get_be(uint8_t *buf) 569 { 570 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 571 572 return !!HAL_RX_TLV_AMPDU_FLAG_GET(rx_pkt_tlvs); 573 } 574 575 /** 576 * hal_rx_tlv_msdu_len_get(): API to get the MSDU length 577 * from rx_msdu_start TLV 578 * 579 * @ buf: pointer to the start of RX PKT TLV headers 580 * Return: msdu length 581 */ 582 static inline uint32_t hal_rx_tlv_msdu_len_get_be(uint8_t *buf) 583 { 584 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 585 586 return HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 587 } 588 589 /** 590 * hal_rx_tlv_msdu_len_set(): API to set the MSDU length 591 * from rx_msdu_start TLV 592 * 593 * @buf: pointer to the start of RX PKT TLV headers 594 * @len: msdu length 595 * 596 * Return: none 597 */ 598 static inline void hal_rx_tlv_msdu_len_set_be(uint8_t *buf, uint32_t len) 599 { 600 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 601 602 HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs) = len; 603 } 604 605 /* 606 * hal_rx_tlv_bw_get(): API to get the Bandwidth 607 * Interval from rx_msdu_start 608 * 609 * @buf: pointer to the start of RX PKT TLV header 610 * Return: uint32_t(bw) 611 */ 612 static inline uint32_t hal_rx_tlv_bw_get_be(uint8_t *buf) 613 { 614 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 615 616 return HAL_RX_TLV_BW_GET(rx_pkt_tlvs); 617 } 618 619 /** 620 * hal_rx_tlv_toeplitz_get: API to get the toeplitz hash 621 * from rx_msdu_start TLV 622 * 623 * @ buf: pointer to the start of RX PKT TLV headers 624 * Return: toeplitz hash 625 */ 626 static inline uint32_t hal_rx_tlv_toeplitz_get_be(uint8_t *buf) 627 { 628 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 629 630 return HAL_RX_TLV_FLOWID_TOEPLITZ_GET(rx_pkt_tlvs); 631 } 632 633 /** 634 * hal_rx_tlv_msdu_sgi_get(): API to get the Short Gaurd 635 * Interval from rx_msdu_start TLV 636 * 637 * @buf: pointer to the start of RX PKT TLV headers 638 * Return: uint32_t(sgi) 639 */ 640 static inline uint32_t hal_rx_tlv_sgi_get_be(uint8_t *buf) 641 { 642 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 643 644 return HAL_RX_TLV_SGI_GET(rx_pkt_tlvs); 645 } 646 647 /** 648 * hal_rx_tlv_msdu_rate_mcs_get(): API to get the MCS rate 649 * from rx_msdu_start TLV 650 * 651 * @buf: pointer to the start of RX PKT TLV headers 652 * Return: uint32_t(rate_mcs) 653 */ 654 static inline uint32_t hal_rx_tlv_rate_mcs_get_be(uint8_t *buf) 655 { 656 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 657 uint32_t rate_mcs; 658 659 rate_mcs = HAL_RX_TLV_RATE_MCS_GET(rx_pkt_tlvs); 660 661 return rate_mcs; 662 } 663 664 /* 665 * Get key index from RX_MSDU_END 666 */ 667 /* 668 * hal_rx_msdu_get_keyid(): API to get the key id if the decrypted packet 669 * from rx_msdu_end 670 * 671 * @buf: pointer to the start of RX PKT TLV header 672 * Return: uint32_t(key id) 673 */ 674 675 static inline uint8_t hal_rx_msdu_get_keyid_be(uint8_t *buf) 676 { 677 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 678 uint32_t keyid_octet; 679 680 keyid_octet = HAL_RX_TLV_KEYID_OCTET_GET(rx_pkt_tlvs); 681 682 return keyid_octet & 0x3; 683 } 684 685 /* 686 * hal_rx_tlv_get_rssi(): API to get the rssi of received pkt 687 * from rx_msdu_start 688 * 689 * @buf: pointer to the start of RX PKT TLV header 690 * Return: uint32_t(rssi) 691 */ 692 693 static inline uint32_t hal_rx_tlv_get_rssi_be(uint8_t *buf) 694 { 695 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 696 uint32_t rssi; 697 698 rssi = HAL_RX_TLV_RSSI_GET(rx_pkt_tlvs); 699 700 return rssi; 701 } 702 703 /* 704 * hal_rx_tlv_get_freq(): API to get the frequency of operating channel 705 * from rx_msdu_start 706 * 707 * @buf: pointer to the start of RX PKT TLV header 708 * Return: uint32_t(frequency) 709 */ 710 711 static inline uint32_t hal_rx_tlv_get_freq_be(uint8_t *buf) 712 { 713 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 714 uint32_t freq; 715 716 freq = HAL_RX_TLV_FREQ_GET(rx_pkt_tlvs); 717 718 return freq; 719 } 720 721 722 /* 723 * hal_rx_tlv_get_pkt_type(): API to get the pkt type 724 * from rx_msdu_start 725 * 726 * @buf: pointer to the start of RX PKT TLV header 727 * Return: uint32_t(pkt type) 728 */ 729 730 static inline uint32_t hal_rx_tlv_get_pkt_type_be(uint8_t *buf) 731 { 732 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 733 uint32_t pkt_type; 734 735 pkt_type = HAL_RX_TLV_PKT_TYPE_GET(rx_pkt_tlvs); 736 737 return pkt_type; 738 } 739 740 /******************************************************************************* 741 * RX ERROR APIS 742 ******************************************************************************/ 743 744 /** 745 * hal_rx_tlv_decrypt_err_get(): API to get the Decrypt ERR 746 * from rx_mpdu_end TLV 747 * 748 * @buf: pointer to the start of RX PKT TLV headers 749 * Return: uint32_t(decrypt_err) 750 */ 751 static inline uint32_t hal_rx_tlv_decrypt_err_get_be(uint8_t *buf) 752 { 753 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 754 uint32_t decrypt_err; 755 756 decrypt_err = HAL_RX_TLV_DECRYPT_ERR_GET(rx_pkt_tlvs); 757 758 return decrypt_err; 759 } 760 761 /** 762 * hal_rx_tlv_mic_err_get(): API to get the MIC ERR 763 * from rx_tlv TLV 764 * 765 * @buf: pointer to the start of RX PKT TLV headers 766 * Return: uint32_t(mic_err) 767 */ 768 static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf) 769 { 770 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 771 uint32_t mic_err; 772 773 mic_err = HAL_RX_TLV_MIC_ERR_GET(rx_pkt_tlvs); 774 775 return mic_err; 776 } 777 778 /** 779 * hal_get_reo_ent_desc_qdesc_addr_be(): API to get qdesc address of reo 780 * entrance ring desc 781 * 782 * @desc: reo entrance ring descriptor 783 * Return: qdesc adrress 784 */ 785 static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc) 786 { 787 return desc + REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET; 788 } 789 790 /** 791 * hal_rx_get_qdesc_addr_be(): API to get qdesc address of reo 792 * entrance ring desc 793 * 794 * @dst_ring_desc: reo dest ring descriptor (used for Lithium DP) 795 * @buf: pointer to the start of RX PKT TLV headers 796 * Return: qdesc adrress in reo destination ring buffer 797 */ 798 static inline uint64_t hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc, 799 uint8_t *buf) 800 { 801 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 802 803 return (uint64_t)HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(rx_pkt_tlvs); 804 } 805 806 /** 807 * hal_set_reo_ent_desc_reo_dest_ind_be(): API to set reo destination 808 * indication of reo entrance ring desc 809 * 810 * @desc: reo ent ring descriptor 811 * @dst_ind: reo destination indication value 812 * Return: None 813 */ 814 static inline void 815 hal_set_reo_ent_desc_reo_dest_ind_be(uint8_t *desc, uint32_t dst_ind) 816 { 817 HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING, 818 REO_DESTINATION_INDICATION, dst_ind); 819 } 820 821 /** 822 * hal_rx_mpdu_sequence_number_get() - Get mpdu sequence number 823 * @buf: pointer to packet buffer 824 * 825 * Return: mpdu sequence 826 */ 827 static inline int hal_rx_mpdu_sequence_number_get_be(uint8_t *buf) 828 { 829 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 830 831 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 832 } 833 834 /** 835 * hal_rx_msdu_packet_metadata_get(): API to get the 836 * msdu information from rx_msdu_end TLV 837 * 838 * @ buf: pointer to the start of RX PKT TLV headers 839 * @ hal_rx_msdu_metadata: pointer to the msdu info structure 840 */ 841 static inline void 842 hal_rx_msdu_packet_metadata_get_generic_be(uint8_t *buf, 843 void *pkt_msdu_metadata) 844 { 845 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 846 struct hal_rx_msdu_metadata *msdu_metadata = 847 (struct hal_rx_msdu_metadata *)pkt_msdu_metadata; 848 849 msdu_metadata->l3_hdr_pad = 850 HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 851 msdu_metadata->sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 852 msdu_metadata->da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 853 msdu_metadata->sa_sw_peer_id = 854 HAL_RX_TLV_SA_SW_PEER_ID_GET(rx_pkt_tlvs); 855 } 856 857 /* 858 * hal_rx_msdu_start_nss_get_kiwi(): API to get the NSS 859 * Interval from rx_msdu_start 860 * 861 * @buf: pointer to the start of RX PKT TLV header 862 * Return: uint32_t(nss) 863 */ 864 static inline uint32_t hal_rx_tlv_nss_get_be(uint8_t *buf) 865 { 866 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 867 uint8_t mimo_ss_bitmap; 868 869 mimo_ss_bitmap = HAL_RX_TLV_MIMO_SS_BITMAP(rx_pkt_tlvs); 870 871 return qdf_get_hweight8(mimo_ss_bitmap); 872 } 873 874 #ifdef GET_MSDU_AGGREGATION 875 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)\ 876 {\ 877 bool first_msdu, last_msdu; \ 878 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_desc);\ 879 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_desc);\ 880 if (first_msdu && last_msdu)\ 881 rs->rs_flags &= (~IEEE80211_AMSDU_FLAG);\ 882 else\ 883 rs->rs_flags |= (IEEE80211_AMSDU_FLAG); \ 884 } \ 885 886 #define HAL_RX_SET_MSDU_AGGREGATION((rs_mpdu), (rs_ppdu))\ 887 {\ 888 if (rs_mpdu->rs_flags & IEEE80211_AMSDU_FLAG)\ 889 rs_ppdu->rs_flags |= IEEE80211_AMSDU_FLAG;\ 890 } \ 891 892 #else 893 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs) 894 #define HAL_RX_SET_MSDU_AGGREGATION(rs_mpdu, rs_ppdu) 895 #endif 896 897 /** 898 * hal_rx_mon_hw_desc_get_mpdu_status_be(): Retrieve MPDU status 899 * 900 * @ hw_desc_addr: Start address of Rx HW TLVs 901 * @ rs: Status for monitor mode 902 * 903 * Return: void 904 */ 905 static inline void 906 hal_rx_mon_hw_desc_get_mpdu_status_be(void *hw_desc_addr, 907 struct mon_rx_status *rs) 908 { 909 uint32_t reg_value; 910 struct rx_pkt_tlvs *rx_desc = 911 (struct rx_pkt_tlvs *)hw_desc_addr; 912 const uint32_t sgi_hw_to_cdp[] = { 913 CDP_SGI_0_8_US, 914 CDP_SGI_0_4_US, 915 CDP_SGI_1_6_US, 916 CDP_SGI_3_2_US, 917 }; 918 919 HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs); 920 921 rs->ant_signal_db = HAL_RX_TLV_ANT_SIGNAL_DB_GET(rx_desc); 922 rs->is_stbc = HAL_RX_TLV_STBC_GET(rx_desc); 923 924 reg_value = HAL_RX_TLV_SGI_GET(rx_desc); 925 rs->sgi = sgi_hw_to_cdp[reg_value]; 926 927 reg_value = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_desc); 928 rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0; 929 /* TODO: rs->beamformed should be set for SU beamforming also */ 930 } 931 932 static inline uint32_t hal_rx_tlv_tid_get_be(uint8_t *buf) 933 { 934 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 935 uint32_t tid; 936 937 tid = HAL_RX_TLV_TID_GET(rx_pkt_tlvs); 938 939 return tid; 940 } 941 942 /* 943 * hal_rx_tlv_reception_type_get(): API to get the reception type 944 * Interval from rx_msdu_start 945 * 946 * @buf: pointer to the start of RX PKT TLV header 947 * Return: uint32_t(reception_type) 948 */ 949 static inline 950 uint32_t hal_rx_tlv_reception_type_get_be(uint8_t *buf) 951 { 952 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 953 uint32_t reception_type; 954 955 reception_type = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_pkt_tlvs); 956 957 return reception_type; 958 } 959 960 /** 961 * hal_rx_msdu_end_da_idx_get_be: API to get da_idx 962 * from rx_msdu_end TLV 963 * 964 * @ buf: pointer to the start of RX PKT TLV headers 965 * Return: da index 966 */ 967 static inline uint16_t hal_rx_msdu_end_da_idx_get_be(uint8_t *buf) 968 { 969 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 970 uint16_t da_idx; 971 972 da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 973 974 return da_idx; 975 } 976 977 /** 978 * hal_rx_get_rx_fragment_number_be(): Function to retrieve rx fragment number 979 * 980 * @nbuf: Network buffer 981 * Returns: rx fragment number 982 */ 983 static inline 984 uint8_t hal_rx_get_rx_fragment_number_be(uint8_t *buf) 985 { 986 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 987 988 /* Return first 4 bits as fragment number */ 989 return (HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs) & 990 DOT11_SEQ_FRAG_MASK); 991 } 992 993 /** 994 * hal_rx_msdu_end_da_is_mcbc_get_be(): API to check if pkt is MCBC 995 * from rx_msdu_end TLV 996 * 997 * @ buf: pointer to the start of RX PKT TLV headers 998 * Return: da_is_mcbc 999 */ 1000 static inline uint8_t 1001 hal_rx_tlv_da_is_mcbc_get_be(uint8_t *buf) 1002 { 1003 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1004 1005 return HAL_RX_TLV_DA_IS_MCBC_GET(rx_pkt_tlvs); 1006 } 1007 1008 /** 1009 * hal_rx_tlv_is_tkip_mic_err_get_be(): API to get tkip Mic error 1010 * from rx_msdu_end TLV 1011 * 1012 * @ buf: pointer to the start of RX PKT TLV headers 1013 * Return: tkip_mic_err 1014 */ 1015 static inline uint8_t 1016 hal_rx_tlv_is_tkip_mic_err_get_be(uint8_t *buf) 1017 { 1018 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1019 1020 return HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(rx_pkt_tlvs); 1021 } 1022 1023 /** 1024 * hal_rx_tlvd_sa_is_valid_get_be(): API to get the sa_is_valid bit from 1025 * rx_msdu_end TLV 1026 * 1027 * @ buf: pointer to the start of RX PKT TLV headers 1028 * Return: sa_is_valid bit 1029 */ 1030 static inline uint8_t 1031 hal_rx_tlv_sa_is_valid_get_be(uint8_t *buf) 1032 { 1033 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1034 uint8_t sa_is_valid; 1035 1036 sa_is_valid = HAL_RX_TLV_SA_IS_VALID_GET(rx_pkt_tlvs); 1037 1038 return sa_is_valid; 1039 } 1040 1041 /** 1042 * hal_rx_tlv_sa_idx_get_be(): API to get the sa_idx from rx_msdu_end TLV 1043 * 1044 * @ buf: pointer to the start of RX PKT TLV headers 1045 * Return: sa_idx (SA AST index) 1046 */ 1047 static inline 1048 uint16_t hal_rx_tlv_sa_idx_get_be(uint8_t *buf) 1049 { 1050 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1051 uint16_t sa_idx; 1052 1053 sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 1054 1055 return sa_idx; 1056 } 1057 1058 /** 1059 * hal_rx_desc_is_first_msdu_be() - Check if first msdu 1060 * 1061 * @hal_soc_hdl: hal_soc handle 1062 * @hw_desc_addr: hardware descriptor address 1063 * 1064 * Return: 0 - success/ non-zero failure 1065 */ 1066 static inline uint32_t hal_rx_desc_is_first_msdu_be(void *hw_desc_addr) 1067 { 1068 struct rx_pkt_tlvs *rx_pkt_tlvs = 1069 (struct rx_pkt_tlvs *)hw_desc_addr; 1070 1071 return HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 1072 } 1073 1074 /** 1075 * hal_rx_tlv_l3_hdr_padding_get_be(): API to get the l3_header padding 1076 * from rx_msdu_end TLV 1077 * 1078 * @ buf: pointer to the start of RX PKT TLV headers 1079 * Return: number of l3 header padding bytes 1080 */ 1081 static inline uint32_t hal_rx_tlv_l3_hdr_padding_get_be(uint8_t *buf) 1082 { 1083 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1084 uint32_t l3_header_padding; 1085 1086 l3_header_padding = HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 1087 1088 return l3_header_padding; 1089 } 1090 1091 /* 1092 * @ hal_rx_encryption_info_valid_be: Returns encryption type. 1093 * 1094 * @ buf: rx_tlv_hdr of the received packet 1095 * @ Return: encryption type 1096 */ 1097 static inline uint32_t hal_rx_encryption_info_valid_be(uint8_t *buf) 1098 { 1099 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1100 uint32_t encryption_info = 1101 HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(rx_pkt_tlvs); 1102 1103 return encryption_info; 1104 } 1105 1106 /* 1107 * @ hal_rx_print_pn_be: Prints the PN of rx packet. 1108 * 1109 * @ buf: rx_tlv_hdr of the received packet 1110 * @ Return: void 1111 */ 1112 static inline void hal_rx_print_pn_be(uint8_t *buf) 1113 { 1114 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1115 1116 uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 1117 uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs); 1118 uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 1119 uint32_t pn_127_96 = HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs); 1120 1121 hal_debug_rl("PN number pn_127_96 0x%x pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x ", 1122 pn_127_96, pn_95_64, pn_63_32, pn_31_0); 1123 } 1124 1125 static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num) 1126 { 1127 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1128 1129 pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 1130 pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs) << 32); 1131 1132 pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 1133 pn_num[1] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs) << 32); 1134 } 1135 1136 /** 1137 * hal_rx_tlv_first_msdu_get_be: API to get first msdu status 1138 * from rx_msdu_end TLV 1139 * 1140 * @ buf: pointer to the start of RX PKT TLV headers 1141 * Return: first_msdu 1142 */ 1143 static inline uint8_t hal_rx_tlv_first_msdu_get_be(uint8_t *buf) 1144 { 1145 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1146 uint8_t first_msdu; 1147 1148 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 1149 1150 return first_msdu; 1151 } 1152 1153 /** 1154 * hal_rx_tlv_da_is_valid_get_be: API to check if da is valid 1155 * from rx_msdu_end TLV 1156 * 1157 * @ buf: pointer to the start of RX PKT TLV headers 1158 * Return: da_is_valid 1159 */ 1160 static inline uint8_t hal_rx_tlv_da_is_valid_get_be(uint8_t *buf) 1161 { 1162 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1163 uint8_t da_is_valid; 1164 1165 da_is_valid = HAL_RX_TLV_DA_IS_VALID_GET(rx_pkt_tlvs); 1166 1167 return da_is_valid; 1168 } 1169 1170 /** 1171 * hal_rx_tlv_last_msdu_get_be: API to get last msdu status 1172 * from rx_msdu_end TLV 1173 * 1174 * @ buf: pointer to the start of RX PKT TLV headers 1175 * Return: last_msdu 1176 */ 1177 static inline uint8_t hal_rx_tlv_last_msdu_get_be(uint8_t *buf) 1178 { 1179 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1180 uint8_t last_msdu; 1181 1182 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_pkt_tlvs); 1183 1184 return last_msdu; 1185 } 1186 1187 /* 1188 * hal_rx_get_mpdu_mac_ad4_valid_be(): Retrieves if mpdu 4th addr is valid 1189 * 1190 * @nbuf: Network buffer 1191 * Returns: value of mpdu 4th address valid field 1192 */ 1193 static inline bool hal_rx_get_mpdu_mac_ad4_valid_be(uint8_t *buf) 1194 { 1195 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1196 bool ad4_valid = 0; 1197 1198 ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs); 1199 1200 return ad4_valid; 1201 } 1202 1203 /** 1204 * hal_rx_mpdu_start_sw_peer_id_get_be: Retrieve sw peer_id 1205 * @buf: network buffer 1206 * 1207 * Return: sw peer_id 1208 */ 1209 static inline uint32_t hal_rx_mpdu_start_sw_peer_id_get_be(uint8_t *buf) 1210 { 1211 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1212 1213 return HAL_RX_TLV_SW_PEER_ID_GET(rx_pkt_tlvs); 1214 } 1215 1216 /** 1217 * hal_rx_mpdu_get_to_ds_be(): API to get the tods info 1218 * from rx_mpdu_start 1219 * 1220 * @buf: pointer to the start of RX PKT TLV header 1221 * Return: uint32_t(to_ds) 1222 */ 1223 static inline uint32_t hal_rx_mpdu_get_to_ds_be(uint8_t *buf) 1224 { 1225 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1226 1227 return HAL_RX_TLV_MPDU_GET_TODS(rx_pkt_tlvs); 1228 } 1229 1230 /* 1231 * hal_rx_mpdu_get_fr_ds_be(): API to get the from ds info 1232 * from rx_mpdu_start 1233 * 1234 * @buf: pointer to the start of RX PKT TLV header 1235 * Return: uint32_t(fr_ds) 1236 */ 1237 static inline uint32_t hal_rx_mpdu_get_fr_ds_be(uint8_t *buf) 1238 { 1239 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1240 1241 return HAL_RX_TLV_MPDU_GET_FROMDS(rx_pkt_tlvs); 1242 } 1243 1244 /* 1245 * hal_rx_get_mpdu_frame_control_valid_be(): Retrieves mpdu 1246 * frame control valid 1247 * 1248 * @nbuf: Network buffer 1249 * Returns: value of frame control valid field 1250 */ 1251 static inline uint8_t hal_rx_get_mpdu_frame_control_valid_be(uint8_t *buf) 1252 { 1253 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1254 1255 return HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(rx_pkt_tlvs); 1256 } 1257 1258 /* 1259 * hal_rx_mpdu_get_addr1_be(): API to check get address1 of the mpdu 1260 * 1261 * @buf: pointer to the start of RX PKT TLV headera 1262 * @mac_addr: pointer to mac address 1263 * Return: success/failure 1264 */ 1265 static inline QDF_STATUS hal_rx_mpdu_get_addr1_be(uint8_t *buf, 1266 uint8_t *mac_addr) 1267 { 1268 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1269 struct __attribute__((__packed__)) hal_addr1 { 1270 uint32_t ad1_31_0; 1271 uint16_t ad1_47_32; 1272 }; 1273 struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr; 1274 uint32_t mac_addr_ad1_valid; 1275 1276 mac_addr_ad1_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(rx_pkt_tlvs); 1277 1278 if (mac_addr_ad1_valid) { 1279 addr->ad1_31_0 = HAL_RX_TLV_MPDU_AD1_31_0_GET(rx_pkt_tlvs); 1280 addr->ad1_47_32 = HAL_RX_TLV_MPDU_AD1_47_32_GET(rx_pkt_tlvs); 1281 return QDF_STATUS_SUCCESS; 1282 } 1283 1284 return QDF_STATUS_E_FAILURE; 1285 } 1286 1287 /* 1288 * hal_rx_mpdu_get_addr2_be(): API to check get address2 of the mpdu 1289 * in the packet 1290 * 1291 * @buf: pointer to the start of RX PKT TLV header 1292 * @mac_addr: pointer to mac address 1293 * Return: success/failure 1294 */ 1295 static inline QDF_STATUS hal_rx_mpdu_get_addr2_be(uint8_t *buf, 1296 uint8_t *mac_addr) 1297 { 1298 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1299 struct __attribute__((__packed__)) hal_addr2 { 1300 uint16_t ad2_15_0; 1301 uint32_t ad2_47_16; 1302 }; 1303 struct hal_addr2 *addr = (struct hal_addr2 *)mac_addr; 1304 uint32_t mac_addr_ad2_valid; 1305 1306 mac_addr_ad2_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1307 1308 if (mac_addr_ad2_valid) { 1309 addr->ad2_15_0 = HAL_RX_TLV_MPDU_AD2_15_0_GET(rx_pkt_tlvs); 1310 addr->ad2_47_16 = HAL_RX_TLV_MPDU_AD2_47_16_GET(rx_pkt_tlvs); 1311 return QDF_STATUS_SUCCESS; 1312 } 1313 1314 return QDF_STATUS_E_FAILURE; 1315 } 1316 1317 /* 1318 * hal_rx_mpdu_get_addr3_be(): API to get address3 of the mpdu 1319 * in the packet 1320 * 1321 * @buf: pointer to the start of RX PKT TLV header 1322 * @mac_addr: pointer to mac address 1323 * Return: success/failure 1324 */ 1325 static inline QDF_STATUS hal_rx_mpdu_get_addr3_be(uint8_t *buf, 1326 uint8_t *mac_addr) 1327 { 1328 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1329 struct __attribute__((__packed__)) hal_addr3 { 1330 uint32_t ad3_31_0; 1331 uint16_t ad3_47_32; 1332 }; 1333 struct hal_addr3 *addr = (struct hal_addr3 *)mac_addr; 1334 uint32_t mac_addr_ad3_valid; 1335 1336 mac_addr_ad3_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(rx_pkt_tlvs); 1337 1338 if (mac_addr_ad3_valid) { 1339 addr->ad3_31_0 = HAL_RX_TLV_MPDU_AD3_31_0_GET(rx_pkt_tlvs); 1340 addr->ad3_47_32 = HAL_RX_TLV_MPDU_AD3_47_32_GET(rx_pkt_tlvs); 1341 return QDF_STATUS_SUCCESS; 1342 } 1343 1344 return QDF_STATUS_E_FAILURE; 1345 } 1346 1347 /* 1348 * hal_rx_mpdu_get_addr4_be(): API to get address4 of the mpdu 1349 * in the packet 1350 * 1351 * @buf: pointer to the start of RX PKT TLV header 1352 * @mac_addr: pointer to mac address 1353 * Return: success/failure 1354 */ 1355 static inline QDF_STATUS hal_rx_mpdu_get_addr4_be(uint8_t *buf, 1356 uint8_t *mac_addr) 1357 { 1358 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1359 struct __attribute__((__packed__)) hal_addr4 { 1360 uint32_t ad4_31_0; 1361 uint16_t ad4_47_32; 1362 }; 1363 struct hal_addr4 *addr = (struct hal_addr4 *)mac_addr; 1364 uint32_t mac_addr_ad4_valid; 1365 1366 mac_addr_ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs); 1367 1368 if (mac_addr_ad4_valid) { 1369 addr->ad4_31_0 = HAL_RX_TLV_MPDU_AD4_31_0_GET(rx_pkt_tlvs); 1370 addr->ad4_47_32 = HAL_RX_TLV_MPDU_AD4_47_32_GET(rx_pkt_tlvs); 1371 return QDF_STATUS_SUCCESS; 1372 } 1373 1374 return QDF_STATUS_E_FAILURE; 1375 } 1376 1377 /* 1378 * hal_rx_get_mpdu_sequence_control_valid_be(): Get mpdu 1379 * sequence control valid 1380 * 1381 * @nbuf: Network buffer 1382 * Returns: value of sequence control valid field 1383 */ 1384 static inline uint8_t hal_rx_get_mpdu_sequence_control_valid_be(uint8_t *buf) 1385 { 1386 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1387 1388 return HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_pkt_tlvs); 1389 } 1390 1391 /** 1392 * hal_rx_tid_get_be: get tid based on qos control valid. 1393 * @hal_soc_hdl: hal_soc handle 1394 * @ buf: pointer to rx pkt TLV. 1395 * 1396 * Return: tid 1397 */ 1398 static inline uint32_t hal_rx_tid_get_be(hal_soc_handle_t hal_soc_hdl, 1399 uint8_t *buf) 1400 { 1401 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1402 uint8_t qos_control_valid = 1403 HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(rx_pkt_tlvs); 1404 1405 if (qos_control_valid) 1406 return hal_rx_tlv_tid_get_be(buf); 1407 1408 return HAL_RX_NON_QOS_TID; 1409 } 1410 1411 static inline 1412 uint8_t hal_rx_get_fc_valid_be(uint8_t *buf) 1413 { 1414 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1415 1416 return HAL_RX_TLV_GET_FC_VALID(rx_pkt_tlvs); 1417 } 1418 1419 static inline uint8_t hal_rx_get_to_ds_flag_be(uint8_t *buf) 1420 { 1421 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1422 1423 return HAL_RX_TLV_GET_TO_DS_FLAG(rx_pkt_tlvs); 1424 } 1425 1426 static inline uint8_t hal_rx_get_mac_addr2_valid_be(uint8_t *buf) 1427 { 1428 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1429 1430 return HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1431 } 1432 1433 /** 1434 * hal_rx_is_unicast_be: check packet is unicast frame or not. 1435 * 1436 * @ buf: pointer to rx pkt TLV. 1437 * Return: true on unicast. 1438 */ 1439 static inline bool hal_rx_is_unicast_be(uint8_t *buf) 1440 { 1441 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1442 uint32_t grp_id; 1443 1444 grp_id = HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(rx_pkt_tlvs); 1445 1446 return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false; 1447 } 1448 1449 static inline uint8_t hal_rx_get_filter_category_be(uint8_t *buf) 1450 { 1451 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1452 1453 return HAL_RX_GET_FILTER_CATEGORY(rx_pkt_tlvs); 1454 } 1455 1456 /** 1457 * hal_rx_hw_desc_get_ppduid_get_be(): retrieve ppdu id 1458 * @rx_tlv_hdr: start address of rx_pkt_tlvs 1459 * @rxdma_dst_ring_desc: Rx HW descriptor 1460 * 1461 * Return: ppdu id 1462 */ 1463 static inline uint32_t 1464 hal_rx_hw_desc_get_ppduid_get_be(void *rx_tlv_hdr, void *rxdma_dst_ring_desc) 1465 { 1466 struct rx_pkt_tlvs *rx_pkt_tlvs = 1467 (struct rx_pkt_tlvs *)rx_tlv_hdr; 1468 1469 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 1470 } 1471 1472 static inline uint32_t 1473 hal_rx_get_ppdu_id_be(uint8_t *buf) 1474 { 1475 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1476 1477 return HAL_RX_GET_PPDU_ID(rx_pkt_tlvs); 1478 } 1479 1480 /** 1481 * hal_rx_msdu_flow_idx_get_be: API to get flow index 1482 * from rx_msdu_end TLV 1483 * @buf: pointer to the start of RX PKT TLV headers 1484 * 1485 * Return: flow index value from MSDU END TLV 1486 */ 1487 static inline uint32_t hal_rx_msdu_flow_idx_get_be(uint8_t *buf) 1488 { 1489 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1490 1491 return HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 1492 } 1493 1494 /** 1495 * hal_rx_msdu_get_reo_destination_indication_be: API to get 1496 * reo_destination_indication from rx_msdu_end TLV 1497 * @buf: pointer to the start of RX PKT TLV headers 1498 * @reo_destination_indication: pointer to return value of 1499 * reo_destination_indication 1500 * 1501 * Return: none 1502 */ 1503 static inline void 1504 hal_rx_msdu_get_reo_destination_indication_be(uint8_t *buf, 1505 uint32_t *reo_destination_indication) 1506 { 1507 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1508 1509 *reo_destination_indication = HAL_RX_TLV_REO_DEST_IND_GET(pkt_tlvs); 1510 } 1511 1512 /** 1513 * hal_rx_msdu_flow_idx_invalid_be: API to get flow index invalid 1514 * from rx_msdu_end TLV 1515 * @buf: pointer to the start of RX PKT TLV headers 1516 * 1517 * Return: flow index invalid value from MSDU END TLV 1518 */ 1519 static inline bool hal_rx_msdu_flow_idx_invalid_be(uint8_t *buf) 1520 { 1521 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1522 1523 return HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 1524 } 1525 1526 /** 1527 * hal_rx_msdu_flow_idx_timeout_be: API to get flow index timeout 1528 * from rx_msdu_end TLV 1529 * @buf: pointer to the start of RX PKT TLV headers 1530 * 1531 * Return: flow index timeout value from MSDU END TLV 1532 */ 1533 static inline bool hal_rx_msdu_flow_idx_timeout_be(uint8_t *buf) 1534 { 1535 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1536 1537 return HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 1538 } 1539 1540 /** 1541 * hal_rx_msdu_fse_metadata_get_be: API to get FSE metadata 1542 * from rx_msdu_end TLV 1543 * @buf: pointer to the start of RX PKT TLV headers 1544 * 1545 * Return: fse metadata value from MSDU END TLV 1546 */ 1547 static inline uint32_t hal_rx_msdu_fse_metadata_get_be(uint8_t *buf) 1548 { 1549 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1550 1551 return HAL_RX_TLV_FSE_METADATA_GET(pkt_tlvs); 1552 } 1553 1554 /** 1555 * hal_rx_msdu_cce_metadata_get_be: API to get CCE metadata 1556 * from rx_msdu_end TLV 1557 * @buf: pointer to the start of RX PKT TLV headers 1558 * 1559 * Return: cce_metadata 1560 */ 1561 static inline uint16_t 1562 hal_rx_msdu_cce_metadata_get_be(uint8_t *buf) 1563 { 1564 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1565 1566 return HAL_RX_TLV_CCE_METADATA_GET(pkt_tlvs); 1567 } 1568 1569 /** 1570 * hal_rx_msdu_get_flow_params_be: API to get flow index, flow index invalid 1571 * and flow index timeout from rx_msdu_end TLV 1572 * @buf: pointer to the start of RX PKT TLV headers 1573 * @flow_invalid: pointer to return value of flow_idx_valid 1574 * @flow_timeout: pointer to return value of flow_idx_timeout 1575 * @flow_index: pointer to return value of flow_idx 1576 * 1577 * Return: none 1578 */ 1579 static inline void 1580 hal_rx_msdu_get_flow_params_be(uint8_t *buf, 1581 bool *flow_invalid, 1582 bool *flow_timeout, 1583 uint32_t *flow_index) 1584 { 1585 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1586 1587 *flow_invalid = HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 1588 *flow_timeout = HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 1589 *flow_index = HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 1590 } 1591 1592 /** 1593 * hal_rx_tlv_get_tcp_chksum_be() - API to get tcp checksum 1594 * @buf: rx_tlv_hdr 1595 * 1596 * Return: tcp checksum 1597 */ 1598 static inline uint16_t 1599 hal_rx_tlv_get_tcp_chksum_be(uint8_t *buf) 1600 { 1601 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1602 1603 return HAL_RX_TLV_GET_TCP_CHKSUM(rx_pkt_tlvs); 1604 } 1605 1606 /** 1607 * hal_rx_get_rx_sequence_be(): Function to retrieve rx sequence number 1608 * 1609 * @nbuf: Network buffer 1610 * Returns: rx sequence number 1611 */ 1612 static inline 1613 uint16_t hal_rx_get_rx_sequence_be(uint8_t *buf) 1614 { 1615 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1616 1617 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 1618 } 1619 1620 #ifdef RECEIVE_OFFLOAD 1621 #ifdef QCA_WIFI_KIWI_V2 1622 static inline 1623 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf) 1624 { 1625 /* 1626 * cumulative l4 checksum is not supported in V2 and 1627 * cumulative_l4_checksum field is not present 1628 */ 1629 return 0; 1630 } 1631 #else 1632 /** 1633 * hal_rx_get_fisa_cumulative_l4_checksum_be() - Retrieve cumulative 1634 * checksum 1635 * @buf: buffer pointer 1636 * 1637 * Return: cumulative checksum 1638 */ 1639 static inline 1640 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf) 1641 { 1642 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1643 1644 return HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(rx_pkt_tlvs); 1645 } 1646 #endif 1647 1648 /** 1649 * hal_rx_get_fisa_cumulative_ip_length_be() - Retrieve cumulative 1650 * ip length 1651 * @buf: buffer pointer 1652 * 1653 * Return: cumulative length 1654 */ 1655 static inline 1656 uint16_t hal_rx_get_fisa_cumulative_ip_length_be(uint8_t *buf) 1657 { 1658 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1659 1660 return HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(rx_pkt_tlvs); 1661 } 1662 1663 /** 1664 * hal_rx_get_udp_proto_be() - Retrieve udp proto value 1665 * @buf: buffer 1666 * 1667 * Return: udp proto bit 1668 */ 1669 static inline 1670 bool hal_rx_get_udp_proto_be(uint8_t *buf) 1671 { 1672 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1673 1674 return HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 1675 } 1676 #endif 1677 1678 /** 1679 * hal_rx_get_flow_agg_continuation_be() - retrieve flow agg 1680 * continuation 1681 * @buf: buffer 1682 * 1683 * Return: flow agg 1684 */ 1685 static inline 1686 bool hal_rx_get_flow_agg_continuation_be(uint8_t *buf) 1687 { 1688 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1689 1690 return HAL_RX_TLV_GET_FLOW_AGGR_CONT(rx_pkt_tlvs); 1691 } 1692 1693 /** 1694 * hal_rx_get_flow_agg_count_be()- Retrieve flow agg count 1695 * @buf: buffer 1696 * 1697 * Return: flow agg count 1698 */ 1699 static inline 1700 uint8_t hal_rx_get_flow_agg_count_be(uint8_t *buf) 1701 { 1702 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1703 1704 return HAL_RX_TLV_GET_FLOW_AGGR_COUNT(rx_pkt_tlvs); 1705 } 1706 1707 /** 1708 * hal_rx_get_fisa_timeout_be() - Retrieve fisa timeout 1709 * @buf: buffer 1710 * 1711 * Return: fisa timeout 1712 */ 1713 static inline 1714 bool hal_rx_get_fisa_timeout_be(uint8_t *buf) 1715 { 1716 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1717 1718 return HAL_RX_TLV_GET_FISA_TIMEOUT(rx_pkt_tlvs); 1719 } 1720 1721 /** 1722 * hal_rx_mpdu_start_tlv_tag_valid_be () - API to check if RX_MPDU_START 1723 * tlv tag is valid 1724 * 1725 *@rx_tlv_hdr: start address of rx_pkt_tlvs 1726 * 1727 * Return: true if RX_MPDU_START is valied, else false. 1728 */ 1729 static inline uint8_t hal_rx_mpdu_start_tlv_tag_valid_be(void *rx_tlv_hdr) 1730 { 1731 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)rx_tlv_hdr; 1732 uint32_t tlv_tag; 1733 1734 tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(&rx_desc->mpdu_start_tlv); 1735 1736 return tlv_tag == WIFIRX_MPDU_START_E ? true : false; 1737 } 1738 1739 /** 1740 * hal_rx_msdu_end_offset_get_generic(): API to get the 1741 * msdu_end structure offset rx_pkt_tlv structure 1742 * 1743 * NOTE: API returns offset of msdu_end TLV from structure 1744 * rx_pkt_tlvs 1745 */ 1746 static inline uint32_t hal_rx_msdu_end_offset_get_generic(void) 1747 { 1748 return RX_PKT_TLV_OFFSET(msdu_end_tlv); 1749 } 1750 1751 /** 1752 * hal_rx_mpdu_start_offset_get_generic(): API to get the 1753 * mpdu_start structure offset rx_pkt_tlv structure 1754 * 1755 * NOTE: API returns offset of attn TLV from structure 1756 * rx_pkt_tlvs 1757 */ 1758 static inline uint32_t hal_rx_mpdu_start_offset_get_generic(void) 1759 { 1760 return RX_PKT_TLV_OFFSET(mpdu_start_tlv); 1761 } 1762 1763 #ifndef NO_RX_PKT_HDR_TLV 1764 static inline uint32_t hal_rx_pkt_tlv_offset_get_generic(void) 1765 { 1766 return RX_PKT_TLV_OFFSET(pkt_hdr_tlv); 1767 } 1768 #endif 1769 1770 #ifdef CONFIG_WORD_BASED_TLV 1771 #define MPDU_START_WMASK 0x074C 1772 #define MSDU_END_WMASK 0x13FC1 1773 1774 /** 1775 * hal_rx_mpdu_start_wmask_get_be(): API to get the mpdu_start_tlv word mask 1776 * 1777 * return: Word mask for MPDU start tlv 1778 */ 1779 static inline uint32_t hal_rx_mpdu_start_wmask_get_be(void) 1780 { 1781 return MPDU_START_WMASK; 1782 } 1783 1784 /** 1785 * hal_rx_msdu_end_wmask_get_be(): API to get the msdu_end_tlv word mask 1786 * 1787 * return: Word mask for MSDU end tlv 1788 */ 1789 static inline uint32_t hal_rx_msdu_end_wmask_get_be(void) 1790 { 1791 return MSDU_END_WMASK; 1792 } 1793 #endif 1794 1795 #ifdef RECEIVE_OFFLOAD 1796 static inline int 1797 hal_rx_tlv_get_offload_info_be(uint8_t *rx_tlv, 1798 struct hal_offload_info *offload_info) 1799 { 1800 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)rx_tlv; 1801 1802 offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_pkt_tlvs); 1803 offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_pkt_tlvs); 1804 offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 1805 offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs); 1806 1807 if (offload_info->tcp_proto) { 1808 offload_info->tcp_pure_ack = 1809 HAL_RX_TLV_GET_TCP_PURE_ACK(rx_pkt_tlvs); 1810 offload_info->tcp_offset = 1811 HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 1812 offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_pkt_tlvs); 1813 offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_pkt_tlvs); 1814 offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_pkt_tlvs); 1815 } 1816 return 0; 1817 } 1818 1819 static inline int hal_rx_get_proto_params_be(uint8_t *buf, void *proto_params) 1820 { 1821 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1822 struct hal_proto_params *param = 1823 (struct hal_proto_params *)proto_params; 1824 1825 param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs); 1826 param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 1827 param->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 1828 1829 return 0; 1830 } 1831 1832 static inline int hal_rx_get_l3_l4_offsets_be(uint8_t *buf, 1833 uint32_t *l3_hdr_offset, 1834 uint32_t *l4_hdr_offset) 1835 { 1836 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1837 1838 *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(rx_pkt_tlvs); 1839 *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 1840 1841 return 0; 1842 } 1843 #endif 1844 1845 /** 1846 * hal_rx_msdu_start_msdu_len_get(): API to get the MSDU length 1847 * from rx_msdu_start TLV 1848 * 1849 * @ buf: pointer to the start of RX PKT TLV headers 1850 * Return: msdu length 1851 */ 1852 static inline uint32_t hal_rx_msdu_start_msdu_len_get_be(uint8_t *buf) 1853 { 1854 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1855 uint32_t msdu_len; 1856 1857 msdu_len = HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 1858 1859 return msdu_len; 1860 } 1861 1862 /** 1863 * hal_rx_get_frame_ctrl_field(): Function to retrieve frame control field 1864 * 1865 * @nbuf: Network buffer 1866 * Returns: rx more fragment bit 1867 * 1868 */ 1869 static inline uint16_t hal_rx_get_frame_ctrl_field_be(uint8_t *buf) 1870 { 1871 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1872 uint16_t frame_ctrl = 0; 1873 1874 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_pkt_tlvs); 1875 1876 return frame_ctrl; 1877 } 1878 1879 /* 1880 * hal_rx_tlv_get_is_decrypted_be(): API to get the decrypt status of the 1881 * packet from msdu_end 1882 * 1883 * @buf: pointer to the start of RX PKT TLV header 1884 * Return: uint32_t(decryt status) 1885 */ 1886 static inline uint32_t hal_rx_tlv_get_is_decrypted_be(uint8_t *buf) 1887 { 1888 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1889 uint32_t is_decrypt = 0; 1890 uint32_t decrypt_status; 1891 1892 decrypt_status = HAL_RX_TLV_DECRYPT_STATUS_GET(rx_pkt_tlvs); 1893 1894 if (!decrypt_status) 1895 is_decrypt = 1; 1896 1897 return is_decrypt; 1898 } 1899 1900 #ifdef NO_RX_PKT_HDR_TLV 1901 /** 1902 * hal_rx_pkt_hdr_get_be(): API to get 80211 header 1903 * @buf: start of rx_pkt_tlv 1904 * 1905 * If NO_RX_PKT_HDR_TLV is enabled, then this API assume caller gives a raw 1906 * data, get 80211 header from packet data directly. 1907 * If NO_RX_PKT_HDR_TLV is disabled, then get it from rx_pkt_hdr_tlv in 1908 * rx_pkt_tlvs. 1909 * 1910 * Return: pointer to start of 80211 header 1911 */ 1912 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf) 1913 { 1914 return buf + RX_PKT_TLVS_LEN; 1915 } 1916 #else 1917 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf) 1918 { 1919 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1920 1921 return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr; 1922 } 1923 #endif 1924 1925 /** 1926 * hal_rx_priv_info_set_in_tlv_be(): Save the private info to 1927 * the reserved bytes of rx_tlv_hdr 1928 * @buf: start of rx_tlv_hdr 1929 * @priv_data: hal_wbm_err_desc_info structure 1930 * @len: length of the private data 1931 * Return: void 1932 */ 1933 static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf, 1934 uint8_t *priv_data, 1935 uint32_t len) 1936 { 1937 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1938 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1939 RX_BE_PADDING0_BYTES : len; 1940 1941 qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len); 1942 } 1943 1944 /** 1945 * hal_rx_priv_info_get_from_tlv_be(): retrieve the private data from 1946 * the reserved bytes of rx_tlv_hdr. 1947 * @buf: start of rx_tlv_hdr 1948 * @priv_data: Handle to get the private data, output parameter. 1949 * @len: length of the private data 1950 * Return: void 1951 */ 1952 static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf, 1953 uint8_t *priv_data, 1954 uint32_t len) 1955 { 1956 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1957 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1958 RX_BE_PADDING0_BYTES : len; 1959 1960 qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len); 1961 } 1962 1963 /** 1964 * hal_rx_tlv_csum_err_get_be() - Get IP and tcp-udp checksum fail flag 1965 * @rx_tlv_hdr: start address of rx_tlv_hdr 1966 * @ip_csum_err: buffer to return ip_csum_fail flag 1967 * @tcp_udp_csum_fail: placeholder to return tcp-udp checksum fail flag 1968 * 1969 * Return: None 1970 */ 1971 static inline void 1972 hal_rx_tlv_csum_err_get_be(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err, 1973 uint32_t *tcp_udp_csum_err) 1974 { 1975 struct rx_pkt_tlvs *rx_pkt_tlvs = 1976 (struct rx_pkt_tlvs *)rx_tlv_hdr; 1977 1978 *ip_csum_err = HAL_RX_TLV_IP_CSUM_FAIL_GET(rx_pkt_tlvs); 1979 *tcp_udp_csum_err = HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(rx_pkt_tlvs); 1980 } 1981 1982 static inline 1983 uint32_t hal_rx_tlv_mpdu_len_err_get_be(void *hw_desc_addr) 1984 { 1985 struct rx_pkt_tlvs *rx_pkt_tlvs = 1986 (struct rx_pkt_tlvs *)hw_desc_addr; 1987 1988 return HAL_RX_TLV_MPDU_LEN_ERR_GET(rx_pkt_tlvs); 1989 } 1990 1991 static inline 1992 uint32_t hal_rx_tlv_mpdu_fcs_err_get_be(void *hw_desc_addr) 1993 { 1994 struct rx_pkt_tlvs *rx_pkt_tlvs = 1995 (struct rx_pkt_tlvs *)hw_desc_addr; 1996 1997 return HAL_RX_TLV_MPDU_FCS_ERR_GET(rx_pkt_tlvs); 1998 } 1999 2000 /** 2001 * hal_rx_get_rx_more_frag_bit(): Function to retrieve more fragment bit 2002 * 2003 * @nbuf: Network buffer 2004 * Returns: rx more fragment bit 2005 */ 2006 static inline 2007 uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf) 2008 { 2009 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2010 uint16_t frame_ctrl = 0; 2011 2012 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(pkt_tlvs) >> 2013 DOT11_FC1_MORE_FRAG_OFFSET; 2014 2015 /* more fragment bit if at offset bit 4 */ 2016 return frame_ctrl; 2017 } 2018 2019 /* 2020 * hal_rx_msdu_is_wlan_mcast_generic_be(): Check if the buffer is for multicast 2021 * address 2022 * @nbuf: Network buffer 2023 * 2024 * Returns: flag to indicate whether the nbuf has MC/BC address 2025 */ 2026 static inline uint32_t hal_rx_msdu_is_wlan_mcast_generic_be(qdf_nbuf_t nbuf) 2027 { 2028 uint8_t *buf = qdf_nbuf_data(nbuf); 2029 2030 return HAL_RX_TLV_IS_MCAST_GET(buf);; 2031 } 2032 2033 /** 2034 * hal_rx_msdu_start_msdu_len_set_be(): API to set the MSDU length 2035 * from rx_msdu_start TLV 2036 * 2037 * @buf: pointer to the start of RX PKT TLV headers 2038 * @len: msdu length 2039 * 2040 * Return: none 2041 */ 2042 static inline void 2043 hal_rx_msdu_start_msdu_len_set_be(uint8_t *buf, uint32_t len) 2044 { 2045 HAL_RX_TLV_MSDU_LEN_GET(buf) = len; 2046 } 2047 2048 /** 2049 * hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(): 2050 * Retrieve qos control valid bit from the tlv. 2051 * @buf: pointer to rx pkt TLV. 2052 * 2053 * Return: qos control value. 2054 */ 2055 static inline uint32_t 2056 hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(uint8_t *buf) 2057 { 2058 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2059 2060 return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(pkt_tlvs); 2061 } 2062 2063 /** 2064 * hal_rx_msdu_end_sa_sw_peer_id_get_be(): API to get the 2065 * sa_sw_peer_id from rx_msdu_end TLV 2066 * @buf: pointer to the start of RX PKT TLV headers 2067 * 2068 * Return: sa_sw_peer_id index 2069 */ 2070 static inline uint32_t 2071 hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t *buf) 2072 { 2073 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2074 2075 hal_rx_msdu_end_t *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; 2076 2077 return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end); 2078 } 2079 2080 /** 2081 * hal_rx_tlv_l3_type_get_be(): API to get the l3 type 2082 * from rx_msdu_start TLV 2083 * 2084 * @buf: pointer to the start of RX PKT TLV headers 2085 * Return: uint32_t(l3 type) 2086 */ 2087 static inline uint32_t hal_rx_tlv_l3_type_get_be(uint8_t *buf) 2088 { 2089 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2090 2091 return HAL_RX_TLV_L3_TYPE_GET(rx_pkt_tlvs); 2092 } 2093 #endif /* _HAL_BE_RX_TLV_H_ */ 2094