1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _HAL_BE_RX_TLV_H_ 21 #define _HAL_BE_RX_TLV_H_ 22 23 #include "hal_api_mon.h" 24 25 /* 26 * Structures & Macros to obtain fields from the TLV's in the Rx packet 27 * pre-header. 28 */ 29 30 #ifdef CONFIG_4_BYTES_TLV_TAG 31 #define TLV_TAG_T uint32_t 32 #else 33 #define TLV_TAG_T uint64_t 34 #endif 35 36 #define HAL_RX_BE_PKT_HDR_TLV_LEN 112 37 38 struct rx_pkt_hdr_tlv { 39 TLV_TAG_T tag; /* TLV_TAG_T B */ 40 uint64_t phy_ppdu_id; /* 8 B */ 41 char rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; /* 112 B */ 42 }; 43 44 #ifdef CONFIG_WORD_BASED_TLV 45 #ifndef BIG_ENDIAN_HOST 46 struct rx_msdu_end_compact { 47 uint32_t sa_sw_peer_id : 16, 48 sa_idx_timeout : 1, 49 da_idx_timeout : 1, 50 to_ds : 1, 51 tid : 4, 52 sa_is_valid : 1, 53 da_is_valid : 1, 54 da_is_mcbc : 1, 55 l3_header_padding : 2, 56 first_msdu : 1, 57 last_msdu : 1, 58 fr_ds : 1, 59 ip_chksum_fail_copy : 1; 60 uint32_t sa_idx : 16, 61 da_idx_or_sw_peer_id : 16; 62 uint32_t msdu_drop : 1, 63 reo_destination_indication : 5, 64 flow_idx : 20, 65 use_ppe : 1, 66 mesh_sta : 2, 67 vlan_ctag_stripped : 1, 68 vlan_stag_stripped : 1, 69 fragment_flag : 1; 70 uint32_t fse_metadata : 32; 71 uint32_t cce_metadata : 16, 72 tcp_udp_chksum : 16; 73 uint32_t aggregation_count : 8, 74 flow_aggregation_continuation : 1, 75 fisa_timeout : 1, 76 tcp_udp_chksum_fail_copy : 1, 77 msdu_limit_error : 1, 78 flow_idx_timeout : 1, 79 flow_idx_invalid : 1, 80 cce_match : 1, 81 amsdu_parser_error : 1, 82 cumulative_ip_length : 16; 83 uint32_t key_id_octet : 8, 84 reserved_8a : 24; 85 uint32_t reserved_9a : 6, 86 service_code : 9, 87 priority_valid : 1, 88 intra_bss : 1, 89 dest_chip_id : 2, 90 multicast_echo : 1, 91 wds_learning_event : 1, 92 wds_roaming_event : 1, 93 wds_keep_alive_event : 1, 94 dest_chip_pmac_id : 1, 95 reserved_9b : 8; 96 uint32_t msdu_length : 14, 97 stbc : 1, 98 ipsec_esp : 1, 99 l3_offset : 7, 100 ipsec_ah : 1, 101 l4_offset : 8; 102 uint32_t msdu_number : 8, 103 decap_format : 2, 104 ipv4_proto : 1, 105 ipv6_proto : 1, 106 tcp_proto : 1, 107 udp_proto : 1, 108 ip_frag : 1, 109 tcp_only_ack : 1, 110 da_is_bcast_mcast : 1, 111 toeplitz_hash_sel : 2, 112 ip_fixed_header_valid : 1, 113 ip_extn_header_valid : 1, 114 tcp_udp_header_valid : 1, 115 mesh_control_present : 1, 116 ldpc : 1, 117 ip4_protocol_ip6_next_header : 8; 118 uint32_t vlan_ctag_ci : 16, 119 vlan_stag_ci : 16; 120 uint32_t peer_meta_data : 32; 121 uint32_t user_rssi : 8, 122 pkt_type : 4, 123 sgi : 2, 124 rate_mcs : 4, 125 receive_bandwidth : 3, 126 reception_type : 3, 127 mimo_ss_bitmap : 7, 128 msdu_done_copy : 1; 129 uint32_t flow_id_toeplitz : 32; 130 uint32_t ppdu_start_timestamp_63_32; 131 uint32_t sw_phy_meta_data : 32; 132 uint32_t first_mpdu : 1, 133 reserved_16a : 1, 134 mcast_bcast : 1, 135 ast_index_not_found : 1, 136 ast_index_timeout : 1, 137 power_mgmt : 1, 138 non_qos : 1, 139 null_data : 1, 140 mgmt_type : 1, 141 ctrl_type : 1, 142 more_data : 1, 143 eosp : 1, 144 a_msdu_error : 1, 145 reserved_16b : 1, 146 order : 1, 147 wifi_parser_error : 1, 148 overflow_err : 1, 149 msdu_length_err : 1, 150 tcp_udp_chksum_fail : 1, 151 ip_chksum_fail : 1, 152 sa_idx_invalid : 1, 153 da_idx_invalid : 1, 154 amsdu_addr_mismatch : 1, 155 rx_in_tx_decrypt_byp : 1, 156 encrypt_required : 1, 157 directed : 1, 158 buffer_fragment : 1, 159 mpdu_length_err : 1, 160 tkip_mic_err : 1, 161 decrypt_err : 1, 162 unencrypted_frame_err : 1, 163 fcs_err : 1; 164 uint32_t reserved_17a : 10, 165 decrypt_status_code : 3, 166 rx_bitmap_not_updated : 1, 167 reserved_17b : 17, 168 msdu_done : 1; 169 }; 170 171 struct rx_mpdu_start_compact { 172 uint32_t rx_reo_queue_desc_addr_39_32 : 8, 173 receive_queue_number : 16, 174 pre_delim_err_warning : 1, 175 first_delim_err : 1, 176 reserved_0 : 6; 177 uint32_t pn_31_0 : 32; 178 uint32_t pn_63_32 : 32; 179 uint32_t pn_95_64 : 32; 180 uint32_t ast_index : 16, 181 sw_peer_id : 16; 182 uint32_t mpdu_frame_control_valid : 1, 183 mpdu_duration_valid : 1, 184 mac_addr_ad1_valid : 1, 185 mac_addr_ad2_valid : 1, 186 mac_addr_ad3_valid : 1, 187 mac_addr_ad4_valid : 1, 188 mpdu_sequence_control_valid : 1, 189 mpdu_qos_control_valid : 1, 190 mpdu_ht_control_valid : 1, 191 frame_encryption_info_valid : 1, 192 mpdu_fragment_number : 4, 193 more_fragment_flag : 1, 194 reserved_7a : 1, 195 fr_ds : 1, 196 to_ds : 1, 197 encrypted : 1, 198 mpdu_retry : 1, 199 mpdu_sequence_number : 12; 200 uint32_t mpdu_frame_control_field : 16, 201 mpdu_duration_field : 16; 202 uint32_t mac_addr_ad1_31_0 : 32; 203 uint32_t mac_addr_ad1_47_32 : 16, 204 mac_addr_ad2_15_0 : 16; 205 uint32_t mac_addr_ad2_47_16 : 32; 206 uint32_t mac_addr_ad3_31_0 : 32; 207 uint32_t mac_addr_ad3_47_32 : 16, 208 mpdu_sequence_control_field : 16; 209 }; 210 #else 211 struct rx_msdu_end_compact { 212 uint32_t ip_chksum_fail_copy : 1, 213 fr_ds : 1, 214 last_msdu : 1, 215 first_msdu : 1, 216 l3_header_padding : 2, 217 da_is_mcbc : 1, 218 da_is_valid : 1, 219 sa_is_valid : 1, 220 tid : 4, 221 to_ds : 1, 222 da_idx_timeout : 1, 223 sa_idx_timeout : 1, 224 sa_sw_peer_id : 16; 225 uint32_t da_idx_or_sw_peer_id : 16, 226 sa_idx : 16; 227 uint32_t fragment_flag : 1, 228 vlan_stag_stripped : 1, 229 vlan_ctag_stripped : 1, 230 mesh_sta : 2, 231 use_ppe : 1, 232 flow_idx : 20, 233 reo_destination_indication : 5, 234 msdu_drop : 1; 235 uint32_t fse_metadata : 32; 236 uint32_t tcp_udp_chksum : 16, 237 cce_metadata : 16; 238 uint32_t cumulative_ip_length : 16, 239 amsdu_parser_error : 1, 240 cce_match : 1, 241 flow_idx_invalid : 1, 242 flow_idx_timeout : 1, 243 msdu_limit_error : 1, 244 tcp_udp_chksum_fail_copy : 1, 245 fisa_timeout : 1, 246 flow_aggregation_continuation : 1, 247 aggregation_count : 8; 248 uint32_t reserved_8a : 24, 249 key_id_octet : 8; 250 uint32_t reserved_9b : 8, 251 dest_chip_pmac_id : 1, 252 wds_keep_alive_event : 1, 253 wds_roaming_event : 1, 254 wds_learning_event : 1, 255 multicast_echo : 1, 256 dest_chip_id : 2, 257 intra_bss : 1, 258 priority_valid : 1, 259 service_code : 9, 260 reserved_9a : 6; 261 uint32_t l4_offset : 8, 262 ipsec_ah : 1, 263 l3_offset : 7, 264 ipsec_esp : 1, 265 stbc : 1, 266 msdu_length : 14; 267 uint32_t ip4_protocol_ip6_next_header : 8, 268 ldpc : 1, 269 mesh_control_present : 1, 270 tcp_udp_header_valid : 1, 271 ip_extn_header_valid : 1, 272 ip_fixed_header_valid : 1, 273 toeplitz_hash_sel : 2, 274 da_is_bcast_mcast : 1, 275 tcp_only_ack : 1, 276 ip_frag : 1, 277 udp_proto : 1, 278 tcp_proto : 1, 279 ipv6_proto : 1, 280 ipv4_proto : 1, 281 decap_format : 2, 282 msdu_number : 8; 283 uint32_t vlan_stag_ci : 16, 284 vlan_ctag_ci : 16; 285 uint32_t peer_meta_data : 32; 286 uint32_t msdu_done_copy : 1, 287 mimo_ss_bitmap : 7, 288 reception_type : 3, 289 receive_bandwidth : 3, 290 rate_mcs : 4, 291 sgi : 2, 292 pkt_type : 4, 293 user_rssi : 8; 294 uint32_t flow_id_toeplitz : 32; 295 uint32_t ppdu_start_timestamp_63_32; 296 uint32_t sw_phy_meta_data : 32; 297 uint32_t fcs_err : 1, 298 unencrypted_frame_err : 1, 299 decrypt_err : 1, 300 tkip_mic_err : 1, 301 mpdu_length_err : 1, 302 buffer_fragment : 1, 303 directed : 1, 304 encrypt_required : 1, 305 rx_in_tx_decrypt_byp : 1, 306 amsdu_addr_mismatch : 1, 307 da_idx_invalid : 1, 308 sa_idx_invalid : 1, 309 ip_chksum_fail : 1, 310 tcp_udp_chksum_fail : 1, 311 msdu_length_err : 1, 312 overflow_err : 1, 313 wifi_parser_error : 1, 314 order : 1, 315 reserved_16b : 1, 316 a_msdu_error : 1, 317 eosp : 1, 318 more_data : 1, 319 ctrl_type : 1, 320 mgmt_type : 1, 321 null_data : 1, 322 non_qos : 1, 323 power_mgmt : 1, 324 ast_index_timeout : 1, 325 ast_index_not_found : 1, 326 mcast_bcast : 1, 327 reserved_16a : 1, 328 first_mpdu : 1; 329 uint32_t msdu_done : 1, 330 reserved_17b : 17, 331 rx_bitmap_not_updated : 1, 332 decrypt_status_code : 3, 333 reserved_17a : 10; 334 }; 335 336 struct rx_mpdu_start_compact { 337 uint32_t reserved_0 : 6, 338 first_delim_err : 1, 339 pre_delim_err_warning : 1, 340 receive_queue_number : 16, 341 rx_reo_queue_desc_addr_39_32 : 8; 342 uint32_t pn_31_0 : 32; 343 uint32_t pn_63_32 : 32; 344 uint32_t pn_95_64 : 32; 345 uint32_t sw_peer_id : 16, 346 ast_index : 16; 347 uint32_t mpdu_sequence_number : 12, 348 mpdu_retry : 1, 349 encrypted : 1, 350 to_ds : 1, 351 fr_ds : 1, 352 reserved_7a : 1, 353 more_fragment_flag : 1, 354 mpdu_fragment_number : 4, 355 frame_encryption_info_valid : 1, 356 mpdu_ht_control_valid : 1, 357 mpdu_qos_control_valid : 1, 358 mpdu_sequence_control_valid : 1, 359 mac_addr_ad4_valid : 1, 360 mac_addr_ad3_valid : 1, 361 mac_addr_ad2_valid : 1, 362 mac_addr_ad1_valid : 1, 363 mpdu_duration_valid : 1, 364 mpdu_frame_control_valid : 1; 365 uint32_t mpdu_duration_field : 16, 366 mpdu_frame_control_field : 16; 367 uint32_t mac_addr_ad1_31_0 : 32; 368 uint32_t mac_addr_ad2_15_0 : 16, 369 mac_addr_ad1_47_32 : 16; 370 uint32_t mac_addr_ad2_47_16 : 32; 371 uint32_t mac_addr_ad3_31_0 : 32; 372 uint32_t mpdu_sequence_control_field : 16, 373 mac_addr_ad3_47_32 : 16; 374 }; 375 #endif 376 #define RX_BE_PADDING0_BYTES 4 377 378 typedef struct rx_mpdu_start_compact hal_rx_mpdu_start_t; 379 typedef struct rx_msdu_end_compact hal_rx_msdu_end_t; 380 381 struct rx_mpdu_start_tlv { 382 hal_rx_mpdu_start_t rx_mpdu_start; 383 }; 384 385 struct rx_msdu_end_tlv { 386 TLV_TAG_T tag; /* TLV_TAG_T B */ 387 hal_rx_msdu_end_t rx_msdu_end; 388 }; 389 390 struct rx_pkt_tlvs { 391 struct rx_msdu_end_tlv msdu_end_tlv; /* 80 bytes */ 392 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 48 bytes */ 393 #ifndef NO_RX_PKT_HDR_TLV 394 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 395 #endif 396 }; 397 398 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 399 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 400 401 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 402 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 403 rx_mpdu_start) 404 405 #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \ 406 HAL_RX_MSDU_END(_rx_pkt_tlv).tid 407 408 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 409 HAL_RX_MSDU_END(_rx_pkt_tlv).first_mpdu 410 #else /* CONFIG_WORD_BASED_TLV */ 411 typedef struct rx_mpdu_start hal_rx_mpdu_start_t; 412 typedef struct rx_msdu_end hal_rx_msdu_end_t; 413 414 #define RX_BE_PADDING0_BYTES 8 415 /* 416 * Each RX descriptor TLV is preceded by sizeof TLV_TAG_T "tag" 417 */ 418 419 #ifndef CONFIG_NO_TLV_TAGS 420 struct rx_mpdu_start_tlv { 421 TLV_TAG_T tag; 422 hal_rx_mpdu_start_t rx_mpdu_start; 423 }; 424 425 struct rx_msdu_end_tlv { 426 TLV_TAG_T tag; 427 hal_rx_msdu_end_t rx_msdu_end; 428 }; 429 430 struct rx_pkt_tlvs { 431 struct rx_msdu_end_tlv msdu_end_tlv; /* 128 + TLV_TAG_T bytes */ 432 uint8_t rx_padding0[RX_BE_PADDING0_BYTES];/* 8 bytes */ 433 struct rx_mpdu_start_tlv mpdu_start_tlv;/* 120 + TLV_TAG_T bytes */ 434 #ifndef NO_RX_PKT_HDR_TLV 435 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 436 #endif 437 }; 438 439 #else 440 struct rx_mpdu_start_tlv { 441 hal_rx_mpdu_start_t rx_mpdu_start; 442 }; 443 444 struct rx_msdu_end_tlv { 445 hal_rx_msdu_end_t rx_msdu_end; 446 }; 447 448 struct rx_pkt_tlvs { 449 struct rx_msdu_end_tlv msdu_end_tlv; /* 128 bytes */ 450 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */ 451 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */ 452 #ifndef NO_RX_PKT_HDR_TLV 453 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 454 #endif 455 }; 456 #endif /*CONFIG_NO_TLV_TAGS */ 457 458 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 459 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 460 461 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 462 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 463 rx_mpdu_start.rx_mpdu_info_details) 464 465 #define HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(_rx_pkt_tlv) \ 466 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_31_0 467 468 #define HAL_RX_TLV_AMPDU_FLAG_GET(_rx_pkt_tlv) \ 469 HAL_RX_MPDU_START(_rx_pkt_tlv).ampdu_flag 470 471 #define HAL_RX_TLV_MPDU_PN_127_96_GET(_rx_pkt_tlv) \ 472 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_127_96 473 474 #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \ 475 HAL_RX_MPDU_START(_rx_pkt_tlv).tid 476 477 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 478 HAL_RX_MPDU_START(_rx_pkt_tlv).first_mpdu 479 480 #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \ 481 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type 482 483 #define HAL_RX_GET_PPDU_ID(_rx_pkt_tlv) \ 484 HAL_RX_MPDU_START(_rx_pkt_tlv).phy_ppdu_id 485 486 #define HAL_RX_TLV_PHY_PPDU_ID_GET(_rx_pkt_tlv) \ 487 HAL_RX_MSDU_END(_rx_pkt_tlv).phy_ppdu_id 488 489 #define HAL_RX_GET_FILTER_CATEGORY(_rx_pkt_tlv) \ 490 HAL_RX_MPDU_START(_rx_pkt_tlv).rxpcu_mpdu_filter_in_category 491 492 #define HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(_rx_pkt_tlv) \ 493 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_frame_group_id 494 495 #endif /* CONFIG_WORD_BASED_TLV */ 496 497 /** 498 * struct rx_mon_pkt_tlvs - RX packet data structure for DEST ring in the 499 * monitor mode. 500 * @msdu_end_tlv: MSDU end TLV 501 * @rx_padding0: Padding bytes 502 * @mpdu_start_tlv: MPDU start TLV 503 * @pkt_hdr_tlv: 802.11 packet header TLV 504 */ 505 struct rx_mon_pkt_tlvs { 506 struct rx_msdu_end_tlv msdu_end_tlv; /* 128B + sizeof(tag) */ 507 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8B */ 508 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120B + sizeof(tag) */ 509 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 120B + sizeof(tag) */ 510 }; 511 512 #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs) 513 #define SIZE_OF_MON_DATA_RX_TLV sizeof(struct rx_mon_pkt_tlvs) 514 515 #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV 516 #define MON_RX_PKT_TLVS_LEN SIZE_OF_MON_DATA_RX_TLV 517 518 #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field) 519 520 #define HAL_RX_TLV_MSDU_DONE_GET(_rx_pkt_tlv) \ 521 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_done 522 523 #define HAL_RX_TLV_DECAP_FORMAT_GET(_rx_pkt_tlv) \ 524 HAL_RX_MSDU_END(_rx_pkt_tlv).decap_format 525 526 #ifdef RECEIVE_OFFLOAD 527 #define HAL_RX_TLV_GET_TCP_PURE_ACK(_rx_pkt_tlv) \ 528 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_only_ack 529 530 #define HAL_RX_TLV_GET_TCP_PROTO(_rx_pkt_tlv) \ 531 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_proto 532 533 #define HAL_RX_TLV_GET_UDP_PROTO(_rx_pkt_tlv) \ 534 HAL_RX_MSDU_END(_rx_pkt_tlv).udp_proto 535 536 #define HAL_RX_TLV_GET_IPV6(_rx_pkt_tlv) \ 537 HAL_RX_MSDU_END(_rx_pkt_tlv).ipv6_proto 538 539 #define HAL_RX_TLV_GET_IP_OFFSET(_rx_pkt_tlv) \ 540 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_offset 541 542 #define HAL_RX_TLV_GET_TCP_OFFSET(_rx_pkt_tlv) \ 543 HAL_RX_MSDU_END(_rx_pkt_tlv).l4_offset 544 #endif /* RECEIVE_OFFLOAD */ 545 546 #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(_rx_pkt_tlv) \ 547 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 548 549 #define HAL_RX_TLV_MSDU_LEN_GET(_rx_pkt_tlv) \ 550 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_length 551 552 #define HAL_RX_TLV_CCE_MATCH_GET(_rx_pkt_tlv) \ 553 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_match 554 555 #define HAL_RX_TLV_BW_GET(_rx_pkt_tlv) \ 556 HAL_RX_MSDU_END(_rx_pkt_tlv).receive_bandwidth 557 558 #define HAL_RX_TLV_FLOWID_TOEPLITZ_GET(_rx_pkt_tlv) \ 559 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 560 561 #define HAL_RX_TLV_SGI_GET(_rx_pkt_tlv) \ 562 HAL_RX_MSDU_END(_rx_pkt_tlv).sgi 563 564 #define HAL_RX_TLV_RATE_MCS_GET(_rx_pkt_tlv) \ 565 HAL_RX_MSDU_END(_rx_pkt_tlv).rate_mcs 566 567 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 568 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 569 570 #define HAL_RX_TLV_RSSI_GET(_rx_pkt_tlv) \ 571 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 572 573 #define HAL_RX_TLV_FREQ_GET(_rx_pkt_tlv) \ 574 HAL_RX_MSDU_END(_rx_pkt_tlv).sw_phy_meta_data 575 576 #define HAL_RX_TLV_PKT_TYPE_GET(_rx_pkt_tlv) \ 577 HAL_RX_MSDU_END(_rx_pkt_tlv).pkt_type 578 579 #define HAL_RX_TLV_DECRYPT_ERR_GET(_rx_pkt_tlv) \ 580 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_err 581 582 #define HAL_RX_TLV_MIC_ERR_GET(_rx_pkt_tlv) \ 583 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err 584 585 #define HAL_RX_TLV_MIMO_SS_BITMAP(_rx_pkt_tlv)\ 586 HAL_RX_MSDU_END(_rx_pkt_tlv).mimo_ss_bitmap 587 588 #define HAL_RX_TLV_ANT_SIGNAL_DB_GET(_rx_pkt_tlv) \ 589 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 590 591 #define HAL_RX_TLV_STBC_GET(_rx_pkt_tlv) \ 592 HAL_RX_MSDU_END(_rx_pkt_tlv).stbc 593 594 #define HAL_RX_TLV_RECEPTION_TYPE_GET(_rx_pkt_tlv) \ 595 HAL_RX_MSDU_END(_rx_pkt_tlv).reception_type 596 597 #define HAL_RX_TLV_IP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 598 HAL_RX_MSDU_END(_rx_pkt_tlv).ip_chksum_fail 599 600 #define HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 601 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum_fail 602 603 #define HAL_RX_TLV_MPDU_LEN_ERR_GET(_rx_pkt_tlv) \ 604 HAL_RX_MSDU_END(_rx_pkt_tlv).mpdu_length_err 605 606 #define HAL_RX_TLV_MPDU_FCS_ERR_GET(_rx_pkt_tlv) \ 607 HAL_RX_MSDU_END(_rx_pkt_tlv).fcs_err 608 609 #define HAL_RX_TLV_IS_MCAST_GET(_rx_pkt_tlv) \ 610 HAL_RX_MSDU_END(_rx_pkt_tlv).mcast_bcast 611 612 #ifdef RECEIVE_OFFLOAD 613 /* 614 * LRO information needed from the TLVs 615 */ 616 #define HAL_RX_TLV_GET_LRO_ELIGIBLE(_rx_pkt_tlv) \ 617 HAL_RX_MSDU_END(_rx_pkt_tlv).lro_eligible 618 619 #define HAL_RX_TLV_GET_TCP_ACK(_rx_pkt_tlv) \ 620 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_ack_number 621 622 #define HAL_RX_TLV_GET_TCP_SEQ(_rx_pkt_tlv) \ 623 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_seq_number 624 625 #define HAL_RX_TLV_GET_TCP_WIN(_rx_pkt_tlv) \ 626 HAL_RX_MSDU_END(_rx_pkt_tlv).window_size 627 #endif 628 629 #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \ 630 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type 631 632 #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET 633 #define HAL_RX_TLV_MSDU_PEER_META_DATA_GET(_rx_pkt_tlv) \ 634 HAL_RX_MSDU_END(_rx_pkt_tlv).peer_meta_data 635 #endif 636 637 #define HAL_RX_TLV_PEER_META_DATA_GET(_rx_pkt_tlv) \ 638 HAL_RX_MPDU_START(_rx_pkt_tlv).peer_meta_data 639 640 #define HAL_RX_TLV_KEYID_OCTET_GET(_rx_pkt_tlv) \ 641 HAL_RX_MSDU_END(_rx_pkt_tlv).key_id_octet 642 643 #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(_rx_pkt_tlv) \ 644 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_number 645 646 #define HAL_RX_TLV_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 647 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 648 649 #define HAL_RX_TLV_L3_HEADER_PADDING_GET(_rx_pkt_tlv) \ 650 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_header_padding 651 652 #define HAL_RX_TLV_SA_IDX_GET(_rx_pkt_tlv) \ 653 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_idx 654 655 #define HAL_RX_TLV_DA_IDX_GET(_rx_pkt_tlv) \ 656 HAL_RX_MSDU_END(_rx_pkt_tlv).da_idx_or_sw_peer_id 657 658 #define HAL_RX_TLV_FIRST_MSDU_GET(_rx_pkt_tlv) \ 659 HAL_RX_MSDU_END(_rx_pkt_tlv).first_msdu 660 661 #define HAL_RX_TLV_LAST_MSDU_GET(_rx_pkt_tlv) \ 662 HAL_RX_MSDU_END(_rx_pkt_tlv).last_msdu 663 664 #define HAL_RX_TLV_DA_IS_MCBC_GET(_rx_pkt_tlv) \ 665 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_mcbc 666 667 #define HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(_rx_pkt_tlv) \ 668 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err 669 670 #define HAL_RX_TLV_SA_IS_VALID_GET(_rx_pkt_tlv) \ 671 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_is_valid 672 673 #define HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(_rx_pkt_tlv) \ 674 HAL_RX_MPDU_START(_rx_pkt_tlv).frame_encryption_info_valid 675 676 #define HAL_RX_TLV_MPDU_PN_31_0_GET(_rx_pkt_tlv) \ 677 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_31_0 678 679 #define HAL_RX_TLV_MPDU_PN_63_32_GET(_rx_pkt_tlv) \ 680 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_63_32 681 682 #define HAL_RX_TLV_MPDU_PN_95_64_GET(_rx_pkt_tlv) \ 683 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_95_64 684 685 #define HAL_RX_TLV_DA_IS_VALID_GET(_rx_pkt_tlv) \ 686 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_valid 687 688 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_pkt_tlv) \ 689 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_valid 690 691 #define HAL_RX_TLV_SW_PEER_ID_GET(_rx_pkt_tlv) \ 692 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_peer_id 693 694 #define HAL_RX_TLV_MPDU_GET_TODS(_rx_pkt_tlv) \ 695 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 696 697 #define HAL_RX_TLV_MPDU_GET_FROMDS(_rx_pkt_tlv) \ 698 HAL_RX_MPDU_START(_rx_pkt_tlv).fr_ds 699 700 #define HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(_rx_pkt_tlv) \ 701 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 702 703 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_pkt_tlv) \ 704 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_valid 705 706 #define HAL_RX_TLV_MPDU_AD1_31_0_GET(_rx_pkt_tlv) \ 707 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_31_0 708 709 #define HAL_RX_TLV_MPDU_AD1_47_32_GET(_rx_pkt_tlv) \ 710 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_47_32 711 712 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_pkt_tlv) \ 713 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_valid 714 715 #define HAL_RX_TLV_MPDU_AD2_15_0_GET(_rx_pkt_tlv) \ 716 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_15_0 717 718 #define HAL_RX_TLV_MPDU_AD2_47_16_GET(_rx_pkt_tlv) \ 719 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_47_16 720 721 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_pkt_tlv) \ 722 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_valid 723 724 #define HAL_RX_TLV_MPDU_AD3_31_0_GET(_rx_pkt_tlv) \ 725 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_31_0 726 727 #define HAL_RX_TLV_MPDU_AD3_47_32_GET(_rx_pkt_tlv) \ 728 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_47_32 729 730 #define HAL_RX_TLV_MPDU_AD4_31_0_GET(_rx_pkt_tlv) \ 731 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_31_0 732 733 #define HAL_RX_TLV_MPDU_AD4_47_32_GET(_rx_pkt_tlv) \ 734 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_47_32 735 736 #define HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_pkt_tlv) \ 737 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_control_valid 738 739 #define HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 740 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 741 742 #define HAL_RX_TLV_GET_FC_VALID(_rx_pkt_tlv) \ 743 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 744 745 #define HAL_RX_TLV_GET_TO_DS_FLAG(_rx_pkt_tlv) \ 746 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 747 748 #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_pkt_tlv) \ 749 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_field 750 751 #define HAL_RX_TLV_FLOW_IDX_GET(_rx_pkt_tlv) \ 752 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx 753 754 #define HAL_RX_TLV_REO_DEST_IND_GET(_rx_pkt_tlv) \ 755 HAL_RX_MSDU_END(_rx_pkt_tlv).reo_destination_indication 756 757 #define HAL_RX_TLV_FLOW_IDX_INVALID_GET(_rx_pkt_tlv) \ 758 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_invalid 759 760 #define HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(_rx_pkt_tlv) \ 761 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_timeout 762 763 #define HAL_RX_TLV_FSE_METADATA_GET(_rx_pkt_tlv) \ 764 HAL_RX_MSDU_END(_rx_pkt_tlv).fse_metadata 765 766 #define HAL_RX_TLV_CCE_METADATA_GET(_rx_pkt_tlv) \ 767 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_metadata 768 769 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 770 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 771 772 #define HAL_RX_TLV_GET_TCP_CHKSUM(_rx_pkt_tlv) \ 773 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum 774 775 #define HAL_RX_TLV_GET_FLOW_AGGR_CONT(_rx_pkt_tlv) \ 776 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_aggregation_continuation 777 778 #define HAL_RX_TLV_GET_FLOW_AGGR_COUNT(_rx_pkt_tlv) \ 779 HAL_RX_MSDU_END(_rx_pkt_tlv).aggregation_count 780 781 #define HAL_RX_TLV_GET_FISA_TIMEOUT(_rx_pkt_tlv) \ 782 HAL_RX_MSDU_END(_rx_pkt_tlv).fisa_timeout 783 784 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(_rx_pkt_tlv) \ 785 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_l4_checksum 786 787 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(_rx_pkt_tlv) \ 788 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_ip_length 789 790 #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 791 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 792 793 #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 794 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 795 796 #define HAL_RX_REO_QUEUE_DESC_ADDR_39_32_GET(_rx_pkt_tlv) \ 797 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_39_32 798 799 /* used by monitor mode for parsing from full TLV */ 800 #define HAL_RX_MON_GET_FC_VALID(_rx_mpdu_start) \ 801 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MPDU_FRAME_CONTROL_VALID) 802 803 #define HAL_RX_MON_GET_TO_DS_FLAG(_rx_mpdu_start) \ 804 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, TO_DS) 805 806 #define HAL_RX_MON_GET_MAC_ADDR2_VALID(_rx_mpdu_start) \ 807 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MAC_ADDR_AD2_VALID) 808 809 static inline 810 uint32_t hal_rx_tlv_decap_format_get_be(void *hw_desc_addr) 811 { 812 struct rx_pkt_tlvs *rx_pkt_tlvs = 813 (struct rx_pkt_tlvs *)hw_desc_addr; 814 815 return HAL_RX_TLV_DECAP_FORMAT_GET(rx_pkt_tlvs); 816 } 817 818 static inline uint32_t hal_rx_tlv_msdu_done_get_be(uint8_t *buf) 819 { 820 return HAL_RX_TLV_MSDU_DONE_GET(buf); 821 } 822 823 /** 824 * hal_rx_tlv_first_mpdu_get_be() - get first_mpdu bit from rx attention 825 * @buf: pointer to rx_pkt_tlvs 826 * 827 * Return: uint32_t(first_msdu) 828 */ 829 static inline uint32_t hal_rx_tlv_first_mpdu_get_be(uint8_t *buf) 830 { 831 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 832 833 return HAL_RX_TLV_FIRST_MPDU_GET(rx_pkt_tlvs); 834 } 835 836 /** 837 * hal_rx_msdu_cce_match_get_be() - get CCE match bit from rx attention 838 * @buf: pointer to rx_pkt_tlvs 839 * 840 * Return: CCE match value 841 */ 842 static inline bool hal_rx_msdu_cce_match_get_be(uint8_t *buf) 843 { 844 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 845 846 return HAL_RX_TLV_CCE_MATCH_GET(rx_pkt_tlvs); 847 } 848 849 #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET 850 /* 851 * Get peer_meta_data from RX_MSDU_END 852 */ 853 854 static inline uint32_t hal_rx_msdu_peer_meta_data_get_be(uint8_t *buf) 855 { 856 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 857 858 return HAL_RX_TLV_MSDU_PEER_META_DATA_GET(rx_pkt_tlvs); 859 } 860 #endif 861 862 /** 863 * hal_rx_mpdu_get_addr1_be() - API to check get address1 of the mpdu 864 * @buf: pointer to the start of RX PKT TLV headera 865 * @mac_addr: pointer to mac address 866 * 867 * Return: success/failure 868 */ 869 static inline QDF_STATUS hal_rx_mpdu_get_addr1_be(uint8_t *buf, 870 uint8_t *mac_addr) 871 { 872 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 873 struct __attribute__((__packed__)) hal_addr1 { 874 uint32_t ad1_31_0; 875 uint16_t ad1_47_32; 876 }; 877 struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr; 878 uint32_t mac_addr_ad1_valid; 879 880 mac_addr_ad1_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET( 881 rx_pkt_tlvs); 882 883 if (mac_addr_ad1_valid) { 884 addr->ad1_31_0 = HAL_RX_TLV_MPDU_AD1_31_0_GET(rx_pkt_tlvs); 885 addr->ad1_47_32 = HAL_RX_TLV_MPDU_AD1_47_32_GET(rx_pkt_tlvs); 886 return QDF_STATUS_SUCCESS; 887 } 888 889 return QDF_STATUS_E_FAILURE; 890 } 891 892 #ifndef CONFIG_WORD_BASED_TLV 893 /** 894 * hal_rx_mpdu_info_ampdu_flag_get_be() - get ampdu flag bit 895 * from rx mpdu info 896 * @buf: pointer to rx_pkt_tlvs 897 * 898 * Return: ampdu flag 899 */ 900 static inline bool hal_rx_mpdu_info_ampdu_flag_get_be(uint8_t *buf) 901 { 902 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 903 904 return !!HAL_RX_TLV_AMPDU_FLAG_GET(rx_pkt_tlvs); 905 } 906 907 /** 908 * hal_rx_get_qdesc_addr_be() - API to get qdesc address of reo 909 * entrance ring desc 910 * 911 * @dst_ring_desc: reo dest ring descriptor (used for Lithium DP) 912 * @buf: pointer to the start of RX PKT TLV headers 913 * Return: qdesc address in reo destination ring buffer 914 */ 915 static inline uint64_t hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc, 916 uint8_t *buf) 917 { 918 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 919 920 return (uint64_t)HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(rx_pkt_tlvs); 921 } 922 923 /** 924 * hal_rx_print_pn_be() - Prints the PN of rx packet. 925 * @buf: rx_tlv_hdr of the received packet 926 * 927 * Return: void 928 */ 929 static inline void hal_rx_print_pn_be(uint8_t *buf) 930 { 931 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 932 933 uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 934 uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs); 935 uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 936 uint32_t pn_127_96 = HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs); 937 938 hal_debug("PN number pn_127_96 0x%x pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x", 939 pn_127_96, pn_95_64, pn_63_32, pn_31_0); 940 } 941 942 static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num) 943 { 944 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 945 946 pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(pkt_tlvs); 947 pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(pkt_tlvs) << 32); 948 949 pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(pkt_tlvs); 950 pn_num[1] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_127_96_GET(pkt_tlvs) << 32); 951 } 952 953 /** 954 * hal_rx_mpdu_get_addr4_be() - API to get address4 of the mpdu 955 * in the packet 956 * @buf: pointer to the start of RX PKT TLV header 957 * @mac_addr: pointer to mac address 958 * 959 * Return: success/failure 960 */ 961 static inline QDF_STATUS hal_rx_mpdu_get_addr4_be(uint8_t *buf, 962 uint8_t *mac_addr) 963 { 964 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 965 struct __attribute__((__packed__)) hal_addr4 { 966 uint32_t ad4_31_0; 967 uint16_t ad4_47_32; 968 }; 969 struct hal_addr4 *addr = (struct hal_addr4 *)mac_addr; 970 uint32_t mac_addr_ad4_valid; 971 972 mac_addr_ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(pkt_tlvs); 973 974 if (mac_addr_ad4_valid) { 975 addr->ad4_31_0 = HAL_RX_TLV_MPDU_AD4_31_0_GET(pkt_tlvs); 976 addr->ad4_47_32 = HAL_RX_TLV_MPDU_AD4_47_32_GET(pkt_tlvs); 977 return QDF_STATUS_SUCCESS; 978 } 979 980 return QDF_STATUS_E_FAILURE; 981 } 982 983 /** 984 * hal_rx_priv_info_set_in_tlv_be() - Save the private info to 985 * the reserved bytes of rx_tlv_hdr 986 * @buf: start of rx_tlv_hdr 987 * @priv_data: hal_wbm_err_desc_info structure 988 * @len: length of the private data 989 * Return: void 990 */ 991 static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf, 992 uint8_t *priv_data, 993 uint32_t len) 994 { 995 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 996 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 997 RX_BE_PADDING0_BYTES : len; 998 999 qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len); 1000 } 1001 1002 /** 1003 * hal_rx_priv_info_get_from_tlv_be() - retrieve the private data from 1004 * the reserved bytes of rx_tlv_hdr. 1005 * @buf: start of rx_tlv_hdr 1006 * @priv_data: Handle to get the private data, output parameter. 1007 * @len: length of the private data 1008 * Return: void 1009 */ 1010 static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf, 1011 uint8_t *priv_data, 1012 uint32_t len) 1013 { 1014 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1015 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1016 RX_BE_PADDING0_BYTES : len; 1017 1018 qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len); 1019 } 1020 1021 /** 1022 * hal_rx_tlv_l3_type_get_be() - API to get the l3 type from 1023 * rx_msdu_start TLV 1024 * @buf: pointer to the start of RX PKT TLV headers 1025 * 1026 * Return: uint32_t(l3 type) 1027 */ 1028 static inline uint32_t hal_rx_tlv_l3_type_get_be(uint8_t *buf) 1029 { 1030 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1031 1032 return HAL_RX_TLV_L3_TYPE_GET(rx_pkt_tlvs); 1033 } 1034 1035 /** 1036 * hal_rx_hw_desc_get_ppduid_get_be() - retrieve ppdu id 1037 * @rx_tlv_hdr: start address of rx_pkt_tlvs 1038 * @rxdma_dst_ring_desc: Rx HW descriptor 1039 * 1040 * Return: ppdu id 1041 */ 1042 static inline uint32_t 1043 hal_rx_hw_desc_get_ppduid_get_be(void *rx_tlv_hdr, void *rxdma_dst_ring_desc) 1044 { 1045 struct rx_pkt_tlvs *rx_pkt_tlvs = 1046 (struct rx_pkt_tlvs *)rx_tlv_hdr; 1047 1048 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 1049 } 1050 1051 /** 1052 * hal_rx_tlv_phy_ppdu_id_get_be() - get phy_ppdu_id value 1053 * from rx attention 1054 * @buf: pointer to rx_pkt_tlvs 1055 * 1056 * Return: phy_ppdu_id 1057 */ 1058 static inline uint16_t hal_rx_tlv_phy_ppdu_id_get_be(uint8_t *buf) 1059 { 1060 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1061 1062 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 1063 } 1064 1065 /** 1066 * hal_rx_attn_phy_ppdu_id_get_be() - get phy_ppdu_id value 1067 * from rx attention 1068 * @buf: pointer to rx_pkt_tlvs 1069 * 1070 * Return: phy_ppdu_id 1071 */ 1072 static inline uint16_t hal_rx_attn_phy_ppdu_id_get_be(uint8_t *buf) 1073 { 1074 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1075 uint16_t phy_ppdu_id; 1076 1077 phy_ppdu_id = HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 1078 1079 return phy_ppdu_id; 1080 } 1081 1082 static inline uint32_t 1083 hal_rx_get_ppdu_id_be(uint8_t *buf) 1084 { 1085 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1086 1087 return HAL_RX_GET_PPDU_ID(rx_pkt_tlvs); 1088 } 1089 1090 /** 1091 * hal_rx_mpdu_peer_meta_data_set_be() - set peer meta data in RX mpdu start tlv 1092 * @buf: rx_tlv_hdr of the received packet 1093 * @peer_mdata: peer meta data to be set. 1094 * 1095 * Return: void 1096 */ 1097 static inline void 1098 hal_rx_mpdu_peer_meta_data_set_be(uint8_t *buf, uint32_t peer_mdata) 1099 { 1100 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1101 1102 HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs) = peer_mdata; 1103 } 1104 1105 /* 1106 * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START 1107 */ 1108 1109 static inline uint32_t hal_rx_mpdu_peer_meta_data_get_be(uint8_t *buf) 1110 { 1111 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1112 1113 return HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs); 1114 } 1115 1116 static inline uint8_t hal_rx_get_filter_category_be(uint8_t *buf) 1117 { 1118 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1119 1120 return HAL_RX_GET_FILTER_CATEGORY(rx_pkt_tlvs); 1121 } 1122 1123 /** 1124 * hal_rx_is_unicast_be() - check packet is unicast frame or not. 1125 * @buf: pointer to rx pkt TLV. 1126 * 1127 * Return: true on unicast. 1128 */ 1129 static inline bool hal_rx_is_unicast_be(uint8_t *buf) 1130 { 1131 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1132 uint32_t grp_id; 1133 1134 grp_id = HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(rx_pkt_tlvs); 1135 1136 return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false; 1137 } 1138 1139 #else 1140 #define IS_ADDR_MULTICAST(_a) (*(_a) & 0x01) 1141 static inline bool hal_rx_is_unicast_be(uint8_t *buf) 1142 { 1143 uint8_t mac[QDF_MAC_ADDR_SIZE] = {0}; 1144 1145 hal_rx_mpdu_get_addr1_be(buf, &mac[0]); 1146 1147 return !IS_ADDR_MULTICAST(mac); 1148 } 1149 1150 /** 1151 * hal_rx_priv_info_set_in_tlv_be() - Save the private info to 1152 * the reserved bytes of rx_tlv_hdr 1153 * @buf: start of rx_tlv_hdr 1154 * @priv_data: hal_wbm_err_desc_info structure 1155 * @len: length of the private data 1156 * 1157 * Return: void 1158 */ 1159 static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf, 1160 uint8_t *priv_data, 1161 uint32_t len) 1162 { 1163 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1164 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1165 RX_BE_PADDING0_BYTES : len; 1166 1167 qdf_mem_copy(&(HAL_RX_MSDU_END(pkt_tlvs).ppdu_start_timestamp_63_32), 1168 priv_data, copy_len); 1169 } 1170 1171 /** 1172 * hal_rx_priv_info_get_from_tlv_be() - retrieve the private data from 1173 * the reserved bytes of rx_tlv_hdr. 1174 * @buf: start of rx_tlv_hdr 1175 * @priv_data: Handle to get the private data, output parameter. 1176 * @len: length of the private data 1177 * 1178 * Return: void 1179 */ 1180 static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf, 1181 uint8_t *priv_data, 1182 uint32_t len) 1183 { 1184 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1185 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1186 RX_BE_PADDING0_BYTES : len; 1187 1188 qdf_mem_copy(priv_data, 1189 &(HAL_RX_MSDU_END(pkt_tlvs).ppdu_start_timestamp_63_32), 1190 copy_len); 1191 } 1192 1193 /** 1194 * hal_rx_print_pn_be() - Prints the PN of rx packet. 1195 * @buf: rx_tlv_hdr of the received packet 1196 * 1197 * Return: void 1198 */ 1199 static inline void hal_rx_print_pn_be(uint8_t *buf) 1200 { 1201 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1202 1203 uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 1204 uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs); 1205 uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 1206 1207 hal_debug("PN number pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x", 1208 pn_95_64, pn_63_32, pn_31_0); 1209 } 1210 1211 static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num) 1212 { 1213 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1214 1215 pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(pkt_tlvs); 1216 pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(pkt_tlvs) << 32); 1217 1218 pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(pkt_tlvs); 1219 } 1220 #endif 1221 1222 /** 1223 * hal_rx_tlv_msdu_len_get_be() - API to get the MSDU length from 1224 * rx_msdu_start TLV 1225 * @buf: pointer to the start of RX PKT TLV headers 1226 * 1227 * Return: msdu length 1228 */ 1229 static inline uint32_t hal_rx_tlv_msdu_len_get_be(uint8_t *buf) 1230 { 1231 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1232 1233 return HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 1234 } 1235 1236 /** 1237 * hal_rx_tlv_msdu_len_set_be() - API to set the MSDU length from 1238 * rx_msdu_start TLV 1239 * @buf: pointer to the start of RX PKT TLV headers 1240 * @len: msdu length 1241 * 1242 * Return: none 1243 */ 1244 static inline void hal_rx_tlv_msdu_len_set_be(uint8_t *buf, uint32_t len) 1245 { 1246 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1247 1248 HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs) = len; 1249 } 1250 1251 /** 1252 * hal_rx_tlv_bw_get_be() - API to get the Bandwidth Interval from 1253 * rx_msdu_start 1254 * @buf: pointer to the start of RX PKT TLV header 1255 * 1256 * Return: uint32_t(bw) 1257 */ 1258 static inline uint32_t hal_rx_tlv_bw_get_be(uint8_t *buf) 1259 { 1260 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1261 1262 return HAL_RX_TLV_BW_GET(rx_pkt_tlvs); 1263 } 1264 1265 /** 1266 * hal_rx_tlv_toeplitz_get_be() - API to get the toeplitz hash from 1267 * rx_msdu_start TLV 1268 * @buf: pointer to the start of RX PKT TLV headers 1269 * 1270 * Return: toeplitz hash 1271 */ 1272 static inline uint32_t hal_rx_tlv_toeplitz_get_be(uint8_t *buf) 1273 { 1274 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1275 1276 return HAL_RX_TLV_FLOWID_TOEPLITZ_GET(rx_pkt_tlvs); 1277 } 1278 1279 /** 1280 * hal_rx_tlv_sgi_get_be() - API to get the Short Guard Interval from 1281 * rx_msdu_start TLV 1282 * @buf: pointer to the start of RX PKT TLV headers 1283 * 1284 * Return: uint32_t(sgi) 1285 */ 1286 static inline uint32_t hal_rx_tlv_sgi_get_be(uint8_t *buf) 1287 { 1288 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1289 1290 return HAL_RX_TLV_SGI_GET(rx_pkt_tlvs); 1291 } 1292 1293 /** 1294 * hal_rx_tlv_rate_mcs_get_be() - API to get the MCS rate from 1295 * rx_msdu_start TLV 1296 * @buf: pointer to the start of RX PKT TLV headers 1297 * 1298 * Return: uint32_t(rate_mcs) 1299 */ 1300 static inline uint32_t hal_rx_tlv_rate_mcs_get_be(uint8_t *buf) 1301 { 1302 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1303 uint32_t rate_mcs; 1304 1305 rate_mcs = HAL_RX_TLV_RATE_MCS_GET(rx_pkt_tlvs); 1306 1307 return rate_mcs; 1308 } 1309 1310 /** 1311 * hal_rx_msdu_get_keyid_be() - API to get the key id of the decrypted packet 1312 * from rx_msdu_end 1313 * @buf: pointer to the start of RX PKT TLV header 1314 * 1315 * Return: uint32_t(key id) 1316 */ 1317 1318 static inline uint8_t hal_rx_msdu_get_keyid_be(uint8_t *buf) 1319 { 1320 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1321 uint32_t keyid_octet; 1322 1323 keyid_octet = HAL_RX_TLV_KEYID_OCTET_GET(rx_pkt_tlvs); 1324 1325 return keyid_octet & 0x3; 1326 } 1327 1328 /** 1329 * hal_rx_tlv_get_rssi_be() - API to get the rssi of received pkt from 1330 * rx_msdu_start 1331 * @buf: pointer to the start of RX PKT TLV header 1332 * 1333 * Return: uint32_t(rssi) 1334 */ 1335 1336 static inline uint32_t hal_rx_tlv_get_rssi_be(uint8_t *buf) 1337 { 1338 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1339 uint32_t rssi; 1340 1341 rssi = HAL_RX_TLV_RSSI_GET(rx_pkt_tlvs); 1342 1343 return rssi; 1344 } 1345 1346 /** 1347 * hal_rx_tlv_get_freq_be() - API to get the frequency of operating 1348 * channel from rx_msdu_start 1349 * @buf: pointer to the start of RX PKT TLV header 1350 * 1351 * Return: uint32_t(frequency) 1352 */ 1353 1354 static inline uint32_t hal_rx_tlv_get_freq_be(uint8_t *buf) 1355 { 1356 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1357 uint32_t freq; 1358 1359 freq = HAL_RX_TLV_FREQ_GET(rx_pkt_tlvs); 1360 1361 return freq; 1362 } 1363 1364 1365 /** 1366 * hal_rx_tlv_get_pkt_type_be() - API to get the pkt type from 1367 * rx_msdu_start 1368 * @buf: pointer to the start of RX PKT TLV header 1369 * 1370 * Return: uint32_t(pkt type) 1371 */ 1372 1373 static inline uint32_t hal_rx_tlv_get_pkt_type_be(uint8_t *buf) 1374 { 1375 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1376 uint32_t pkt_type; 1377 1378 pkt_type = HAL_RX_TLV_PKT_TYPE_GET(rx_pkt_tlvs); 1379 1380 return pkt_type; 1381 } 1382 1383 /******************************************************************************* 1384 * RX ERROR APIS 1385 ******************************************************************************/ 1386 1387 /** 1388 * hal_rx_tlv_decrypt_err_get_be() - API to get the Decrypt ERR from 1389 * rx_mpdu_end TLV 1390 * @buf: pointer to the start of RX PKT TLV headers 1391 * 1392 * Return: uint32_t(decrypt_err) 1393 */ 1394 static inline uint32_t hal_rx_tlv_decrypt_err_get_be(uint8_t *buf) 1395 { 1396 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1397 uint32_t decrypt_err; 1398 1399 decrypt_err = HAL_RX_TLV_DECRYPT_ERR_GET(rx_pkt_tlvs); 1400 1401 return decrypt_err; 1402 } 1403 1404 /** 1405 * hal_rx_tlv_mic_err_get_be() - API to get the MIC ERR from rx_tlv TLV 1406 * @buf: pointer to the start of RX PKT TLV headers 1407 * 1408 * Return: uint32_t(mic_err) 1409 */ 1410 static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf) 1411 { 1412 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1413 uint32_t mic_err; 1414 1415 mic_err = HAL_RX_TLV_MIC_ERR_GET(rx_pkt_tlvs); 1416 1417 return mic_err; 1418 } 1419 1420 /** 1421 * hal_get_reo_ent_desc_qdesc_addr_be() - API to get qdesc address of 1422 * reo entrance ring desc 1423 * @desc: reo entrance ring descriptor 1424 * 1425 * Return: qdesc address 1426 */ 1427 static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc) 1428 { 1429 return desc + REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET; 1430 } 1431 1432 /** 1433 * hal_set_reo_ent_desc_reo_dest_ind_be() - API to set reo destination 1434 * indication of reo entrance ring desc 1435 * @desc: reo ent ring descriptor 1436 * @dst_ind: reo destination indication value 1437 * 1438 * Return: None 1439 */ 1440 static inline void 1441 hal_set_reo_ent_desc_reo_dest_ind_be(uint8_t *desc, uint32_t dst_ind) 1442 { 1443 HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING, 1444 REO_DESTINATION_INDICATION, dst_ind); 1445 } 1446 1447 /** 1448 * hal_rx_mpdu_sequence_number_get_be() - Get mpdu sequence number 1449 * @buf: pointer to packet buffer 1450 * 1451 * Return: mpdu sequence 1452 */ 1453 static inline int hal_rx_mpdu_sequence_number_get_be(uint8_t *buf) 1454 { 1455 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1456 1457 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 1458 } 1459 1460 /** 1461 * hal_rx_msdu_packet_metadata_get_generic_be() - API to get the msdu 1462 * information from 1463 * rx_msdu_end TLV 1464 * @buf: pointer to the start of RX PKT TLV headers 1465 * @pkt_msdu_metadata: pointer to the msdu info structure 1466 */ 1467 static inline void 1468 hal_rx_msdu_packet_metadata_get_generic_be(uint8_t *buf, 1469 void *pkt_msdu_metadata) 1470 { 1471 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1472 struct hal_rx_msdu_metadata *msdu_metadata = 1473 (struct hal_rx_msdu_metadata *)pkt_msdu_metadata; 1474 1475 msdu_metadata->l3_hdr_pad = 1476 HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 1477 msdu_metadata->sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 1478 msdu_metadata->da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 1479 msdu_metadata->sa_sw_peer_id = 1480 HAL_RX_TLV_SA_SW_PEER_ID_GET(rx_pkt_tlvs); 1481 } 1482 1483 /** 1484 * hal_rx_tlv_nss_get_be() - API to get the NSS Interval from 1485 * rx_msdu_start 1486 * @buf: pointer to the start of RX PKT TLV header 1487 * 1488 * Return: uint32_t(nss) 1489 */ 1490 static inline uint32_t hal_rx_tlv_nss_get_be(uint8_t *buf) 1491 { 1492 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1493 uint8_t mimo_ss_bitmap; 1494 1495 mimo_ss_bitmap = HAL_RX_TLV_MIMO_SS_BITMAP(rx_pkt_tlvs); 1496 1497 return qdf_get_hweight8(mimo_ss_bitmap); 1498 } 1499 1500 #ifdef GET_MSDU_AGGREGATION 1501 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)\ 1502 {\ 1503 bool first_msdu, last_msdu; \ 1504 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_desc);\ 1505 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_desc);\ 1506 if (first_msdu && last_msdu)\ 1507 rs->rs_flags &= (~IEEE80211_AMSDU_FLAG);\ 1508 else\ 1509 rs->rs_flags |= (IEEE80211_AMSDU_FLAG); \ 1510 } \ 1511 1512 #define HAL_RX_SET_MSDU_AGGREGATION((rs_mpdu), (rs_ppdu))\ 1513 {\ 1514 if (rs_mpdu->rs_flags & IEEE80211_AMSDU_FLAG)\ 1515 rs_ppdu->rs_flags |= IEEE80211_AMSDU_FLAG;\ 1516 } \ 1517 1518 #else 1519 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs) 1520 #define HAL_RX_SET_MSDU_AGGREGATION(rs_mpdu, rs_ppdu) 1521 #endif 1522 1523 /** 1524 * hal_rx_mon_hw_desc_get_mpdu_status_be() - Retrieve MPDU status 1525 * @hw_desc_addr: Start address of Rx HW TLVs 1526 * @rs: Status for monitor mode 1527 * 1528 * Return: void 1529 */ 1530 static inline void 1531 hal_rx_mon_hw_desc_get_mpdu_status_be(void *hw_desc_addr, 1532 struct mon_rx_status *rs) 1533 { 1534 uint32_t reg_value; 1535 struct rx_pkt_tlvs *rx_desc = 1536 (struct rx_pkt_tlvs *)hw_desc_addr; 1537 const uint32_t sgi_hw_to_cdp[] = { 1538 CDP_SGI_0_8_US, 1539 CDP_SGI_0_4_US, 1540 CDP_SGI_1_6_US, 1541 CDP_SGI_3_2_US, 1542 }; 1543 1544 HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs); 1545 1546 rs->ant_signal_db = HAL_RX_TLV_ANT_SIGNAL_DB_GET(rx_desc); 1547 rs->is_stbc = HAL_RX_TLV_STBC_GET(rx_desc); 1548 1549 reg_value = HAL_RX_TLV_SGI_GET(rx_desc); 1550 rs->sgi = sgi_hw_to_cdp[reg_value]; 1551 1552 reg_value = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_desc); 1553 rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0; 1554 /* TODO: rs->beamformed should be set for SU beamforming also */ 1555 } 1556 1557 static inline uint32_t hal_rx_tlv_tid_get_be(uint8_t *buf) 1558 { 1559 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1560 uint32_t tid; 1561 1562 tid = HAL_RX_TLV_TID_GET(rx_pkt_tlvs); 1563 1564 return tid; 1565 } 1566 1567 /** 1568 * hal_rx_tlv_reception_type_get_be() - API to get the reception type 1569 * Interval from rx_msdu_start 1570 * @buf: pointer to the start of RX PKT TLV header 1571 * 1572 * Return: uint32_t(reception_type) 1573 */ 1574 static inline 1575 uint32_t hal_rx_tlv_reception_type_get_be(uint8_t *buf) 1576 { 1577 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1578 uint32_t reception_type; 1579 1580 reception_type = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_pkt_tlvs); 1581 1582 return reception_type; 1583 } 1584 1585 /** 1586 * hal_rx_msdu_end_da_idx_get_be() - API to get da_idx from 1587 * rx_msdu_end TLV 1588 * @buf: pointer to the start of RX PKT TLV headers 1589 * 1590 * Return: da index 1591 */ 1592 static inline uint16_t hal_rx_msdu_end_da_idx_get_be(uint8_t *buf) 1593 { 1594 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1595 uint16_t da_idx; 1596 1597 da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 1598 1599 return da_idx; 1600 } 1601 1602 /** 1603 * hal_rx_get_rx_fragment_number_be() - Function to retrieve rx fragment number 1604 * @buf: Network buffer 1605 * 1606 * Return: rx fragment number 1607 */ 1608 static inline 1609 uint8_t hal_rx_get_rx_fragment_number_be(uint8_t *buf) 1610 { 1611 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1612 1613 /* Return first 4 bits as fragment number */ 1614 return (HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs) & 1615 DOT11_SEQ_FRAG_MASK); 1616 } 1617 1618 /** 1619 * hal_rx_tlv_da_is_mcbc_get_be() - API to check if pkt is MCBC from 1620 * rx_msdu_end TLV 1621 * @buf: pointer to the start of RX PKT TLV headers 1622 * 1623 * Return: da_is_mcbc 1624 */ 1625 static inline uint8_t 1626 hal_rx_tlv_da_is_mcbc_get_be(uint8_t *buf) 1627 { 1628 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1629 1630 return HAL_RX_TLV_DA_IS_MCBC_GET(rx_pkt_tlvs); 1631 } 1632 1633 /** 1634 * hal_rx_tlv_is_tkip_mic_err_get_be() - API to get tkip Mic error 1635 * from rx_msdu_end TLV 1636 * @buf: pointer to the start of RX PKT TLV headers 1637 * 1638 * Return: tkip_mic_err 1639 */ 1640 static inline uint8_t 1641 hal_rx_tlv_is_tkip_mic_err_get_be(uint8_t *buf) 1642 { 1643 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1644 1645 return HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(rx_pkt_tlvs); 1646 } 1647 1648 /** 1649 * hal_rx_tlv_sa_is_valid_get_be() - API to get the sa_is_valid bit from 1650 * rx_msdu_end TLV 1651 * @buf: pointer to the start of RX PKT TLV headers 1652 * 1653 * Return: sa_is_valid bit 1654 */ 1655 static inline uint8_t 1656 hal_rx_tlv_sa_is_valid_get_be(uint8_t *buf) 1657 { 1658 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1659 uint8_t sa_is_valid; 1660 1661 sa_is_valid = HAL_RX_TLV_SA_IS_VALID_GET(rx_pkt_tlvs); 1662 1663 return sa_is_valid; 1664 } 1665 1666 /** 1667 * hal_rx_tlv_sa_idx_get_be() - API to get the sa_idx from rx_msdu_end TLV 1668 * @buf: pointer to the start of RX PKT TLV headers 1669 * 1670 * Return: sa_idx (SA AST index) 1671 */ 1672 static inline 1673 uint16_t hal_rx_tlv_sa_idx_get_be(uint8_t *buf) 1674 { 1675 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1676 uint16_t sa_idx; 1677 1678 sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 1679 1680 return sa_idx; 1681 } 1682 1683 /** 1684 * hal_rx_desc_is_first_msdu_be() - Check if first msdu 1685 * @hw_desc_addr: hardware descriptor address 1686 * 1687 * Return: 0 - success/ non-zero failure 1688 */ 1689 static inline uint32_t hal_rx_desc_is_first_msdu_be(void *hw_desc_addr) 1690 { 1691 struct rx_pkt_tlvs *rx_pkt_tlvs = 1692 (struct rx_pkt_tlvs *)hw_desc_addr; 1693 1694 return HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 1695 } 1696 1697 /** 1698 * hal_rx_tlv_l3_hdr_padding_get_be() - API to get the l3_header padding 1699 * from rx_msdu_end TLV 1700 * @buf: pointer to the start of RX PKT TLV headers 1701 * 1702 * Return: number of l3 header padding bytes 1703 */ 1704 static inline uint32_t hal_rx_tlv_l3_hdr_padding_get_be(uint8_t *buf) 1705 { 1706 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1707 uint32_t l3_header_padding; 1708 1709 l3_header_padding = HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 1710 1711 return l3_header_padding; 1712 } 1713 1714 /** 1715 * hal_rx_encryption_info_valid_be() - Returns encryption type. 1716 * @buf: rx_tlv_hdr of the received packet 1717 * 1718 * Return: encryption type 1719 */ 1720 static inline uint32_t hal_rx_encryption_info_valid_be(uint8_t *buf) 1721 { 1722 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1723 uint32_t encryption_info = 1724 HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(rx_pkt_tlvs); 1725 1726 return encryption_info; 1727 } 1728 1729 /** 1730 * hal_rx_tlv_first_msdu_get_be() - API to get first msdu status from 1731 * rx_msdu_end TLV 1732 * @buf: pointer to the start of RX PKT TLV headers 1733 * 1734 * Return: first_msdu 1735 */ 1736 static inline uint8_t hal_rx_tlv_first_msdu_get_be(uint8_t *buf) 1737 { 1738 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1739 uint8_t first_msdu; 1740 1741 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 1742 1743 return first_msdu; 1744 } 1745 1746 /** 1747 * hal_rx_tlv_da_is_valid_get_be() - API to check if da is valid from 1748 * rx_msdu_end TLV 1749 * @buf: pointer to the start of RX PKT TLV headers 1750 * 1751 * Return: da_is_valid 1752 */ 1753 static inline uint8_t hal_rx_tlv_da_is_valid_get_be(uint8_t *buf) 1754 { 1755 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1756 uint8_t da_is_valid; 1757 1758 da_is_valid = HAL_RX_TLV_DA_IS_VALID_GET(rx_pkt_tlvs); 1759 1760 return da_is_valid; 1761 } 1762 1763 /** 1764 * hal_rx_tlv_last_msdu_get_be() - API to get last msdu status from 1765 * rx_msdu_end TLV 1766 * @buf: pointer to the start of RX PKT TLV headers 1767 * 1768 * Return: last_msdu 1769 */ 1770 static inline uint8_t hal_rx_tlv_last_msdu_get_be(uint8_t *buf) 1771 { 1772 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1773 uint8_t last_msdu; 1774 1775 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_pkt_tlvs); 1776 1777 return last_msdu; 1778 } 1779 1780 /** 1781 * hal_rx_get_mpdu_mac_ad4_valid_be() - Retrieves if mpdu 4th addr is valid 1782 * @buf: Network buffer 1783 * 1784 * Return: value of mpdu 4th address valid field 1785 */ 1786 static inline bool hal_rx_get_mpdu_mac_ad4_valid_be(uint8_t *buf) 1787 { 1788 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1789 bool ad4_valid = 0; 1790 1791 ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs); 1792 1793 return ad4_valid; 1794 } 1795 1796 /** 1797 * hal_rx_mpdu_start_sw_peer_id_get_be() - Retrieve sw peer_id 1798 * @buf: network buffer 1799 * 1800 * Return: sw peer_id 1801 */ 1802 static inline uint32_t hal_rx_mpdu_start_sw_peer_id_get_be(uint8_t *buf) 1803 { 1804 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1805 1806 return HAL_RX_TLV_SW_PEER_ID_GET(rx_pkt_tlvs); 1807 } 1808 1809 /** 1810 * hal_rx_mpdu_get_to_ds_be() - API to get the tods info 1811 * from rx_mpdu_start 1812 * 1813 * @buf: pointer to the start of RX PKT TLV header 1814 * Return: uint32_t(to_ds) 1815 */ 1816 static inline uint32_t hal_rx_mpdu_get_to_ds_be(uint8_t *buf) 1817 { 1818 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1819 1820 return HAL_RX_TLV_MPDU_GET_TODS(rx_pkt_tlvs); 1821 } 1822 1823 /** 1824 * hal_rx_mpdu_get_fr_ds_be() - API to get the from ds info 1825 * from rx_mpdu_start 1826 * @buf: pointer to the start of RX PKT TLV header 1827 * 1828 * Return: uint32_t(fr_ds) 1829 */ 1830 static inline uint32_t hal_rx_mpdu_get_fr_ds_be(uint8_t *buf) 1831 { 1832 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1833 1834 return HAL_RX_TLV_MPDU_GET_FROMDS(rx_pkt_tlvs); 1835 } 1836 1837 /** 1838 * hal_rx_get_mpdu_frame_control_valid_be() - Retrieves mpdu frame 1839 * control valid 1840 * @buf: Network buffer 1841 * 1842 * Return: value of frame control valid field 1843 */ 1844 static inline uint8_t hal_rx_get_mpdu_frame_control_valid_be(uint8_t *buf) 1845 { 1846 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1847 1848 return HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(rx_pkt_tlvs); 1849 } 1850 1851 /** 1852 * hal_rx_mpdu_get_addr2_be() - API to check get address2 of the mpdu 1853 * in the packet 1854 * @buf: pointer to the start of RX PKT TLV header 1855 * @mac_addr: pointer to mac address 1856 * 1857 * Return: success/failure 1858 */ 1859 static inline QDF_STATUS hal_rx_mpdu_get_addr2_be(uint8_t *buf, 1860 uint8_t *mac_addr) 1861 { 1862 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1863 struct __attribute__((__packed__)) hal_addr2 { 1864 uint16_t ad2_15_0; 1865 uint32_t ad2_47_16; 1866 }; 1867 struct hal_addr2 *addr = (struct hal_addr2 *)mac_addr; 1868 uint32_t mac_addr_ad2_valid; 1869 1870 mac_addr_ad2_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1871 1872 if (mac_addr_ad2_valid) { 1873 addr->ad2_15_0 = HAL_RX_TLV_MPDU_AD2_15_0_GET(rx_pkt_tlvs); 1874 addr->ad2_47_16 = HAL_RX_TLV_MPDU_AD2_47_16_GET(rx_pkt_tlvs); 1875 return QDF_STATUS_SUCCESS; 1876 } 1877 1878 return QDF_STATUS_E_FAILURE; 1879 } 1880 1881 /** 1882 * hal_rx_mpdu_get_addr3_be() - API to get address3 of the mpdu in the 1883 * packet 1884 * @buf: pointer to the start of RX PKT TLV header 1885 * @mac_addr: pointer to mac address 1886 * 1887 * Return: success/failure 1888 */ 1889 static inline QDF_STATUS hal_rx_mpdu_get_addr3_be(uint8_t *buf, 1890 uint8_t *mac_addr) 1891 { 1892 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1893 struct __attribute__((__packed__)) hal_addr3 { 1894 uint32_t ad3_31_0; 1895 uint16_t ad3_47_32; 1896 }; 1897 struct hal_addr3 *addr = (struct hal_addr3 *)mac_addr; 1898 uint32_t mac_addr_ad3_valid; 1899 1900 mac_addr_ad3_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(rx_pkt_tlvs); 1901 1902 if (mac_addr_ad3_valid) { 1903 addr->ad3_31_0 = HAL_RX_TLV_MPDU_AD3_31_0_GET(rx_pkt_tlvs); 1904 addr->ad3_47_32 = HAL_RX_TLV_MPDU_AD3_47_32_GET(rx_pkt_tlvs); 1905 return QDF_STATUS_SUCCESS; 1906 } 1907 1908 return QDF_STATUS_E_FAILURE; 1909 } 1910 1911 /** 1912 * hal_rx_get_mpdu_sequence_control_valid_be() - Get mpdu sequence 1913 * control valid 1914 * @buf: Network buffer 1915 * 1916 * Return: value of sequence control valid field 1917 */ 1918 static inline uint8_t hal_rx_get_mpdu_sequence_control_valid_be(uint8_t *buf) 1919 { 1920 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1921 1922 return HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_pkt_tlvs); 1923 } 1924 1925 /** 1926 * hal_rx_tid_get_be() - get tid based on qos control valid. 1927 * @hal_soc_hdl: hal_soc handle 1928 * @buf: pointer to rx pkt TLV. 1929 * 1930 * Return: tid 1931 */ 1932 static inline uint32_t hal_rx_tid_get_be(hal_soc_handle_t hal_soc_hdl, 1933 uint8_t *buf) 1934 { 1935 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1936 uint8_t qos_control_valid = 1937 HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(rx_pkt_tlvs); 1938 1939 if (qos_control_valid) 1940 return hal_rx_tlv_tid_get_be(buf); 1941 1942 return HAL_RX_NON_QOS_TID; 1943 } 1944 1945 static inline 1946 uint8_t hal_rx_get_fc_valid_be(uint8_t *buf) 1947 { 1948 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1949 1950 return HAL_RX_TLV_GET_FC_VALID(rx_pkt_tlvs); 1951 } 1952 1953 static inline uint8_t hal_rx_get_to_ds_flag_be(uint8_t *buf) 1954 { 1955 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1956 1957 return HAL_RX_TLV_GET_TO_DS_FLAG(rx_pkt_tlvs); 1958 } 1959 1960 static inline uint8_t hal_rx_get_mac_addr2_valid_be(uint8_t *buf) 1961 { 1962 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1963 1964 return HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1965 } 1966 1967 /** 1968 * hal_rx_msdu_flow_idx_get_be() - API to get flow index from 1969 * rx_msdu_end TLV 1970 * @buf: pointer to the start of RX PKT TLV headers 1971 * 1972 * Return: flow index value from MSDU END TLV 1973 */ 1974 static inline uint32_t hal_rx_msdu_flow_idx_get_be(uint8_t *buf) 1975 { 1976 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1977 1978 return HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 1979 } 1980 1981 /** 1982 * hal_rx_msdu_get_reo_destination_indication_be() - API to get 1983 * reo_destination_indication 1984 * from rx_msdu_end 1985 * TLV 1986 * @buf: pointer to the start of RX PKT TLV headers 1987 * @reo_destination_indication: pointer to return value of 1988 * reo_destination_indication 1989 * 1990 * Return: none 1991 */ 1992 static inline void 1993 hal_rx_msdu_get_reo_destination_indication_be(uint8_t *buf, 1994 uint32_t *reo_destination_indication) 1995 { 1996 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1997 1998 *reo_destination_indication = HAL_RX_TLV_REO_DEST_IND_GET(pkt_tlvs); 1999 } 2000 2001 /** 2002 * hal_rx_msdu_flow_idx_invalid_be() - API to get flow index invalid 2003 * from rx_msdu_end TLV 2004 * @buf: pointer to the start of RX PKT TLV headers 2005 * 2006 * Return: flow index invalid value from MSDU END TLV 2007 */ 2008 static inline bool hal_rx_msdu_flow_idx_invalid_be(uint8_t *buf) 2009 { 2010 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2011 2012 return HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 2013 } 2014 2015 /** 2016 * hal_rx_msdu_flow_idx_timeout_be() - API to get flow index timeout 2017 * from rx_msdu_end TLV 2018 * @buf: pointer to the start of RX PKT TLV headers 2019 * 2020 * Return: flow index timeout value from MSDU END TLV 2021 */ 2022 static inline bool hal_rx_msdu_flow_idx_timeout_be(uint8_t *buf) 2023 { 2024 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2025 2026 return HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 2027 } 2028 2029 /** 2030 * hal_rx_msdu_fse_metadata_get_be() - API to get FSE metadata from 2031 * rx_msdu_end TLV 2032 * @buf: pointer to the start of RX PKT TLV headers 2033 * 2034 * Return: fse metadata value from MSDU END TLV 2035 */ 2036 static inline uint32_t hal_rx_msdu_fse_metadata_get_be(uint8_t *buf) 2037 { 2038 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2039 2040 return HAL_RX_TLV_FSE_METADATA_GET(pkt_tlvs); 2041 } 2042 2043 /** 2044 * hal_rx_msdu_cce_metadata_get_be() - API to get CCE metadata from 2045 * rx_msdu_end TLV 2046 * @buf: pointer to the start of RX PKT TLV headers 2047 * 2048 * Return: cce_metadata 2049 */ 2050 static inline uint16_t 2051 hal_rx_msdu_cce_metadata_get_be(uint8_t *buf) 2052 { 2053 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2054 2055 return HAL_RX_TLV_CCE_METADATA_GET(pkt_tlvs); 2056 } 2057 2058 /** 2059 * hal_rx_msdu_get_flow_params_be() - API to get flow index, flow 2060 * index invalid and flow index 2061 * timeout from rx_msdu_end TLV 2062 * @buf: pointer to the start of RX PKT TLV headers 2063 * @flow_invalid: pointer to return value of flow_idx_valid 2064 * @flow_timeout: pointer to return value of flow_idx_timeout 2065 * @flow_index: pointer to return value of flow_idx 2066 * 2067 * Return: none 2068 */ 2069 static inline void 2070 hal_rx_msdu_get_flow_params_be(uint8_t *buf, 2071 bool *flow_invalid, 2072 bool *flow_timeout, 2073 uint32_t *flow_index) 2074 { 2075 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2076 2077 *flow_invalid = HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 2078 *flow_timeout = HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 2079 *flow_index = HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 2080 } 2081 2082 /** 2083 * hal_rx_tlv_get_tcp_chksum_be() - API to get tcp checksum 2084 * @buf: rx_tlv_hdr 2085 * 2086 * Return: tcp checksum 2087 */ 2088 static inline uint16_t 2089 hal_rx_tlv_get_tcp_chksum_be(uint8_t *buf) 2090 { 2091 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2092 2093 return HAL_RX_TLV_GET_TCP_CHKSUM(rx_pkt_tlvs); 2094 } 2095 2096 /** 2097 * hal_rx_get_rx_sequence_be() - Function to retrieve rx sequence number 2098 * @buf: Network buffer 2099 * 2100 * Return: rx sequence number 2101 */ 2102 static inline 2103 uint16_t hal_rx_get_rx_sequence_be(uint8_t *buf) 2104 { 2105 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2106 2107 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 2108 } 2109 2110 #ifdef RECEIVE_OFFLOAD 2111 #ifdef QCA_WIFI_KIWI_V2 2112 static inline 2113 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf) 2114 { 2115 /* 2116 * cumulative l4 checksum is not supported in V2 and 2117 * cumulative_l4_checksum field is not present 2118 */ 2119 return 0; 2120 } 2121 #else 2122 /** 2123 * hal_rx_get_fisa_cumulative_l4_checksum_be() - Retrieve cumulative 2124 * checksum 2125 * @buf: buffer pointer 2126 * 2127 * Return: cumulative checksum 2128 */ 2129 static inline 2130 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf) 2131 { 2132 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2133 2134 return HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(rx_pkt_tlvs); 2135 } 2136 #endif 2137 2138 /** 2139 * hal_rx_get_fisa_cumulative_ip_length_be() - Retrieve cumulative 2140 * ip length 2141 * @buf: buffer pointer 2142 * 2143 * Return: cumulative length 2144 */ 2145 static inline 2146 uint16_t hal_rx_get_fisa_cumulative_ip_length_be(uint8_t *buf) 2147 { 2148 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2149 2150 return HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(rx_pkt_tlvs); 2151 } 2152 2153 /** 2154 * hal_rx_get_udp_proto_be() - Retrieve udp proto value 2155 * @buf: buffer 2156 * 2157 * Return: udp proto bit 2158 */ 2159 static inline 2160 bool hal_rx_get_udp_proto_be(uint8_t *buf) 2161 { 2162 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2163 2164 return HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 2165 } 2166 #endif 2167 2168 /** 2169 * hal_rx_get_flow_agg_continuation_be() - retrieve flow agg 2170 * continuation 2171 * @buf: buffer 2172 * 2173 * Return: flow agg 2174 */ 2175 static inline 2176 bool hal_rx_get_flow_agg_continuation_be(uint8_t *buf) 2177 { 2178 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2179 2180 return HAL_RX_TLV_GET_FLOW_AGGR_CONT(rx_pkt_tlvs); 2181 } 2182 2183 /** 2184 * hal_rx_get_flow_agg_count_be()- Retrieve flow agg count 2185 * @buf: buffer 2186 * 2187 * Return: flow agg count 2188 */ 2189 static inline 2190 uint8_t hal_rx_get_flow_agg_count_be(uint8_t *buf) 2191 { 2192 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2193 2194 return HAL_RX_TLV_GET_FLOW_AGGR_COUNT(rx_pkt_tlvs); 2195 } 2196 2197 /** 2198 * hal_rx_get_fisa_timeout_be() - Retrieve fisa timeout 2199 * @buf: buffer 2200 * 2201 * Return: fisa timeout 2202 */ 2203 static inline 2204 bool hal_rx_get_fisa_timeout_be(uint8_t *buf) 2205 { 2206 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2207 2208 return HAL_RX_TLV_GET_FISA_TIMEOUT(rx_pkt_tlvs); 2209 } 2210 2211 /** 2212 * hal_rx_mpdu_start_tlv_tag_valid_be () - API to check if RX_MPDU_START 2213 * tlv tag is valid 2214 * 2215 *@rx_tlv_hdr: start address of rx_pkt_tlvs 2216 * 2217 * Return: true if RX_MPDU_START is valid, else false. 2218 */ 2219 static inline uint8_t hal_rx_mpdu_start_tlv_tag_valid_be(void *rx_tlv_hdr) 2220 { 2221 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)rx_tlv_hdr; 2222 uint32_t tlv_tag; 2223 2224 tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(&rx_desc->mpdu_start_tlv); 2225 2226 return tlv_tag == WIFIRX_MPDU_START_E ? true : false; 2227 } 2228 2229 /** 2230 * hal_rx_msdu_end_offset_get_generic() - API to get the 2231 * msdu_end structure offset rx_pkt_tlv structure 2232 * 2233 * NOTE: API returns offset of msdu_end TLV from structure 2234 * rx_pkt_tlvs 2235 */ 2236 static inline uint32_t hal_rx_msdu_end_offset_get_generic(void) 2237 { 2238 return RX_PKT_TLV_OFFSET(msdu_end_tlv); 2239 } 2240 2241 /** 2242 * hal_rx_mpdu_start_offset_get_generic() - API to get the 2243 * mpdu_start structure offset rx_pkt_tlv structure 2244 * 2245 * NOTE: API returns offset of attn TLV from structure 2246 * rx_pkt_tlvs 2247 */ 2248 static inline uint32_t hal_rx_mpdu_start_offset_get_generic(void) 2249 { 2250 return RX_PKT_TLV_OFFSET(mpdu_start_tlv); 2251 } 2252 2253 #ifndef NO_RX_PKT_HDR_TLV 2254 static inline uint32_t hal_rx_pkt_tlv_offset_get_generic(void) 2255 { 2256 return RX_PKT_TLV_OFFSET(pkt_hdr_tlv); 2257 } 2258 #endif 2259 2260 #ifdef CONFIG_WORD_BASED_TLV 2261 #define MPDU_START_WMASK 0x074C 2262 #define MSDU_END_WMASK 0x13FC1 2263 2264 /** 2265 * hal_rx_mpdu_start_wmask_get_be() - API to get the mpdu_start_tlv word mask 2266 * 2267 * return: Word mask for MPDU start tlv 2268 */ 2269 static inline uint32_t hal_rx_mpdu_start_wmask_get_be(void) 2270 { 2271 return MPDU_START_WMASK; 2272 } 2273 2274 /** 2275 * hal_rx_msdu_end_wmask_get_be() - API to get the msdu_end_tlv word mask 2276 * 2277 * return: Word mask for MSDU end tlv 2278 */ 2279 static inline uint32_t hal_rx_msdu_end_wmask_get_be(void) 2280 { 2281 return MSDU_END_WMASK; 2282 } 2283 #endif 2284 2285 #ifdef RECEIVE_OFFLOAD 2286 static inline int 2287 hal_rx_tlv_get_offload_info_be(uint8_t *rx_tlv, 2288 struct hal_offload_info *offload_info) 2289 { 2290 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)rx_tlv; 2291 2292 offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_pkt_tlvs); 2293 offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_pkt_tlvs); 2294 offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 2295 offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs); 2296 2297 if (offload_info->tcp_proto) { 2298 offload_info->tcp_pure_ack = 2299 HAL_RX_TLV_GET_TCP_PURE_ACK(rx_pkt_tlvs); 2300 offload_info->tcp_offset = 2301 HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 2302 offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_pkt_tlvs); 2303 offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_pkt_tlvs); 2304 offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_pkt_tlvs); 2305 } 2306 return 0; 2307 } 2308 2309 static inline int hal_rx_get_proto_params_be(uint8_t *buf, void *proto_params) 2310 { 2311 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2312 struct hal_proto_params *param = 2313 (struct hal_proto_params *)proto_params; 2314 2315 param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs); 2316 param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 2317 param->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 2318 2319 return 0; 2320 } 2321 2322 static inline int hal_rx_get_l3_l4_offsets_be(uint8_t *buf, 2323 uint32_t *l3_hdr_offset, 2324 uint32_t *l4_hdr_offset) 2325 { 2326 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2327 2328 *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(rx_pkt_tlvs); 2329 *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 2330 2331 return 0; 2332 } 2333 #endif 2334 2335 /** 2336 * hal_rx_msdu_start_msdu_len_get_be() - API to get the MSDU length from 2337 * rx_msdu_start TLV 2338 * @buf: pointer to the start of RX PKT TLV headers 2339 * 2340 * Return: msdu length 2341 */ 2342 static inline uint32_t hal_rx_msdu_start_msdu_len_get_be(uint8_t *buf) 2343 { 2344 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2345 uint32_t msdu_len; 2346 2347 msdu_len = HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 2348 2349 return msdu_len; 2350 } 2351 2352 /** 2353 * hal_rx_get_frame_ctrl_field_be() - Function to retrieve frame control field 2354 * @buf: Network buffer 2355 * 2356 * Return: frame control field 2357 */ 2358 static inline uint16_t hal_rx_get_frame_ctrl_field_be(uint8_t *buf) 2359 { 2360 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2361 uint16_t frame_ctrl = 0; 2362 2363 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_pkt_tlvs); 2364 2365 return frame_ctrl; 2366 } 2367 2368 /** 2369 * hal_rx_tlv_get_is_decrypted_be() - API to get the decrypt status of 2370 * the packet from msdu_end 2371 * @buf: pointer to the start of RX PKT TLV header 2372 * 2373 * Return: uint32_t(decryt status) 2374 */ 2375 static inline uint32_t hal_rx_tlv_get_is_decrypted_be(uint8_t *buf) 2376 { 2377 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2378 uint32_t is_decrypt = 0; 2379 uint32_t decrypt_status; 2380 2381 decrypt_status = HAL_RX_TLV_DECRYPT_STATUS_GET(rx_pkt_tlvs); 2382 2383 if (!decrypt_status) 2384 is_decrypt = 1; 2385 2386 return is_decrypt; 2387 } 2388 2389 #ifdef NO_RX_PKT_HDR_TLV 2390 /** 2391 * hal_rx_pkt_hdr_get_be() - API to get 80211 header 2392 * @buf: start of rx_pkt_tlv 2393 * 2394 * If NO_RX_PKT_HDR_TLV is enabled, then this API assume caller gives a raw 2395 * data, get 80211 header from packet data directly. 2396 * If NO_RX_PKT_HDR_TLV is disabled, then get it from rx_pkt_hdr_tlv in 2397 * rx_pkt_tlvs. 2398 * 2399 * Return: pointer to start of 80211 header 2400 */ 2401 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf) 2402 { 2403 return buf + RX_PKT_TLVS_LEN; 2404 } 2405 #else 2406 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf) 2407 { 2408 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2409 2410 return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr; 2411 } 2412 #endif 2413 2414 /** 2415 * hal_rx_tlv_csum_err_get_be() - Get IP and tcp-udp checksum fail flag 2416 * @rx_tlv_hdr: start address of rx_tlv_hdr 2417 * @ip_csum_err: buffer to return ip_csum_fail flag 2418 * @tcp_udp_csum_err: placeholder to return tcp-udp checksum fail flag 2419 * 2420 * Return: None 2421 */ 2422 static inline void 2423 hal_rx_tlv_csum_err_get_be(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err, 2424 uint32_t *tcp_udp_csum_err) 2425 { 2426 struct rx_pkt_tlvs *rx_pkt_tlvs = 2427 (struct rx_pkt_tlvs *)rx_tlv_hdr; 2428 2429 *ip_csum_err = HAL_RX_TLV_IP_CSUM_FAIL_GET(rx_pkt_tlvs); 2430 *tcp_udp_csum_err = HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(rx_pkt_tlvs); 2431 } 2432 2433 static inline 2434 uint32_t hal_rx_tlv_mpdu_len_err_get_be(void *hw_desc_addr) 2435 { 2436 struct rx_pkt_tlvs *rx_pkt_tlvs = 2437 (struct rx_pkt_tlvs *)hw_desc_addr; 2438 2439 return HAL_RX_TLV_MPDU_LEN_ERR_GET(rx_pkt_tlvs); 2440 } 2441 2442 static inline 2443 uint32_t hal_rx_tlv_mpdu_fcs_err_get_be(void *hw_desc_addr) 2444 { 2445 struct rx_pkt_tlvs *rx_pkt_tlvs = 2446 (struct rx_pkt_tlvs *)hw_desc_addr; 2447 2448 return HAL_RX_TLV_MPDU_FCS_ERR_GET(rx_pkt_tlvs); 2449 } 2450 2451 /** 2452 * hal_rx_get_rx_more_frag_bit() - Function to retrieve more fragment bit 2453 * @buf: Network buffer 2454 * 2455 * Return: rx more fragment bit 2456 */ 2457 static inline 2458 uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf) 2459 { 2460 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2461 uint16_t frame_ctrl = 0; 2462 2463 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(pkt_tlvs) >> 2464 DOT11_FC1_MORE_FRAG_OFFSET; 2465 2466 /* more fragment bit if at offset bit 4 */ 2467 return frame_ctrl; 2468 } 2469 2470 /** 2471 * hal_rx_msdu_is_wlan_mcast_generic_be() - Check if the buffer is for 2472 * multicast address 2473 * @nbuf: Network buffer 2474 * 2475 * Return: flag to indicate whether the nbuf has MC/BC address 2476 */ 2477 static inline uint32_t hal_rx_msdu_is_wlan_mcast_generic_be(qdf_nbuf_t nbuf) 2478 { 2479 uint8_t *buf = qdf_nbuf_data(nbuf); 2480 2481 return HAL_RX_TLV_IS_MCAST_GET(buf);; 2482 } 2483 2484 /** 2485 * hal_rx_msdu_start_msdu_len_set_be() - API to set the MSDU length 2486 * from rx_msdu_start TLV 2487 * @buf: pointer to the start of RX PKT TLV headers 2488 * @len: msdu length 2489 * 2490 * Return: none 2491 */ 2492 static inline void 2493 hal_rx_msdu_start_msdu_len_set_be(uint8_t *buf, uint32_t len) 2494 { 2495 HAL_RX_TLV_MSDU_LEN_GET(buf) = len; 2496 } 2497 2498 /** 2499 * hal_rx_mpdu_start_mpdu_qos_control_valid_get_be() - 2500 * Retrieve qos control valid bit from the tlv. 2501 * @buf: pointer to rx pkt TLV. 2502 * 2503 * Return: qos control value. 2504 */ 2505 static inline uint32_t 2506 hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(uint8_t *buf) 2507 { 2508 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2509 2510 return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(pkt_tlvs); 2511 } 2512 2513 /** 2514 * hal_rx_msdu_end_sa_sw_peer_id_get_be() - API to get the 2515 * sa_sw_peer_id from rx_msdu_end TLV 2516 * @buf: pointer to the start of RX PKT TLV headers 2517 * 2518 * Return: sa_sw_peer_id index 2519 */ 2520 static inline uint32_t 2521 hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t *buf) 2522 { 2523 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 2524 2525 hal_rx_msdu_end_t *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; 2526 2527 return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end); 2528 } 2529 #endif /* _HAL_BE_RX_TLV_H_ */ 2530