1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _HAL_BE_RX_TLV_H_ 20 #define _HAL_BE_RX_TLV_H_ 21 22 #include "hal_api_mon.h" 23 24 /* 25 * Structures & Macros to obtain fields from the TLV's in the Rx packet 26 * pre-header. 27 */ 28 29 #define HAL_RX_BE_PKT_HDR_TLV_LEN 112 30 31 #ifndef CONFIG_WORD_BASED_TLV 32 typedef struct rx_mpdu_start hal_rx_mpdu_start_t; 33 typedef struct rx_msdu_end hal_rx_msdu_end_t; 34 #endif 35 36 /* 37 * Each RX descriptor TLV is preceded by 1 QWORD "tag" 38 */ 39 40 struct rx_mpdu_start_tlv { 41 uint64_t tag; 42 hal_rx_mpdu_start_t rx_mpdu_start; 43 }; 44 45 struct rx_msdu_end_tlv { 46 uint64_t tag; 47 hal_rx_msdu_end_t rx_msdu_end; 48 }; 49 50 struct rx_pkt_hdr_tlv { 51 uint64_t tag; /* 8 B */ 52 uint64_t phy_ppdu_id; /* 8 B */ 53 char rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; /* 112 B */ 54 }; 55 56 #define RX_BE_PADDING0_BYTES 8 57 #define RX_BE_PADDING1_BYTES 8 58 59 struct rx_pkt_tlvs { 60 struct rx_msdu_end_tlv msdu_end_tlv; /* 120 bytes */ 61 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */ 62 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */ 63 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ 64 }; 65 66 #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs) 67 68 #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV 69 70 #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field) 71 72 #ifndef CONFIG_WORD_BASED_TLV 73 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 74 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 75 76 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 77 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 78 rx_mpdu_start.rx_mpdu_info_details) 79 80 #else /* CONFIG_WORD_BASED_TLV */ 81 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \ 82 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end) 83 84 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \ 85 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \ 86 rx_mpdu_start) 87 #endif /* CONFIG_WORD_BASED_TLV */ 88 89 #define HAL_RX_TLV_MSDU_DONE_GET(_rx_pkt_tlv) \ 90 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_done 91 92 #define HAL_RX_TLV_DECAP_FORMAT_GET(_rx_pkt_tlv) \ 93 HAL_RX_MSDU_END(_rx_pkt_tlv).decap_format 94 95 #ifdef RECEIVE_OFFLOAD 96 #define HAL_RX_TLV_GET_TCP_PURE_ACK(_rx_pkt_tlv) \ 97 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_only_ack 98 99 #define HAL_RX_TLV_GET_TCP_PROTO(_rx_pkt_tlv) \ 100 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_proto 101 102 #define HAL_RX_TLV_GET_UDP_PROTO(_rx_pkt_tlv) \ 103 HAL_RX_MSDU_END(_rx_pkt_tlv).udp_proto 104 105 #define HAL_RX_TLV_GET_IPV6(_rx_pkt_tlv) \ 106 HAL_RX_MSDU_END(_rx_pkt_tlv).ipv6_proto 107 108 #define HAL_RX_TLV_GET_IP_OFFSET(_rx_pkt_tlv) \ 109 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_offset 110 111 #define HAL_RX_TLV_GET_TCP_OFFSET(_rx_pkt_tlv) \ 112 HAL_RX_MSDU_END(_rx_pkt_tlv).l4_offset 113 #endif /* RECEIVE_OFFLOAD */ 114 115 #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(_rx_pkt_tlv) \ 116 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 117 118 #define HAL_RX_TLV_MSDU_LEN_GET(_rx_pkt_tlv) \ 119 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_length 120 121 #define HAL_RX_TLV_CCE_MATCH_GET(_rx_pkt_tlv) \ 122 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_match 123 124 #define HAL_RX_TLV_PHY_PPDU_ID_GET(_rx_pkt_tlv) \ 125 HAL_RX_MSDU_END(_rx_pkt_tlv).phy_ppdu_id 126 127 #define HAL_RX_TLV_BW_GET(_rx_pkt_tlv) \ 128 HAL_RX_MSDU_END(_rx_pkt_tlv).receive_bandwidth 129 130 #define HAL_RX_TLV_FLOWID_TOEPLITZ_GET(_rx_pkt_tlv) \ 131 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz 132 133 #define HAL_RX_TLV_SGI_GET(_rx_pkt_tlv) \ 134 HAL_RX_MSDU_END(_rx_pkt_tlv).sgi 135 136 #define HAL_RX_TLV_RATE_MCS_GET(_rx_pkt_tlv) \ 137 HAL_RX_MSDU_END(_rx_pkt_tlv).rate_mcs 138 139 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 140 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 141 142 #define HAL_RX_TLV_RSSI_GET(_rx_pkt_tlv) \ 143 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 144 145 #define HAL_RX_TLV_FREQ_GET(_rx_pkt_tlv) \ 146 HAL_RX_MSDU_END(_rx_pkt_tlv).sw_phy_meta_data 147 148 #define HAL_RX_TLV_PKT_TYPE_GET(_rx_pkt_tlv) \ 149 HAL_RX_MSDU_END(_rx_pkt_tlv).pkt_type 150 151 #define HAL_RX_TLV_DECRYPT_ERR_GET(_rx_pkt_tlv) \ 152 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_err 153 154 #define HAL_RX_TLV_MIC_ERR_GET(_rx_pkt_tlv) \ 155 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err 156 157 #define HAL_RX_TLV_MIMO_SS_BITMAP(_rx_pkt_tlv)\ 158 HAL_RX_MSDU_END(_rx_pkt_tlv).mimo_ss_bitmap 159 160 #define HAL_RX_TLV_ANT_SIGNAL_DB_GET(_rx_pkt_tlv) \ 161 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi 162 163 #define HAL_RX_TLV_STBC_GET(_rx_pkt_tlv) \ 164 HAL_RX_MSDU_END(_rx_pkt_tlv).stbc 165 166 #define HAL_RX_TLV_RECEPTION_TYPE_GET(_rx_pkt_tlv) \ 167 HAL_RX_MSDU_END(_rx_pkt_tlv).reception_type 168 169 #define HAL_RX_TLV_IP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 170 HAL_RX_MSDU_END(_rx_pkt_tlv).ip_chksum_fail 171 172 #define HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(_rx_pkt_tlv) \ 173 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum_fail 174 175 #define HAL_RX_TLV_MPDU_LEN_ERR_GET(_rx_pkt_tlv) \ 176 HAL_RX_MSDU_END(_rx_pkt_tlv).mpdu_length_err 177 178 #define HAL_RX_TLV_MPDU_FCS_ERR_GET(_rx_pkt_tlv) \ 179 HAL_RX_MSDU_END(_rx_pkt_tlv).fcs_err 180 181 #define HAL_RX_TLV_IS_MCAST_GET(_rx_pkt_tlv) \ 182 HAL_RX_MSDU_END(_rx_pkt_tlv).mcast_bcast 183 184 #ifndef CONFIG_WORD_BASED_TLV 185 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 186 HAL_RX_MPDU_START(_rx_pkt_tlv).first_mpdu 187 #else 188 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \ 189 HAL_RX_MSDU_END(_rx_pkt_tlv).first_mpdu 190 #endif 191 192 #ifdef RECEIVE_OFFLOAD 193 /** 194 * LRO information needed from the TLVs 195 */ 196 #define HAL_RX_TLV_GET_LRO_ELIGIBLE(_rx_pkt_tlv) \ 197 HAL_RX_MSDU_END(_rx_pkt_tlv).lro_eligible 198 199 #define HAL_RX_TLV_GET_TCP_ACK(_rx_pkt_tlv) \ 200 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_ack_number 201 202 #define HAL_RX_TLV_GET_TCP_SEQ(_rx_pkt_tlv) \ 203 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_seq_number 204 205 #define HAL_RX_TLV_GET_TCP_WIN(_rx_pkt_tlv) \ 206 HAL_RX_MSDU_END(_rx_pkt_tlv).window_size 207 #endif 208 209 #define HAL_RX_GET_FILTER_CATEGORY(_rx_pkt_tlv) \ 210 HAL_RX_MPDU_START(_rx_pkt_tlv).rxpcu_mpdu_filter_in_category 211 212 #define HAL_RX_GET_PPDU_ID(_rx_pkt_tlv) \ 213 HAL_RX_MPDU_START(_rx_pkt_tlv).phy_ppdu_id 214 215 #define HAL_RX_TLV_PEER_META_DATA_GET(_rx_pkt_tlv) \ 216 HAL_RX_MPDU_START(_rx_pkt_tlv).peer_meta_data 217 218 #define HAL_RX_TLV_AMPDU_FLAG_GET(_rx_pkt_tlv) \ 219 HAL_RX_MPDU_START(_rx_pkt_tlv).ampdu_flag 220 221 #define HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(_rx_pkt_tlv) \ 222 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_frame_group_id 223 224 #define HAL_RX_TLV_KEYID_OCTET_GET(_rx_pkt_tlv) \ 225 HAL_RX_MSDU_END(_rx_pkt_tlv).key_id_octet 226 227 #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(_rx_pkt_tlv) \ 228 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_number 229 230 #define HAL_RX_TLV_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 231 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 232 233 #define HAL_RX_TLV_L3_HEADER_PADDING_GET(_rx_pkt_tlv) \ 234 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_header_padding 235 236 #define HAL_RX_TLV_SA_IDX_GET(_rx_pkt_tlv) \ 237 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_idx 238 239 #define HAL_RX_TLV_DA_IDX_GET(_rx_pkt_tlv) \ 240 HAL_RX_MSDU_END(_rx_pkt_tlv).da_idx_or_sw_peer_id 241 242 #define HAL_RX_TLV_FIRST_MSDU_GET(_rx_pkt_tlv) \ 243 HAL_RX_MSDU_END(_rx_pkt_tlv).first_msdu 244 245 #define HAL_RX_TLV_LAST_MSDU_GET(_rx_pkt_tlv) \ 246 HAL_RX_MSDU_END(_rx_pkt_tlv).last_msdu 247 248 /* 249 * Get tid from RX_MPDU_START 250 */ 251 #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \ 252 HAL_RX_MPDU_START(_rx_pkt_tlv).tid 253 254 #define HAL_RX_TLV_DA_IS_MCBC_GET(_rx_pkt_tlv) \ 255 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_mcbc 256 257 #define HAL_RX_TLV_SA_IS_VALID_GET(_rx_pkt_tlv) \ 258 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_is_valid 259 260 #define HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(_rx_pkt_tlv) \ 261 HAL_RX_MPDU_START(_rx_pkt_tlv).frame_encryption_info_valid 262 263 #define HAL_RX_TLV_MPDU_PN_31_0_GET(_rx_pkt_tlv) \ 264 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_31_0 265 266 #define HAL_RX_TLV_MPDU_PN_63_32_GET(_rx_pkt_tlv) \ 267 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_63_32 268 269 #define HAL_RX_TLV_MPDU_PN_95_64_GET(_rx_pkt_tlv) \ 270 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_95_64 271 272 #define HAL_RX_TLV_MPDU_PN_127_96_GET(_rx_pkt_tlv) \ 273 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_127_96 274 275 #define HAL_RX_TLV_DA_IS_VALID_GET(_rx_pkt_tlv) \ 276 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_valid 277 278 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_pkt_tlv) \ 279 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_valid 280 281 #define HAL_RX_TLV_SW_PEER_ID_GET(_rx_pkt_tlv) \ 282 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_peer_id 283 284 #define HAL_RX_TLV_MPDU_GET_TODS(_rx_pkt_tlv) \ 285 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 286 287 #define HAL_RX_TLV_MPDU_GET_FROMDS(_rx_pkt_tlv) \ 288 HAL_RX_MPDU_START(_rx_pkt_tlv).fr_ds 289 290 #define HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(_rx_pkt_tlv) \ 291 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 292 293 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_pkt_tlv) \ 294 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_valid 295 296 #define HAL_RX_TLV_MPDU_AD1_31_0_GET(_rx_pkt_tlv) \ 297 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_31_0 298 299 #define HAL_RX_TLV_MPDU_AD1_47_32_GET(_rx_pkt_tlv) \ 300 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_47_32 301 302 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_pkt_tlv) \ 303 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_valid 304 305 #define HAL_RX_TLV_MPDU_AD2_15_0_GET(_rx_pkt_tlv) \ 306 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_15_0 307 308 #define HAL_RX_TLV_MPDU_AD2_47_16_GET(_rx_pkt_tlv) \ 309 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_47_16 310 311 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_pkt_tlv) \ 312 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_valid 313 314 #define HAL_RX_TLV_MPDU_AD3_31_0_GET(_rx_pkt_tlv) \ 315 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_31_0 316 317 #define HAL_RX_TLV_MPDU_AD3_47_32_GET(_rx_pkt_tlv) \ 318 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_47_32 319 320 #define HAL_RX_TLV_MPDU_AD4_31_0_GET(_rx_pkt_tlv) \ 321 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_31_0 322 323 #define HAL_RX_TLV_MPDU_AD4_47_32_GET(_rx_pkt_tlv) \ 324 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_47_32 325 326 #define HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_pkt_tlv) \ 327 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_control_valid 328 329 #define HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 330 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 331 332 #define HAL_RX_GET_FC_VALID(_rx_pkt_tlv) \ 333 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid 334 335 #define HAL_RX_GET_TO_DS_FLAG(_rx_pkt_tlv) \ 336 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds 337 338 #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_pkt_tlv) \ 339 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_field 340 341 #define HAL_RX_TLV_FLOW_IDX_GET(_rx_pkt_tlv) \ 342 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx 343 344 #define HAL_RX_TLV_REO_DEST_IND_GET(_rx_pkt_tlv) \ 345 HAL_RX_MSDU_END(_rx_pkt_tlv).reo_destination_indication 346 347 #define HAL_RX_TLV_FLOW_IDX_INVALID_GET(_rx_pkt_tlv) \ 348 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_invalid 349 350 #define HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(_rx_pkt_tlv) \ 351 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_timeout 352 353 #define HAL_RX_TLV_FSE_METADATA_GET(_rx_pkt_tlv) \ 354 HAL_RX_MSDU_END(_rx_pkt_tlv).fse_metadata 355 356 #define HAL_RX_TLV_CCE_METADATA_GET(_rx_pkt_tlv) \ 357 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_metadata 358 359 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \ 360 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code 361 362 #define HAL_RX_TLV_GET_TCP_CHKSUM(_rx_pkt_tlv) \ 363 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum 364 365 #define HAL_RX_TLV_GET_FLOW_AGGR_CONT(_rx_pkt_tlv) \ 366 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_aggregation_continuation 367 368 #define HAL_RX_TLV_GET_FLOW_AGGR_COUNT(_rx_pkt_tlv) \ 369 HAL_RX_MSDU_END(_rx_pkt_tlv).aggregation_count 370 371 #define HAL_RX_TLV_GET_FISA_TIMEOUT(_rx_pkt_tlv) \ 372 HAL_RX_MSDU_END(_rx_pkt_tlv).fisa_timeout 373 374 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(_rx_pkt_tlv) \ 375 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_l4_checksum 376 377 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(_rx_pkt_tlv) \ 378 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_ip_length 379 380 #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \ 381 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid 382 383 #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \ 384 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id 385 386 static inline 387 uint32_t hal_rx_tlv_decap_format_get_be(void *hw_desc_addr) 388 { 389 struct rx_pkt_tlvs *rx_pkt_tlvs = 390 (struct rx_pkt_tlvs *)hw_desc_addr; 391 392 return HAL_RX_TLV_DECAP_FORMAT_GET(rx_pkt_tlvs); 393 } 394 395 static inline uint32_t hal_rx_tlv_msdu_done_get_be(uint8_t *buf) 396 { 397 return HAL_RX_TLV_MSDU_DONE_GET(buf); 398 } 399 400 /* 401 * hal_rx_attn_first_mpdu_get(): get fist_mpdu bit from rx attention 402 * @buf: pointer to rx_pkt_tlvs 403 * 404 * return: uint32_t(first_msdu) 405 */ 406 static inline uint32_t hal_rx_tlv_first_mpdu_get_be(uint8_t *buf) 407 { 408 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 409 410 return HAL_RX_TLV_FIRST_MPDU_GET(rx_pkt_tlvs); 411 } 412 413 /* 414 * hal_rx_msdu_cce_match_get(): get CCE match bit 415 * from rx attention 416 * @buf: pointer to rx_pkt_tlvs 417 * Return: CCE match value 418 */ 419 static inline bool hal_rx_msdu_cce_match_get_be(uint8_t *buf) 420 { 421 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 422 423 return HAL_RX_TLV_CCE_MATCH_GET(rx_pkt_tlvs); 424 } 425 426 /* 427 * hal_rx_attn_phy_ppdu_id_get(): get phy_ppdu_id value 428 * from rx attention 429 * @buf: pointer to rx_pkt_tlvs 430 * 431 * Return: phy_ppdu_id 432 */ 433 static inline uint16_t hal_rx_attn_phy_ppdu_id_get_be(uint8_t *buf) 434 { 435 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 436 uint16_t phy_ppdu_id; 437 438 phy_ppdu_id = HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 439 440 return phy_ppdu_id; 441 } 442 443 /* 444 * hal_rx_tlv_phy_ppdu_id_get(): get phy_ppdu_id value 445 * from rx attention 446 * @buf: pointer to rx_pkt_tlvs 447 * 448 * Return: phy_ppdu_id 449 */ 450 static inline uint16_t hal_rx_tlv_phy_ppdu_id_get_be(uint8_t *buf) 451 { 452 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 453 454 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 455 } 456 457 /* 458 * hal_rx_mpdu_peer_meta_data_set: set peer meta data in RX mpdu start tlv 459 * 460 * @buf: rx_tlv_hdr of the received packet 461 * @peer_mdata: peer meta data to be set. 462 * Return: void 463 */ 464 static inline void 465 hal_rx_mpdu_peer_meta_data_set_be(uint8_t *buf, uint32_t peer_mdata) 466 { 467 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 468 469 HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs) = peer_mdata; 470 } 471 472 /* 473 * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START 474 */ 475 476 static inline uint32_t hal_rx_mpdu_peer_meta_data_get_be(uint8_t *buf) 477 { 478 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 479 480 return HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs); 481 } 482 483 /** 484 * hal_rx_mpdu_info_ampdu_flag_get_be(): get ampdu flag bit 485 * from rx mpdu info 486 * @buf: pointer to rx_pkt_tlvs 487 * 488 * Return: ampdu flag 489 */ 490 static inline bool hal_rx_mpdu_info_ampdu_flag_get_be(uint8_t *buf) 491 { 492 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 493 494 return !!HAL_RX_TLV_AMPDU_FLAG_GET(rx_pkt_tlvs); 495 } 496 497 /** 498 * hal_rx_tlv_msdu_len_get(): API to get the MSDU length 499 * from rx_msdu_start TLV 500 * 501 * @ buf: pointer to the start of RX PKT TLV headers 502 * Return: msdu length 503 */ 504 static inline uint32_t hal_rx_tlv_msdu_len_get_be(uint8_t *buf) 505 { 506 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 507 508 return HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 509 } 510 511 /** 512 * hal_rx_tlv_msdu_len_set(): API to set the MSDU length 513 * from rx_msdu_start TLV 514 * 515 * @buf: pointer to the start of RX PKT TLV headers 516 * @len: msdu length 517 * 518 * Return: none 519 */ 520 static inline void hal_rx_tlv_msdu_len_set_be(uint8_t *buf, uint32_t len) 521 { 522 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 523 524 HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs) = len; 525 } 526 527 /* 528 * hal_rx_tlv_bw_get(): API to get the Bandwidth 529 * Interval from rx_msdu_start 530 * 531 * @buf: pointer to the start of RX PKT TLV header 532 * Return: uint32_t(bw) 533 */ 534 static inline uint32_t hal_rx_tlv_bw_get_be(uint8_t *buf) 535 { 536 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 537 538 return HAL_RX_TLV_BW_GET(rx_pkt_tlvs); 539 } 540 541 /** 542 * hal_rx_tlv_toeplitz_get: API to get the toeplitz hash 543 * from rx_msdu_start TLV 544 * 545 * @ buf: pointer to the start of RX PKT TLV headers 546 * Return: toeplitz hash 547 */ 548 static inline uint32_t hal_rx_tlv_toeplitz_get_be(uint8_t *buf) 549 { 550 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 551 552 return HAL_RX_TLV_FLOWID_TOEPLITZ_GET(rx_pkt_tlvs); 553 } 554 555 /** 556 * hal_rx_tlv_msdu_sgi_get(): API to get the Short Gaurd 557 * Interval from rx_msdu_start TLV 558 * 559 * @buf: pointer to the start of RX PKT TLV headers 560 * Return: uint32_t(sgi) 561 */ 562 static inline uint32_t hal_rx_tlv_sgi_get_be(uint8_t *buf) 563 { 564 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 565 566 return HAL_RX_TLV_SGI_GET(rx_pkt_tlvs); 567 } 568 569 /** 570 * hal_rx_tlv_msdu_rate_mcs_get(): API to get the MCS rate 571 * from rx_msdu_start TLV 572 * 573 * @buf: pointer to the start of RX PKT TLV headers 574 * Return: uint32_t(rate_mcs) 575 */ 576 static inline uint32_t hal_rx_tlv_rate_mcs_get_be(uint8_t *buf) 577 { 578 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 579 uint32_t rate_mcs; 580 581 rate_mcs = HAL_RX_TLV_RATE_MCS_GET(rx_pkt_tlvs); 582 583 return rate_mcs; 584 } 585 586 /* 587 * Get key index from RX_MSDU_END 588 */ 589 /* 590 * hal_rx_msdu_get_keyid(): API to get the key id if the decrypted packet 591 * from rx_msdu_end 592 * 593 * @buf: pointer to the start of RX PKT TLV header 594 * Return: uint32_t(key id) 595 */ 596 597 static inline uint8_t hal_rx_msdu_get_keyid_be(uint8_t *buf) 598 { 599 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 600 uint32_t keyid_octet; 601 602 keyid_octet = HAL_RX_TLV_KEYID_OCTET_GET(rx_pkt_tlvs); 603 604 return keyid_octet & 0x3; 605 } 606 607 /* 608 * hal_rx_tlv_get_rssi(): API to get the rssi of received pkt 609 * from rx_msdu_start 610 * 611 * @buf: pointer to the start of RX PKT TLV header 612 * Return: uint32_t(rssi) 613 */ 614 615 static inline uint32_t hal_rx_tlv_get_rssi_be(uint8_t *buf) 616 { 617 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 618 uint32_t rssi; 619 620 rssi = HAL_RX_TLV_RSSI_GET(rx_pkt_tlvs); 621 622 return rssi; 623 } 624 625 /* 626 * hal_rx_tlv_get_freq(): API to get the frequency of operating channel 627 * from rx_msdu_start 628 * 629 * @buf: pointer to the start of RX PKT TLV header 630 * Return: uint32_t(frequency) 631 */ 632 633 static inline uint32_t hal_rx_tlv_get_freq_be(uint8_t *buf) 634 { 635 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 636 uint32_t freq; 637 638 freq = HAL_RX_TLV_FREQ_GET(rx_pkt_tlvs); 639 640 return freq; 641 } 642 643 644 /* 645 * hal_rx_tlv_get_pkt_type(): API to get the pkt type 646 * from rx_msdu_start 647 * 648 * @buf: pointer to the start of RX PKT TLV header 649 * Return: uint32_t(pkt type) 650 */ 651 652 static inline uint32_t hal_rx_tlv_get_pkt_type_be(uint8_t *buf) 653 { 654 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 655 uint32_t pkt_type; 656 657 pkt_type = HAL_RX_TLV_PKT_TYPE_GET(rx_pkt_tlvs); 658 659 return pkt_type; 660 } 661 662 /******************************************************************************* 663 * RX ERROR APIS 664 ******************************************************************************/ 665 666 /** 667 * hal_rx_tlv_decrypt_err_get(): API to get the Decrypt ERR 668 * from rx_mpdu_end TLV 669 * 670 * @buf: pointer to the start of RX PKT TLV headers 671 * Return: uint32_t(decrypt_err) 672 */ 673 static inline uint32_t hal_rx_tlv_decrypt_err_get_be(uint8_t *buf) 674 { 675 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 676 uint32_t decrypt_err; 677 678 decrypt_err = HAL_RX_TLV_DECRYPT_ERR_GET(rx_pkt_tlvs); 679 680 return decrypt_err; 681 } 682 683 /** 684 * hal_rx_tlv_mic_err_get(): API to get the MIC ERR 685 * from rx_tlv TLV 686 * 687 * @buf: pointer to the start of RX PKT TLV headers 688 * Return: uint32_t(mic_err) 689 */ 690 static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf) 691 { 692 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 693 uint32_t mic_err; 694 695 mic_err = HAL_RX_TLV_MIC_ERR_GET(rx_pkt_tlvs); 696 697 return mic_err; 698 } 699 700 /** 701 * hal_rx_mpdu_sequence_number_get() - Get mpdu sequence number 702 * @buf: pointer to packet buffer 703 * 704 * Return: mpdu sequence 705 */ 706 static inline int hal_rx_mpdu_sequence_number_get_be(uint8_t *buf) 707 { 708 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 709 710 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 711 } 712 713 /** 714 * hal_rx_msdu_packet_metadata_get(): API to get the 715 * msdu information from rx_msdu_end TLV 716 * 717 * @ buf: pointer to the start of RX PKT TLV headers 718 * @ hal_rx_msdu_metadata: pointer to the msdu info structure 719 */ 720 static inline void 721 hal_rx_msdu_packet_metadata_get_generic_be(uint8_t *buf, 722 void *pkt_msdu_metadata) 723 { 724 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 725 struct hal_rx_msdu_metadata *msdu_metadata = 726 (struct hal_rx_msdu_metadata *)pkt_msdu_metadata; 727 728 msdu_metadata->l3_hdr_pad = 729 HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 730 msdu_metadata->sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 731 msdu_metadata->da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 732 msdu_metadata->sa_sw_peer_id = 733 HAL_RX_TLV_SA_SW_PEER_ID_GET(rx_pkt_tlvs); 734 } 735 736 /* 737 * hal_rx_msdu_start_nss_get_7850(): API to get the NSS 738 * Interval from rx_msdu_start 739 * 740 * @buf: pointer to the start of RX PKT TLV header 741 * Return: uint32_t(nss) 742 */ 743 static inline uint32_t hal_rx_tlv_nss_get_be(uint8_t *buf) 744 { 745 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 746 uint8_t mimo_ss_bitmap; 747 748 mimo_ss_bitmap = HAL_RX_TLV_MIMO_SS_BITMAP(rx_pkt_tlvs); 749 750 return qdf_get_hweight8(mimo_ss_bitmap); 751 } 752 753 #ifdef GET_MSDU_AGGREGATION 754 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)\ 755 {\ 756 bool first_msdu, last_msdu; \ 757 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_desc);\ 758 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_desc);\ 759 if (first_msdu && last_msdu)\ 760 rs->rs_flags &= (~IEEE80211_AMSDU_FLAG);\ 761 else\ 762 rs->rs_flags |= (IEEE80211_AMSDU_FLAG); \ 763 } \ 764 765 #define HAL_RX_SET_MSDU_AGGREGATION((rs_mpdu), (rs_ppdu))\ 766 {\ 767 if (rs_mpdu->rs_flags & IEEE80211_AMSDU_FLAG)\ 768 rs_ppdu->rs_flags |= IEEE80211_AMSDU_FLAG;\ 769 } \ 770 771 #else 772 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs) 773 #define HAL_RX_SET_MSDU_AGGREGATION(rs_mpdu, rs_ppdu) 774 #endif 775 776 /** 777 * hal_rx_mon_hw_desc_get_mpdu_status_be(): Retrieve MPDU status 778 * 779 * @ hw_desc_addr: Start address of Rx HW TLVs 780 * @ rs: Status for monitor mode 781 * 782 * Return: void 783 */ 784 static inline void 785 hal_rx_mon_hw_desc_get_mpdu_status_be(void *hw_desc_addr, 786 struct mon_rx_status *rs) 787 { 788 uint32_t reg_value; 789 struct rx_pkt_tlvs *rx_desc = 790 (struct rx_pkt_tlvs *)hw_desc_addr; 791 const uint32_t sgi_hw_to_cdp[] = { 792 CDP_SGI_0_8_US, 793 CDP_SGI_0_4_US, 794 CDP_SGI_1_6_US, 795 CDP_SGI_3_2_US, 796 }; 797 798 HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs); 799 800 rs->ant_signal_db = HAL_RX_TLV_ANT_SIGNAL_DB_GET(rx_desc); 801 rs->is_stbc = HAL_RX_TLV_STBC_GET(rx_desc); 802 803 reg_value = HAL_RX_TLV_SGI_GET(rx_desc); 804 rs->sgi = sgi_hw_to_cdp[reg_value]; 805 806 reg_value = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_desc); 807 rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0; 808 /* TODO: rs->beamformed should be set for SU beamforming also */ 809 } 810 811 static inline uint32_t hal_rx_tlv_tid_get_be(uint8_t *buf) 812 { 813 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 814 uint32_t tid; 815 816 tid = HAL_RX_TLV_TID_GET(rx_pkt_tlvs); 817 818 return tid; 819 } 820 821 /* 822 * hal_rx_tlv_reception_type_get(): API to get the reception type 823 * Interval from rx_msdu_start 824 * 825 * @buf: pointer to the start of RX PKT TLV header 826 * Return: uint32_t(reception_type) 827 */ 828 static inline 829 uint32_t hal_rx_tlv_reception_type_get_be(uint8_t *buf) 830 { 831 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 832 uint32_t reception_type; 833 834 reception_type = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_pkt_tlvs); 835 836 return reception_type; 837 } 838 839 /** 840 * hal_rx_msdu_end_da_idx_get_be: API to get da_idx 841 * from rx_msdu_end TLV 842 * 843 * @ buf: pointer to the start of RX PKT TLV headers 844 * Return: da index 845 */ 846 static inline uint16_t hal_rx_msdu_end_da_idx_get_be(uint8_t *buf) 847 { 848 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 849 uint16_t da_idx; 850 851 da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs); 852 853 return da_idx; 854 } 855 856 /** 857 * hal_rx_get_rx_fragment_number_be(): Function to retrieve rx fragment number 858 * 859 * @nbuf: Network buffer 860 * Returns: rx fragment number 861 */ 862 static inline 863 uint8_t hal_rx_get_rx_fragment_number_be(uint8_t *buf) 864 { 865 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 866 867 /* Return first 4 bits as fragment number */ 868 return (HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs) & 869 DOT11_SEQ_FRAG_MASK); 870 } 871 872 /** 873 * hal_rx_msdu_end_da_is_mcbc_get_be(): API to check if pkt is MCBC 874 * from rx_msdu_end TLV 875 * 876 * @ buf: pointer to the start of RX PKT TLV headers 877 * Return: da_is_mcbc 878 */ 879 static inline uint8_t 880 hal_rx_tlv_da_is_mcbc_get_be(uint8_t *buf) 881 { 882 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 883 884 return HAL_RX_TLV_DA_IS_MCBC_GET(rx_pkt_tlvs); 885 } 886 887 /** 888 * hal_rx_tlvd_sa_is_valid_get_be(): API to get the sa_is_valid bit from 889 * rx_msdu_end TLV 890 * 891 * @ buf: pointer to the start of RX PKT TLV headers 892 * Return: sa_is_valid bit 893 */ 894 static inline uint8_t 895 hal_rx_tlv_sa_is_valid_get_be(uint8_t *buf) 896 { 897 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 898 uint8_t sa_is_valid; 899 900 sa_is_valid = HAL_RX_TLV_SA_IS_VALID_GET(rx_pkt_tlvs); 901 902 return sa_is_valid; 903 } 904 905 /** 906 * hal_rx_tlv_sa_idx_get_be(): API to get the sa_idx from rx_msdu_end TLV 907 * 908 * @ buf: pointer to the start of RX PKT TLV headers 909 * Return: sa_idx (SA AST index) 910 */ 911 static inline 912 uint16_t hal_rx_tlv_sa_idx_get_be(uint8_t *buf) 913 { 914 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 915 uint16_t sa_idx; 916 917 sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs); 918 919 return sa_idx; 920 } 921 922 /** 923 * hal_rx_desc_is_first_msdu_be() - Check if first msdu 924 * 925 * @hal_soc_hdl: hal_soc handle 926 * @hw_desc_addr: hardware descriptor address 927 * 928 * Return: 0 - success/ non-zero failure 929 */ 930 static inline uint32_t hal_rx_desc_is_first_msdu_be(void *hw_desc_addr) 931 { 932 struct rx_pkt_tlvs *rx_pkt_tlvs = 933 (struct rx_pkt_tlvs *)hw_desc_addr; 934 935 return HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 936 } 937 938 /** 939 * hal_rx_tlv_l3_hdr_padding_get_be(): API to get the l3_header padding 940 * from rx_msdu_end TLV 941 * 942 * @ buf: pointer to the start of RX PKT TLV headers 943 * Return: number of l3 header padding bytes 944 */ 945 static inline uint32_t hal_rx_tlv_l3_hdr_padding_get_be(uint8_t *buf) 946 { 947 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 948 uint32_t l3_header_padding; 949 950 l3_header_padding = HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs); 951 952 return l3_header_padding; 953 } 954 955 /* 956 * @ hal_rx_encryption_info_valid_be: Returns encryption type. 957 * 958 * @ buf: rx_tlv_hdr of the received packet 959 * @ Return: encryption type 960 */ 961 static inline uint32_t hal_rx_encryption_info_valid_be(uint8_t *buf) 962 { 963 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 964 uint32_t encryption_info = 965 HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(rx_pkt_tlvs); 966 967 return encryption_info; 968 } 969 970 /* 971 * @ hal_rx_print_pn_be: Prints the PN of rx packet. 972 * 973 * @ buf: rx_tlv_hdr of the received packet 974 * @ Return: void 975 */ 976 static inline void hal_rx_print_pn_be(uint8_t *buf) 977 { 978 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 979 980 uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 981 uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs); 982 uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 983 uint32_t pn_127_96 = HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs); 984 985 hal_debug("PN number pn_127_96 0x%x pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x ", 986 pn_127_96, pn_95_64, pn_63_32, pn_31_0); 987 } 988 989 static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num) 990 { 991 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 992 993 pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs); 994 pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs) << 32); 995 996 pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs); 997 pn_num[1] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs) << 32); 998 } 999 1000 /** 1001 * hal_rx_tlv_first_msdu_get_be: API to get first msdu status 1002 * from rx_msdu_end TLV 1003 * 1004 * @ buf: pointer to the start of RX PKT TLV headers 1005 * Return: first_msdu 1006 */ 1007 static inline uint8_t hal_rx_tlv_first_msdu_get_be(uint8_t *buf) 1008 { 1009 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1010 uint8_t first_msdu; 1011 1012 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs); 1013 1014 return first_msdu; 1015 } 1016 1017 /** 1018 * hal_rx_tlv_da_is_valid_get_be: API to check if da is valid 1019 * from rx_msdu_end TLV 1020 * 1021 * @ buf: pointer to the start of RX PKT TLV headers 1022 * Return: da_is_valid 1023 */ 1024 static inline uint8_t hal_rx_tlv_da_is_valid_get_be(uint8_t *buf) 1025 { 1026 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1027 uint8_t da_is_valid; 1028 1029 da_is_valid = HAL_RX_TLV_DA_IS_VALID_GET(rx_pkt_tlvs); 1030 1031 return da_is_valid; 1032 } 1033 1034 /** 1035 * hal_rx_tlv_last_msdu_get_be: API to get last msdu status 1036 * from rx_msdu_end TLV 1037 * 1038 * @ buf: pointer to the start of RX PKT TLV headers 1039 * Return: last_msdu 1040 */ 1041 static inline uint8_t hal_rx_tlv_last_msdu_get_be(uint8_t *buf) 1042 { 1043 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1044 uint8_t last_msdu; 1045 1046 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_pkt_tlvs); 1047 1048 return last_msdu; 1049 } 1050 1051 /* 1052 * hal_rx_get_mpdu_mac_ad4_valid_be(): Retrieves if mpdu 4th addr is valid 1053 * 1054 * @nbuf: Network buffer 1055 * Returns: value of mpdu 4th address valid field 1056 */ 1057 static inline bool hal_rx_get_mpdu_mac_ad4_valid_be(uint8_t *buf) 1058 { 1059 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1060 bool ad4_valid = 0; 1061 1062 ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs); 1063 1064 return ad4_valid; 1065 } 1066 1067 /** 1068 * hal_rx_mpdu_start_sw_peer_id_get_be: Retrieve sw peer_id 1069 * @buf: network buffer 1070 * 1071 * Return: sw peer_id 1072 */ 1073 static inline uint32_t hal_rx_mpdu_start_sw_peer_id_get_be(uint8_t *buf) 1074 { 1075 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1076 1077 return HAL_RX_TLV_SW_PEER_ID_GET(rx_pkt_tlvs); 1078 } 1079 1080 /** 1081 * hal_rx_mpdu_get_to_ds_be(): API to get the tods info 1082 * from rx_mpdu_start 1083 * 1084 * @buf: pointer to the start of RX PKT TLV header 1085 * Return: uint32_t(to_ds) 1086 */ 1087 static inline uint32_t hal_rx_mpdu_get_to_ds_be(uint8_t *buf) 1088 { 1089 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1090 1091 return HAL_RX_TLV_MPDU_GET_TODS(rx_pkt_tlvs); 1092 } 1093 1094 /* 1095 * hal_rx_mpdu_get_fr_ds_be(): API to get the from ds info 1096 * from rx_mpdu_start 1097 * 1098 * @buf: pointer to the start of RX PKT TLV header 1099 * Return: uint32_t(fr_ds) 1100 */ 1101 static inline uint32_t hal_rx_mpdu_get_fr_ds_be(uint8_t *buf) 1102 { 1103 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1104 1105 return HAL_RX_TLV_MPDU_GET_FROMDS(rx_pkt_tlvs); 1106 } 1107 1108 /* 1109 * hal_rx_get_mpdu_frame_control_valid_be(): Retrieves mpdu 1110 * frame control valid 1111 * 1112 * @nbuf: Network buffer 1113 * Returns: value of frame control valid field 1114 */ 1115 static inline uint8_t hal_rx_get_mpdu_frame_control_valid_be(uint8_t *buf) 1116 { 1117 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1118 1119 return HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(rx_pkt_tlvs); 1120 } 1121 1122 /* 1123 * hal_rx_mpdu_get_addr1_be(): API to check get address1 of the mpdu 1124 * 1125 * @buf: pointer to the start of RX PKT TLV headera 1126 * @mac_addr: pointer to mac address 1127 * Return: success/failure 1128 */ 1129 static inline QDF_STATUS hal_rx_mpdu_get_addr1_be(uint8_t *buf, 1130 uint8_t *mac_addr) 1131 { 1132 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1133 struct __attribute__((__packed__)) hal_addr1 { 1134 uint32_t ad1_31_0; 1135 uint16_t ad1_47_32; 1136 }; 1137 struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr; 1138 uint32_t mac_addr_ad1_valid; 1139 1140 mac_addr_ad1_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(rx_pkt_tlvs); 1141 1142 if (mac_addr_ad1_valid) { 1143 addr->ad1_31_0 = HAL_RX_TLV_MPDU_AD1_31_0_GET(rx_pkt_tlvs); 1144 addr->ad1_47_32 = HAL_RX_TLV_MPDU_AD1_47_32_GET(rx_pkt_tlvs); 1145 return QDF_STATUS_SUCCESS; 1146 } 1147 1148 return QDF_STATUS_E_FAILURE; 1149 } 1150 1151 /* 1152 * hal_rx_mpdu_get_addr2_be(): API to check get address2 of the mpdu 1153 * in the packet 1154 * 1155 * @buf: pointer to the start of RX PKT TLV header 1156 * @mac_addr: pointer to mac address 1157 * Return: success/failure 1158 */ 1159 static inline QDF_STATUS hal_rx_mpdu_get_addr2_be(uint8_t *buf, 1160 uint8_t *mac_addr) 1161 { 1162 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1163 struct __attribute__((__packed__)) hal_addr2 { 1164 uint16_t ad2_15_0; 1165 uint32_t ad2_47_16; 1166 }; 1167 struct hal_addr2 *addr = (struct hal_addr2 *)mac_addr; 1168 uint32_t mac_addr_ad2_valid; 1169 1170 mac_addr_ad2_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1171 1172 if (mac_addr_ad2_valid) { 1173 addr->ad2_15_0 = HAL_RX_TLV_MPDU_AD2_15_0_GET(rx_pkt_tlvs); 1174 addr->ad2_47_16 = HAL_RX_TLV_MPDU_AD2_47_16_GET(rx_pkt_tlvs); 1175 return QDF_STATUS_SUCCESS; 1176 } 1177 1178 return QDF_STATUS_E_FAILURE; 1179 } 1180 1181 /* 1182 * hal_rx_mpdu_get_addr3_be(): API to get address3 of the mpdu 1183 * in the packet 1184 * 1185 * @buf: pointer to the start of RX PKT TLV header 1186 * @mac_addr: pointer to mac address 1187 * Return: success/failure 1188 */ 1189 static inline QDF_STATUS hal_rx_mpdu_get_addr3_be(uint8_t *buf, 1190 uint8_t *mac_addr) 1191 { 1192 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1193 struct __attribute__((__packed__)) hal_addr3 { 1194 uint32_t ad3_31_0; 1195 uint16_t ad3_47_32; 1196 }; 1197 struct hal_addr3 *addr = (struct hal_addr3 *)mac_addr; 1198 uint32_t mac_addr_ad3_valid; 1199 1200 mac_addr_ad3_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(rx_pkt_tlvs); 1201 1202 if (mac_addr_ad3_valid) { 1203 addr->ad3_31_0 = HAL_RX_TLV_MPDU_AD3_31_0_GET(rx_pkt_tlvs); 1204 addr->ad3_47_32 = HAL_RX_TLV_MPDU_AD3_47_32_GET(rx_pkt_tlvs); 1205 return QDF_STATUS_SUCCESS; 1206 } 1207 1208 return QDF_STATUS_E_FAILURE; 1209 } 1210 1211 /* 1212 * hal_rx_mpdu_get_addr4_be(): API to get address4 of the mpdu 1213 * in the packet 1214 * 1215 * @buf: pointer to the start of RX PKT TLV header 1216 * @mac_addr: pointer to mac address 1217 * Return: success/failure 1218 */ 1219 static inline QDF_STATUS hal_rx_mpdu_get_addr4_be(uint8_t *buf, 1220 uint8_t *mac_addr) 1221 { 1222 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1223 struct __attribute__((__packed__)) hal_addr4 { 1224 uint32_t ad4_31_0; 1225 uint16_t ad4_47_32; 1226 }; 1227 struct hal_addr4 *addr = (struct hal_addr4 *)mac_addr; 1228 uint32_t mac_addr_ad4_valid; 1229 1230 mac_addr_ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs); 1231 1232 if (mac_addr_ad4_valid) { 1233 addr->ad4_31_0 = HAL_RX_TLV_MPDU_AD4_31_0_GET(rx_pkt_tlvs); 1234 addr->ad4_47_32 = HAL_RX_TLV_MPDU_AD4_47_32_GET(rx_pkt_tlvs); 1235 return QDF_STATUS_SUCCESS; 1236 } 1237 1238 return QDF_STATUS_E_FAILURE; 1239 } 1240 1241 /* 1242 * hal_rx_get_mpdu_sequence_control_valid_be(): Get mpdu 1243 * sequence control valid 1244 * 1245 * @nbuf: Network buffer 1246 * Returns: value of sequence control valid field 1247 */ 1248 static inline uint8_t hal_rx_get_mpdu_sequence_control_valid_be(uint8_t *buf) 1249 { 1250 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1251 1252 return HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_pkt_tlvs); 1253 } 1254 1255 /** 1256 * hal_rx_tid_get_be: get tid based on qos control valid. 1257 * @hal_soc_hdl: hal_soc handle 1258 * @ buf: pointer to rx pkt TLV. 1259 * 1260 * Return: tid 1261 */ 1262 static inline uint32_t hal_rx_tid_get_be(hal_soc_handle_t hal_soc_hdl, 1263 uint8_t *buf) 1264 { 1265 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1266 uint8_t qos_control_valid = 1267 HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(rx_pkt_tlvs); 1268 1269 if (qos_control_valid) 1270 return hal_rx_tlv_tid_get_be(buf); 1271 1272 return HAL_RX_NON_QOS_TID; 1273 } 1274 1275 static inline 1276 uint8_t hal_rx_get_fc_valid_be(uint8_t *buf) 1277 { 1278 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1279 1280 return HAL_RX_GET_FC_VALID(rx_pkt_tlvs); 1281 } 1282 1283 static inline uint8_t hal_rx_get_to_ds_flag_be(uint8_t *buf) 1284 { 1285 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1286 1287 return HAL_RX_GET_TO_DS_FLAG(rx_pkt_tlvs); 1288 } 1289 1290 static inline uint8_t hal_rx_get_mac_addr2_valid_be(uint8_t *buf) 1291 { 1292 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1293 1294 return HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs); 1295 } 1296 1297 /** 1298 * hal_rx_is_unicast_be: check packet is unicast frame or not. 1299 * 1300 * @ buf: pointer to rx pkt TLV. 1301 * Return: true on unicast. 1302 */ 1303 static inline bool hal_rx_is_unicast_be(uint8_t *buf) 1304 { 1305 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1306 uint32_t grp_id; 1307 1308 grp_id = HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(rx_pkt_tlvs); 1309 1310 return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false; 1311 } 1312 1313 static inline uint8_t hal_rx_get_filter_category_be(uint8_t *buf) 1314 { 1315 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1316 1317 return HAL_RX_GET_FILTER_CATEGORY(rx_pkt_tlvs); 1318 } 1319 1320 /** 1321 * hal_rx_hw_desc_get_ppduid_get_be(): retrieve ppdu id 1322 * @rx_tlv_hdr: start address of rx_pkt_tlvs 1323 * @rxdma_dst_ring_desc: Rx HW descriptor 1324 * 1325 * Return: ppdu id 1326 */ 1327 static inline uint32_t 1328 hal_rx_hw_desc_get_ppduid_get_be(void *rx_tlv_hdr, void *rxdma_dst_ring_desc) 1329 { 1330 struct rx_pkt_tlvs *rx_pkt_tlvs = 1331 (struct rx_pkt_tlvs *)rx_tlv_hdr; 1332 1333 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs); 1334 } 1335 1336 static inline uint32_t 1337 hal_rx_get_ppdu_id_be(uint8_t *buf) 1338 { 1339 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1340 1341 return HAL_RX_GET_PPDU_ID(rx_pkt_tlvs); 1342 } 1343 1344 /** 1345 * hal_rx_msdu_flow_idx_get_be: API to get flow index 1346 * from rx_msdu_end TLV 1347 * @buf: pointer to the start of RX PKT TLV headers 1348 * 1349 * Return: flow index value from MSDU END TLV 1350 */ 1351 static inline uint32_t hal_rx_msdu_flow_idx_get_be(uint8_t *buf) 1352 { 1353 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1354 1355 return HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 1356 } 1357 1358 /** 1359 * hal_rx_msdu_get_reo_destination_indication_be: API to get 1360 * reo_destination_indication from rx_msdu_end TLV 1361 * @buf: pointer to the start of RX PKT TLV headers 1362 * @reo_destination_indication: pointer to return value of 1363 * reo_destination_indication 1364 * 1365 * Return: none 1366 */ 1367 static inline void 1368 hal_rx_msdu_get_reo_destination_indication_be(uint8_t *buf, 1369 uint32_t *reo_destination_indication) 1370 { 1371 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1372 1373 *reo_destination_indication = HAL_RX_TLV_REO_DEST_IND_GET(pkt_tlvs); 1374 } 1375 1376 /** 1377 * hal_rx_msdu_flow_idx_invalid_be: API to get flow index invalid 1378 * from rx_msdu_end TLV 1379 * @buf: pointer to the start of RX PKT TLV headers 1380 * 1381 * Return: flow index invalid value from MSDU END TLV 1382 */ 1383 static inline bool hal_rx_msdu_flow_idx_invalid_be(uint8_t *buf) 1384 { 1385 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1386 1387 return HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 1388 } 1389 1390 /** 1391 * hal_rx_msdu_flow_idx_timeout_be: API to get flow index timeout 1392 * from rx_msdu_end TLV 1393 * @buf: pointer to the start of RX PKT TLV headers 1394 * 1395 * Return: flow index timeout value from MSDU END TLV 1396 */ 1397 static inline bool hal_rx_msdu_flow_idx_timeout_be(uint8_t *buf) 1398 { 1399 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1400 1401 return HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 1402 } 1403 1404 /** 1405 * hal_rx_msdu_fse_metadata_get_be: API to get FSE metadata 1406 * from rx_msdu_end TLV 1407 * @buf: pointer to the start of RX PKT TLV headers 1408 * 1409 * Return: fse metadata value from MSDU END TLV 1410 */ 1411 static inline uint32_t hal_rx_msdu_fse_metadata_get_be(uint8_t *buf) 1412 { 1413 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1414 1415 return HAL_RX_TLV_FSE_METADATA_GET(pkt_tlvs); 1416 } 1417 1418 /** 1419 * hal_rx_msdu_cce_metadata_get_be: API to get CCE metadata 1420 * from rx_msdu_end TLV 1421 * @buf: pointer to the start of RX PKT TLV headers 1422 * 1423 * Return: cce_metadata 1424 */ 1425 static inline uint16_t 1426 hal_rx_msdu_cce_metadata_get_be(uint8_t *buf) 1427 { 1428 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1429 1430 return HAL_RX_TLV_CCE_METADATA_GET(pkt_tlvs); 1431 } 1432 1433 /** 1434 * hal_rx_msdu_get_flow_params_be: API to get flow index, flow index invalid 1435 * and flow index timeout from rx_msdu_end TLV 1436 * @buf: pointer to the start of RX PKT TLV headers 1437 * @flow_invalid: pointer to return value of flow_idx_valid 1438 * @flow_timeout: pointer to return value of flow_idx_timeout 1439 * @flow_index: pointer to return value of flow_idx 1440 * 1441 * Return: none 1442 */ 1443 static inline void 1444 hal_rx_msdu_get_flow_params_be(uint8_t *buf, 1445 bool *flow_invalid, 1446 bool *flow_timeout, 1447 uint32_t *flow_index) 1448 { 1449 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1450 1451 *flow_invalid = HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs); 1452 *flow_timeout = HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs); 1453 *flow_index = HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs); 1454 } 1455 1456 /** 1457 * hal_rx_tlv_get_tcp_chksum_be() - API to get tcp checksum 1458 * @buf: rx_tlv_hdr 1459 * 1460 * Return: tcp checksum 1461 */ 1462 static inline uint16_t 1463 hal_rx_tlv_get_tcp_chksum_be(uint8_t *buf) 1464 { 1465 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1466 1467 return HAL_RX_TLV_GET_TCP_CHKSUM(rx_pkt_tlvs); 1468 } 1469 1470 /** 1471 * hal_rx_get_rx_sequence_be(): Function to retrieve rx sequence number 1472 * 1473 * @nbuf: Network buffer 1474 * Returns: rx sequence number 1475 */ 1476 static inline 1477 uint16_t hal_rx_get_rx_sequence_be(uint8_t *buf) 1478 { 1479 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1480 1481 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs); 1482 } 1483 1484 #ifdef RECEIVE_OFFLOAD 1485 /** 1486 * hal_rx_get_fisa_cumulative_l4_checksum_be() - Retrieve cumulative 1487 * checksum 1488 * @buf: buffer pointer 1489 * 1490 * Return: cumulative checksum 1491 */ 1492 static inline 1493 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf) 1494 { 1495 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1496 1497 return HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(rx_pkt_tlvs); 1498 } 1499 1500 /** 1501 * hal_rx_get_fisa_cumulative_ip_length_be() - Retrieve cumulative 1502 * ip length 1503 * @buf: buffer pointer 1504 * 1505 * Return: cumulative length 1506 */ 1507 static inline 1508 uint16_t hal_rx_get_fisa_cumulative_ip_length_be(uint8_t *buf) 1509 { 1510 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1511 1512 return HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(rx_pkt_tlvs); 1513 } 1514 1515 /** 1516 * hal_rx_get_udp_proto_be() - Retrieve udp proto value 1517 * @buf: buffer 1518 * 1519 * Return: udp proto bit 1520 */ 1521 static inline 1522 bool hal_rx_get_udp_proto_be(uint8_t *buf) 1523 { 1524 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1525 1526 return HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 1527 } 1528 #endif 1529 1530 /** 1531 * hal_rx_get_flow_agg_continuation_be() - retrieve flow agg 1532 * continuation 1533 * @buf: buffer 1534 * 1535 * Return: flow agg 1536 */ 1537 static inline 1538 bool hal_rx_get_flow_agg_continuation_be(uint8_t *buf) 1539 { 1540 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1541 1542 return HAL_RX_TLV_GET_FLOW_AGGR_CONT(rx_pkt_tlvs); 1543 } 1544 1545 /** 1546 * hal_rx_get_flow_agg_count_be()- Retrieve flow agg count 1547 * @buf: buffer 1548 * 1549 * Return: flow agg count 1550 */ 1551 static inline 1552 uint8_t hal_rx_get_flow_agg_count_be(uint8_t *buf) 1553 { 1554 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1555 1556 return HAL_RX_TLV_GET_FLOW_AGGR_COUNT(rx_pkt_tlvs); 1557 } 1558 1559 /** 1560 * hal_rx_get_fisa_timeout_be() - Retrieve fisa timeout 1561 * @buf: buffer 1562 * 1563 * Return: fisa timeout 1564 */ 1565 static inline 1566 bool hal_rx_get_fisa_timeout_be(uint8_t *buf) 1567 { 1568 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1569 1570 return HAL_RX_TLV_GET_FISA_TIMEOUT(rx_pkt_tlvs); 1571 } 1572 1573 /** 1574 * hal_rx_mpdu_start_tlv_tag_valid_be () - API to check if RX_MPDU_START 1575 * tlv tag is valid 1576 * 1577 *@rx_tlv_hdr: start address of rx_pkt_tlvs 1578 * 1579 * Return: true if RX_MPDU_START is valied, else false. 1580 */ 1581 static inline uint8_t hal_rx_mpdu_start_tlv_tag_valid_be(void *rx_tlv_hdr) 1582 { 1583 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)rx_tlv_hdr; 1584 uint32_t tlv_tag; 1585 1586 tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(&rx_desc->mpdu_start_tlv); 1587 1588 return tlv_tag == WIFIRX_MPDU_START_E ? true : false; 1589 } 1590 1591 /** 1592 * hal_rx_msdu_end_offset_get_generic(): API to get the 1593 * msdu_end structure offset rx_pkt_tlv structure 1594 * 1595 * NOTE: API returns offset of msdu_end TLV from structure 1596 * rx_pkt_tlvs 1597 */ 1598 static inline uint32_t hal_rx_msdu_end_offset_get_generic(void) 1599 { 1600 return RX_PKT_TLV_OFFSET(msdu_end_tlv); 1601 } 1602 1603 /** 1604 * hal_rx_mpdu_start_offset_get_generic(): API to get the 1605 * mpdu_start structure offset rx_pkt_tlv structure 1606 * 1607 * NOTE: API returns offset of attn TLV from structure 1608 * rx_pkt_tlvs 1609 */ 1610 static inline uint32_t hal_rx_mpdu_start_offset_get_generic(void) 1611 { 1612 return RX_PKT_TLV_OFFSET(mpdu_start_tlv); 1613 } 1614 1615 static inline uint32_t hal_rx_pkt_tlv_offset_get_generic(void) 1616 { 1617 return RX_PKT_TLV_OFFSET(pkt_hdr_tlv); 1618 } 1619 1620 #ifdef RECEIVE_OFFLOAD 1621 static inline int 1622 hal_rx_tlv_get_offload_info_be(uint8_t *rx_tlv, 1623 struct hal_offload_info *offload_info) 1624 { 1625 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)rx_tlv; 1626 1627 offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_pkt_tlvs); 1628 offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_pkt_tlvs); 1629 offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 1630 offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs); 1631 1632 if (offload_info->tcp_proto) { 1633 offload_info->tcp_pure_ack = 1634 HAL_RX_TLV_GET_TCP_PURE_ACK(rx_pkt_tlvs); 1635 offload_info->tcp_offset = 1636 HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 1637 offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_pkt_tlvs); 1638 offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_pkt_tlvs); 1639 offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_pkt_tlvs); 1640 } 1641 return 0; 1642 } 1643 1644 static inline int hal_rx_get_proto_params_be(uint8_t *buf, void *proto_params) 1645 { 1646 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1647 struct hal_proto_params *param = 1648 (struct hal_proto_params *)proto_params; 1649 1650 param->tcp_proto = HAL_RX_TLV_GET_IP_OFFSET(rx_pkt_tlvs); 1651 param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs); 1652 param->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs); 1653 1654 return 0; 1655 } 1656 1657 static inline int hal_rx_get_l3_l4_offsets_be(uint8_t *buf, 1658 uint32_t *l3_hdr_offset, 1659 uint32_t *l4_hdr_offset) 1660 { 1661 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1662 1663 *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(rx_pkt_tlvs); 1664 *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs); 1665 1666 return 0; 1667 } 1668 #endif 1669 1670 /** 1671 * hal_rx_msdu_start_msdu_len_get(): API to get the MSDU length 1672 * from rx_msdu_start TLV 1673 * 1674 * @ buf: pointer to the start of RX PKT TLV headers 1675 * Return: msdu length 1676 */ 1677 static inline uint32_t hal_rx_msdu_start_msdu_len_get_be(uint8_t *buf) 1678 { 1679 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1680 uint32_t msdu_len; 1681 1682 msdu_len = HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs); 1683 1684 return msdu_len; 1685 } 1686 1687 /** 1688 * hal_rx_get_frame_ctrl_field(): Function to retrieve frame control field 1689 * 1690 * @nbuf: Network buffer 1691 * Returns: rx more fragment bit 1692 * 1693 */ 1694 static inline uint16_t hal_rx_get_frame_ctrl_field_be(uint8_t *buf) 1695 { 1696 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1697 uint16_t frame_ctrl = 0; 1698 1699 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_pkt_tlvs); 1700 1701 return frame_ctrl; 1702 } 1703 1704 /* 1705 * hal_rx_tlv_get_is_decrypted_be(): API to get the decrypt status of the 1706 * packet from msdu_end 1707 * 1708 * @buf: pointer to the start of RX PKT TLV header 1709 * Return: uint32_t(decryt status) 1710 */ 1711 static inline uint32_t hal_rx_tlv_get_is_decrypted_be(uint8_t *buf) 1712 { 1713 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1714 uint32_t is_decrypt = 0; 1715 uint32_t decrypt_status; 1716 1717 decrypt_status = HAL_RX_TLV_DECRYPT_STATUS_GET(rx_pkt_tlvs); 1718 1719 if (!decrypt_status) 1720 is_decrypt = 1; 1721 1722 return is_decrypt; 1723 } 1724 1725 //TODO - Currently going with NO-PKT-HDR, need to add pkt hdr tlv and check 1726 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf) 1727 { 1728 return buf + RX_PKT_TLVS_LEN; 1729 } 1730 1731 /** 1732 * hal_rx_priv_info_set_in_tlv_be(): Save the private info to 1733 * the reserved bytes of rx_tlv_hdr 1734 * @buf: start of rx_tlv_hdr 1735 * @priv_data: hal_wbm_err_desc_info structure 1736 * @len: length of the private data 1737 * Return: void 1738 */ 1739 static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf, 1740 uint8_t *priv_data, 1741 uint32_t len) 1742 { 1743 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1744 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1745 RX_BE_PADDING0_BYTES : len; 1746 1747 qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len); 1748 } 1749 1750 /** 1751 * hal_rx_priv_info_get_from_tlv_be(): retrieve the private data from 1752 * the reserved bytes of rx_tlv_hdr. 1753 * @buf: start of rx_tlv_hdr 1754 * @priv_data: Handle to get the private data, output parameter. 1755 * @len: length of the private data 1756 * Return: void 1757 */ 1758 static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf, 1759 uint8_t *priv_data, 1760 uint32_t len) 1761 { 1762 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1763 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ? 1764 RX_BE_PADDING0_BYTES : len; 1765 1766 qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len); 1767 } 1768 1769 /** 1770 * hal_rx_tlv_csum_err_get_be() - Get IP and tcp-udp checksum fail flag 1771 * @rx_tlv_hdr: start address of rx_tlv_hdr 1772 * @ip_csum_err: buffer to return ip_csum_fail flag 1773 * @tcp_udp_csum_fail: placeholder to return tcp-udp checksum fail flag 1774 * 1775 * Return: None 1776 */ 1777 static inline void 1778 hal_rx_tlv_csum_err_get_be(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err, 1779 uint32_t *tcp_udp_csum_err) 1780 { 1781 struct rx_pkt_tlvs *rx_pkt_tlvs = 1782 (struct rx_pkt_tlvs *)rx_tlv_hdr; 1783 1784 *ip_csum_err = HAL_RX_TLV_IP_CSUM_FAIL_GET(rx_pkt_tlvs); 1785 *tcp_udp_csum_err = HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(rx_pkt_tlvs); 1786 } 1787 1788 static inline 1789 uint32_t hal_rx_tlv_mpdu_len_err_get_be(void *hw_desc_addr) 1790 { 1791 struct rx_pkt_tlvs *rx_pkt_tlvs = 1792 (struct rx_pkt_tlvs *)hw_desc_addr; 1793 1794 return HAL_RX_TLV_MPDU_LEN_ERR_GET(rx_pkt_tlvs); 1795 } 1796 1797 static inline 1798 uint32_t hal_rx_tlv_mpdu_fcs_err_get_be(void *hw_desc_addr) 1799 { 1800 struct rx_pkt_tlvs *rx_pkt_tlvs = 1801 (struct rx_pkt_tlvs *)hw_desc_addr; 1802 1803 return HAL_RX_TLV_MPDU_FCS_ERR_GET(rx_pkt_tlvs); 1804 } 1805 1806 /** 1807 * hal_rx_get_rx_more_frag_bit(): Function to retrieve more fragment bit 1808 * 1809 * @nbuf: Network buffer 1810 * Returns: rx more fragment bit 1811 */ 1812 static inline 1813 uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf) 1814 { 1815 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1816 uint16_t frame_ctrl = 0; 1817 1818 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(pkt_tlvs) >> 1819 DOT11_FC1_MORE_FRAG_OFFSET; 1820 1821 /* more fragment bit if at offset bit 4 */ 1822 return frame_ctrl; 1823 } 1824 1825 /* 1826 * hal_rx_msdu_is_wlan_mcast_generic_be(): Check if the buffer is for multicast 1827 * address 1828 * @nbuf: Network buffer 1829 * 1830 * Returns: flag to indicate whether the nbuf has MC/BC address 1831 */ 1832 static inline uint32_t hal_rx_msdu_is_wlan_mcast_generic_be(qdf_nbuf_t nbuf) 1833 { 1834 uint8_t *buf = qdf_nbuf_data(nbuf); 1835 1836 return HAL_RX_TLV_IS_MCAST_GET(buf);; 1837 } 1838 1839 /** 1840 * hal_rx_msdu_start_msdu_len_set_be(): API to set the MSDU length 1841 * from rx_msdu_start TLV 1842 * 1843 * @buf: pointer to the start of RX PKT TLV headers 1844 * @len: msdu length 1845 * 1846 * Return: none 1847 */ 1848 static inline void 1849 hal_rx_msdu_start_msdu_len_set_be(uint8_t *buf, uint32_t len) 1850 { 1851 HAL_RX_TLV_MSDU_LEN_GET(buf) = len; 1852 } 1853 1854 /** 1855 * hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(): 1856 * Retrieve qos control valid bit from the tlv. 1857 * @buf: pointer to rx pkt TLV. 1858 * 1859 * Return: qos control value. 1860 */ 1861 static inline uint32_t 1862 hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(uint8_t *buf) 1863 { 1864 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1865 1866 return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(pkt_tlvs); 1867 } 1868 1869 /** 1870 * hal_rx_msdu_end_sa_sw_peer_id_get_be(): API to get the 1871 * sa_sw_peer_id from rx_msdu_end TLV 1872 * @buf: pointer to the start of RX PKT TLV headers 1873 * 1874 * Return: sa_sw_peer_id index 1875 */ 1876 static inline uint32_t 1877 hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t *buf) 1878 { 1879 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; 1880 1881 hal_rx_msdu_end_t *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; 1882 1883 return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end); 1884 } 1885 1886 #endif /* _HAL_BE_RX_TLV_H_ */ 1887