1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _HAL_BE_API_H_ 21 #define _HAL_BE_API_H_ 22 23 #include "hal_hw_headers.h" 24 #include "hal_rx.h" 25 26 #define HAL_RX_MSDU_EXT_DESC_INFO_GET(msdu_details_ptr) \ 27 ((struct rx_msdu_ext_desc_info *) \ 28 _OFFSET_TO_BYTE_PTR(msdu_details_ptr, \ 29 RX_MSDU_DETAILS_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET)) 30 31 /** 32 * hal_reo_setup_generic_be - Initialize HW REO block 33 * 34 * @hal_soc: Opaque HAL SOC handle 35 * @reo_params: parameters needed by HAL for REO config 36 * @qref_reset: reset qref 37 */ 38 void hal_reo_setup_generic_be(struct hal_soc *soc, 39 void *reoparams, int qref_reset); 40 41 /** 42 * hal_rx_msdu_ext_desc_info_get_ptr_be() - Get the msdu extension 43 * descriptor pointer. 44 * @msdu_details_ptr: msdu details 45 * 46 * Return: msdu exntension descriptor pointer. 47 */ 48 void *hal_rx_msdu_ext_desc_info_get_ptr_be(void *msdu_details_ptr); 49 50 /** 51 * hal_set_link_desc_addr_be - Setup link descriptor in a buffer_addr_info 52 * HW structure 53 * 54 * @desc: Descriptor entry (from WBM_IDLE_LINK ring) 55 * @cookie: SW cookie for the buffer/descriptor 56 * @link_desc_paddr: Physical address of link descriptor entry 57 * @bm_id: idle link BM id 58 * 59 */ 60 void hal_set_link_desc_addr_be(void *desc, uint32_t cookie, 61 qdf_dma_addr_t link_desc_paddr, 62 uint8_t bm_id); 63 64 /** 65 * hal_hw_txrx_default_ops_attach_be(): Add default ops for BE chips 66 * @ hal_soc_hdl: hal_soc handle 67 * 68 * Return: None 69 */ 70 void hal_hw_txrx_default_ops_attach_be(struct hal_soc *soc); 71 72 uint32_t hal_tx_comp_get_buffer_source_generic_be(void *hal_desc); 73 uint8_t hal_rx_ret_buf_manager_get_be(hal_ring_desc_t ring_desc); 74 void hal_rx_wbm_err_info_get_generic_be(void *wbm_desc, void *wbm_er_info1); 75 76 /** 77 * hal_reo_qdesc_setup - Setup HW REO queue descriptor 78 * 79 * @hal_soc: Opaque HAL SOC handle 80 * @ba_window_size: BlockAck window size 81 * @start_seq: Starting sequence number 82 * @hw_qdesc_vaddr: Virtual address of REO queue descriptor memory 83 * @hw_qdesc_paddr: Physical address of REO queue descriptor memory 84 * @pn_type: PN type (one of the types defined in 'enum hal_pn_type') 85 * @vdev_stats_id: vdev_stats_id to be programmed in REO Queue Descriptor 86 */ 87 void hal_reo_qdesc_setup_be(hal_soc_handle_t hal_soc_hdl, 88 int tid, uint32_t ba_window_size, 89 uint32_t start_seq, void *hw_qdesc_vaddr, 90 qdf_dma_addr_t hw_qdesc_paddr, 91 int pn_type, uint8_t vdev_stats_id); 92 93 /** 94 * hal_cookie_conversion_reg_cfg_be() - set cookie conversion relevant register 95 * for REO/WBM 96 * @soc: HAL soc handle 97 * @cc_cfg: structure pointer for HW cookie conversion configuration 98 * 99 * Return: None 100 */ 101 void hal_cookie_conversion_reg_cfg_be(hal_soc_handle_t hal_soc_hdl, 102 struct hal_hw_cc_config *cc_cfg); 103 104 /** 105 * hal_reo_ix_remap_value_get() - Calculate reo remap register value from 106 * ring_id_mask which is used for hash based 107 * reo distribution 108 * 109 * @hal_soc: Handle to HAL SoC structure 110 * @ring_id_mask: mask value indicating the rx rings 0th bit set indicate 111 * REO2SW1 is included in hash distribution 112 * 113 * Return: REO remap value 114 */ 115 uint32_t 116 hal_reo_ix_remap_value_get_be(hal_soc_handle_t hal_soc_hdl, 117 uint8_t rx_ring_mask); 118 119 /** 120 * hal_reo_ring_remap_value_get_be() - return REO remap value 121 * 122 * @ring_id: REO2SW ring id 123 * 124 * Return: REO remap value 125 */ 126 uint8_t 127 hal_reo_ring_remap_value_get_be(uint8_t rx_ring_id); 128 129 /** 130 * hal_setup_reo_swap() - Set the swap flag for big endian machines 131 * @soc: HAL soc handle 132 * 133 * Return: None 134 */ 135 void hal_setup_reo_swap(struct hal_soc *soc); 136 137 /** 138 * hal_get_idle_link_bm_id_be() - Get idle link BM id from chid_id 139 * @chip_id: mlo chip_id 140 * 141 * Returns: RBM ID 142 */ 143 uint8_t hal_get_idle_link_bm_id_be(uint8_t chip_id); 144 #endif /* _HAL_BE_API_H_ */ 145