1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include "dp_types.h" 20 #include <dp_internal.h> 21 #include <dp_htt.h> 22 #include "dp_rh.h" 23 #include "dp_rh_tx.h" 24 #include "dp_rh_htt.h" 25 #include "dp_tx_desc.h" 26 #include "dp_rh_rx.h" 27 #include "dp_peer.h" 28 #include <wlan_utility.h> 29 #include <dp_rings.h> 30 #include <ce_api.h> 31 #include <ce_internal.h> 32 33 static QDF_STATUS 34 dp_srng_init_rh(struct dp_soc *soc, struct dp_srng *srng, int ring_type, 35 int ring_num, int mac_id) 36 { 37 hal_soc_handle_t hal_soc = soc->hal_soc; 38 struct hal_srng_params ring_params; 39 40 if (srng->hal_srng) { 41 dp_init_err("%pK: Ring type: %d, num:%d is already initialized", 42 soc, ring_type, ring_num); 43 return QDF_STATUS_SUCCESS; 44 } 45 46 /* memset the srng ring to zero */ 47 qdf_mem_zero(srng->base_vaddr_unaligned, srng->alloc_size); 48 49 qdf_mem_zero(&ring_params, sizeof(struct hal_srng_params)); 50 ring_params.ring_base_paddr = srng->base_paddr_aligned; 51 ring_params.ring_base_vaddr = srng->base_vaddr_aligned; 52 53 ring_params.num_entries = srng->num_entries; 54 55 dp_info("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u", 56 ring_type, ring_num, 57 (void *)ring_params.ring_base_vaddr, 58 (void *)ring_params.ring_base_paddr, 59 ring_params.num_entries); 60 61 srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num, 62 mac_id, &ring_params, 0); 63 64 if (!srng->hal_srng) { 65 dp_srng_free(soc, srng); 66 return QDF_STATUS_E_FAILURE; 67 } 68 69 return QDF_STATUS_SUCCESS; 70 } 71 72 static QDF_STATUS 73 dp_peer_setup_rh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id, 74 uint8_t *peer_mac, 75 struct cdp_peer_setup_info *setup_info) 76 { 77 struct dp_soc *soc = (struct dp_soc *)soc_hdl; 78 struct dp_pdev *pdev; 79 QDF_STATUS status = QDF_STATUS_SUCCESS; 80 struct dp_vdev *vdev = NULL; 81 struct dp_peer *peer = 82 dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id, 83 DP_MOD_ID_CDP); 84 enum wlan_op_mode vdev_opmode; 85 86 if (!peer) 87 return QDF_STATUS_E_FAILURE; 88 89 vdev = peer->vdev; 90 if (!vdev) { 91 status = QDF_STATUS_E_FAILURE; 92 goto fail; 93 } 94 95 /* save vdev related member in case vdev freed */ 96 vdev_opmode = vdev->opmode; 97 pdev = vdev->pdev; 98 99 dp_info("pdev: %d vdev :%d opmode:%u", 100 pdev->pdev_id, vdev->vdev_id, vdev->opmode); 101 102 /* 103 * There are corner cases where the AD1 = AD2 = "VAPs address" 104 * i.e both the devices have same MAC address. In these 105 * cases we want such pkts to be processed in NULL Q handler 106 * which is REO2TCL ring. for this reason we should 107 * not setup reo_queues and default route for bss_peer. 108 */ 109 dp_monitor_peer_tx_init(pdev, peer); 110 111 if (!setup_info) 112 if (dp_peer_legacy_setup(soc, peer) != 113 QDF_STATUS_SUCCESS) { 114 status = QDF_STATUS_E_RESOURCES; 115 goto fail; 116 } 117 118 if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap) { 119 status = QDF_STATUS_E_FAILURE; 120 goto fail; 121 } 122 123 if (vdev_opmode != wlan_op_mode_monitor) 124 dp_peer_rx_init(pdev, peer); 125 126 dp_peer_ppdu_delayed_ba_init(peer); 127 128 fail: 129 dp_peer_unref_delete(peer, DP_MOD_ID_CDP); 130 return status; 131 } 132 133 #ifdef AST_OFFLOAD_ENABLE 134 static void dp_peer_map_detach_rh(struct dp_soc *soc) 135 { 136 dp_soc_wds_detach(soc); 137 dp_peer_ast_table_detach(soc); 138 dp_peer_ast_hash_detach(soc); 139 dp_peer_mec_hash_detach(soc); 140 } 141 142 static QDF_STATUS dp_peer_map_attach_rh(struct dp_soc *soc) 143 { 144 QDF_STATUS status; 145 146 soc->max_peer_id = soc->max_peers; 147 148 status = dp_peer_ast_table_attach(soc); 149 if (!QDF_IS_STATUS_SUCCESS(status)) 150 return status; 151 152 status = dp_peer_ast_hash_attach(soc); 153 if (!QDF_IS_STATUS_SUCCESS(status)) 154 goto ast_table_detach; 155 156 status = dp_peer_mec_hash_attach(soc); 157 if (!QDF_IS_STATUS_SUCCESS(status)) 158 goto hash_detach; 159 160 dp_soc_wds_attach(soc); 161 162 return QDF_STATUS_SUCCESS; 163 164 hash_detach: 165 dp_peer_ast_hash_detach(soc); 166 ast_table_detach: 167 dp_peer_ast_table_detach(soc); 168 169 return status; 170 } 171 #else 172 static void dp_peer_map_detach_rh(struct dp_soc *soc) 173 { 174 } 175 176 static QDF_STATUS dp_peer_map_attach_rh(struct dp_soc *soc) 177 { 178 soc->max_peer_id = soc->max_peers; 179 180 return QDF_STATUS_SUCCESS; 181 } 182 #endif 183 184 /** 185 * dp_soc_cfg_init_rh() - initialize target specific configuration 186 * during dp_soc_init 187 * @soc: dp soc handle 188 */ 189 static void dp_soc_cfg_init_rh(struct dp_soc *soc) 190 { 191 uint32_t target_type; 192 193 target_type = hal_get_target_type(soc->hal_soc); 194 switch (target_type) { 195 case TARGET_TYPE_WCN6450: 196 wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true); 197 soc->ast_override_support = 1; 198 soc->wlan_cfg_ctx->rxdma1_enable = 0; 199 break; 200 default: 201 qdf_print("%s: Unknown tgt type %d\n", __func__, target_type); 202 qdf_assert_always(0); 203 break; 204 } 205 } 206 207 static void dp_soc_cfg_attach_rh(struct dp_soc *soc) 208 { 209 int target_type; 210 211 target_type = hal_get_target_type(soc->hal_soc); 212 switch (target_type) { 213 case TARGET_TYPE_WCN6450: 214 soc->wlan_cfg_ctx->rxdma1_enable = 0; 215 break; 216 default: 217 qdf_print("%s: Unknown tgt type %d\n", __func__, target_type); 218 qdf_assert_always(0); 219 break; 220 } 221 222 /* 223 * keeping TCL and completion rings number, this data 224 * is equivalent number of TX interface rings. 225 */ 226 soc->num_tx_comp_rings = 227 wlan_cfg_num_tx_comp_rings(soc->wlan_cfg_ctx); 228 soc->num_tcl_data_rings = 229 wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx); 230 } 231 232 qdf_size_t dp_get_context_size_rh(enum dp_context_type context_type) 233 { 234 switch (context_type) { 235 case DP_CONTEXT_TYPE_SOC: 236 return sizeof(struct dp_soc_rh); 237 case DP_CONTEXT_TYPE_PDEV: 238 return sizeof(struct dp_pdev_rh); 239 case DP_CONTEXT_TYPE_VDEV: 240 return sizeof(struct dp_vdev_rh); 241 case DP_CONTEXT_TYPE_PEER: 242 return sizeof(struct dp_peer_rh); 243 default: 244 return 0; 245 } 246 } 247 248 qdf_size_t dp_mon_get_context_size_rh(enum dp_context_type context_type) 249 { 250 switch (context_type) { 251 case DP_CONTEXT_TYPE_MON_PDEV: 252 return sizeof(struct dp_mon_pdev_rh); 253 case DP_CONTEXT_TYPE_MON_SOC: 254 return sizeof(struct dp_mon_soc_rh); 255 default: 256 return 0; 257 } 258 } 259 260 static QDF_STATUS dp_soc_attach_rh(struct dp_soc *soc, 261 struct cdp_soc_attach_params *params) 262 { 263 return QDF_STATUS_SUCCESS; 264 } 265 266 static QDF_STATUS dp_soc_detach_rh(struct dp_soc *soc) 267 { 268 return QDF_STATUS_SUCCESS; 269 } 270 271 static QDF_STATUS dp_soc_deinit_rh(struct dp_soc *soc) 272 { 273 struct htt_soc *htt_soc = soc->htt_handle; 274 275 qdf_atomic_set(&soc->cmn_init_done, 0); 276 277 /*Degister RX offload flush handlers*/ 278 hif_offld_flush_cb_deregister(soc->hif_handle); 279 280 dp_monitor_soc_deinit(soc); 281 282 /* free peer tables & AST tables allocated during peer_map_attach */ 283 if (soc->peer_map_attach_success) { 284 dp_peer_find_detach(soc); 285 dp_peer_map_detach_rh(soc); 286 soc->peer_map_attach_success = FALSE; 287 } 288 289 qdf_flush_work(&soc->htt_stats.work); 290 qdf_disable_work(&soc->htt_stats.work); 291 292 qdf_spinlock_destroy(&soc->htt_stats.lock); 293 294 qdf_spinlock_destroy(&soc->ast_lock); 295 296 dp_peer_mec_spinlock_destroy(soc); 297 298 qdf_nbuf_queue_free(&soc->htt_stats.msg); 299 300 qdf_nbuf_queue_free(&soc->invalid_buf_queue); 301 302 qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock); 303 304 qdf_spinlock_destroy(&soc->vdev_map_lock); 305 306 dp_soc_tx_desc_sw_pools_deinit(soc); 307 308 dp_soc_srng_deinit(soc); 309 310 dp_hw_link_desc_ring_deinit(soc); 311 312 dp_soc_print_inactive_objects(soc); 313 qdf_spinlock_destroy(&soc->inactive_peer_list_lock); 314 qdf_spinlock_destroy(&soc->inactive_vdev_list_lock); 315 316 htt_soc_htc_dealloc(soc->htt_handle); 317 318 htt_soc_detach(htt_soc); 319 320 wlan_minidump_remove(soc, sizeof(*soc), soc->ctrl_psoc, 321 WLAN_MD_DP_SOC, "dp_soc"); 322 323 return QDF_STATUS_SUCCESS; 324 } 325 326 static void *dp_soc_init_rh(struct dp_soc *soc, HTC_HANDLE htc_handle, 327 struct hif_opaque_softc *hif_handle) 328 { 329 struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle; 330 bool is_monitor_mode = false; 331 uint8_t i; 332 333 wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc, 334 WLAN_MD_DP_SOC, "dp_soc"); 335 336 soc->hif_handle = hif_handle; 337 338 soc->hal_soc = hif_get_hal_handle(soc->hif_handle); 339 if (!soc->hal_soc) 340 goto fail1; 341 342 htt_soc = htt_soc_attach(soc, htc_handle); 343 if (!htt_soc) 344 goto fail1; 345 346 soc->htt_handle = htt_soc; 347 348 if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS) 349 goto fail2; 350 351 htt_set_htc_handle(htt_soc, htc_handle); 352 353 dp_soc_cfg_init_rh(soc); 354 355 dp_monitor_soc_cfg_init(soc); 356 357 /* Note: Any SRNG ring initialization should happen only after 358 * Interrupt mode is set and followed by filling up the 359 * interrupt mask. IT SHOULD ALWAYS BE IN THIS ORDER. 360 */ 361 dp_soc_set_interrupt_mode(soc); 362 if (soc->cdp_soc.ol_ops->get_con_mode && 363 soc->cdp_soc.ol_ops->get_con_mode() == 364 QDF_GLOBAL_MONITOR_MODE) 365 is_monitor_mode = true; 366 367 if (dp_soc_srng_init(soc)) { 368 dp_init_err("%pK: dp_soc_srng_init failed", soc); 369 goto fail3; 370 } 371 372 if (dp_htt_soc_initialize_rh(soc->htt_handle, soc->ctrl_psoc, 373 htt_get_htc_handle(htt_soc), 374 soc->hal_soc, soc->osdev) == NULL) 375 goto fail4; 376 377 /* Initialize descriptors in TCL Rings */ 378 for (i = 0; i < soc->num_tcl_data_rings; i++) { 379 hal_tx_init_data_ring(soc->hal_soc, 380 soc->tcl_data_ring[i].hal_srng); 381 } 382 383 if (dp_soc_tx_desc_sw_pools_init(soc)) { 384 dp_init_err("%pK: dp_tx_soc_attach failed", soc); 385 goto fail5; 386 } 387 388 wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, 389 cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH)); 390 soc->cce_disable = false; 391 soc->max_ast_ageout_count = MAX_AST_AGEOUT_COUNT; 392 393 soc->sta_mode_search_policy = DP_TX_ADDR_SEARCH_ADDR_POLICY; 394 qdf_mem_zero(&soc->vdev_id_map, sizeof(soc->vdev_id_map)); 395 qdf_spinlock_create(&soc->vdev_map_lock); 396 qdf_atomic_init(&soc->num_tx_outstanding); 397 qdf_atomic_init(&soc->num_tx_exception); 398 soc->num_tx_allowed = 399 wlan_cfg_get_dp_soc_tx_device_limit(soc->wlan_cfg_ctx); 400 401 if (soc->cdp_soc.ol_ops->get_dp_cfg_param) { 402 int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc, 403 CDP_CFG_MAX_PEER_ID); 404 405 if (ret != -EINVAL) 406 wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret); 407 408 ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc, 409 CDP_CFG_CCE_DISABLE); 410 if (ret == 1) 411 soc->cce_disable = true; 412 } 413 414 /* setup the global rx defrag waitlist */ 415 TAILQ_INIT(&soc->rx.defrag.waitlist); 416 soc->rx.defrag.timeout_ms = 417 wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx); 418 soc->rx.defrag.next_flush_ms = 0; 419 soc->rx.flags.defrag_timeout_check = 420 wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx); 421 qdf_spinlock_create(&soc->rx.defrag.defrag_lock); 422 423 dp_monitor_soc_init(soc); 424 425 qdf_atomic_set(&soc->cmn_init_done, 1); 426 427 qdf_nbuf_queue_init(&soc->htt_stats.msg); 428 429 qdf_spinlock_create(&soc->ast_lock); 430 dp_peer_mec_spinlock_create(soc); 431 432 qdf_nbuf_queue_init(&soc->invalid_buf_queue); 433 434 TAILQ_INIT(&soc->inactive_peer_list); 435 qdf_spinlock_create(&soc->inactive_peer_list_lock); 436 TAILQ_INIT(&soc->inactive_vdev_list); 437 qdf_spinlock_create(&soc->inactive_vdev_list_lock); 438 qdf_spinlock_create(&soc->htt_stats.lock); 439 /* initialize work queue for stats processing */ 440 qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc); 441 442 /*Register RX offload flush handlers*/ 443 hif_offld_flush_cb_register(soc->hif_handle, dp_rx_data_flush); 444 445 dp_info("Mem stats: DMA = %u HEAP = %u SKB = %u", 446 qdf_dma_mem_stats_read(), 447 qdf_heap_mem_stats_read(), 448 qdf_skb_total_mem_stats_read()); 449 450 soc->vdev_stats_id_map = 0; 451 452 return soc; 453 fail5: 454 htt_soc_htc_dealloc(soc->htt_handle); 455 fail4: 456 dp_soc_srng_deinit(soc); 457 fail3: 458 htt_htc_pkt_pool_free(htt_soc); 459 fail2: 460 htt_soc_detach(htt_soc); 461 fail1: 462 return NULL; 463 } 464 465 /** 466 * dp_pdev_fill_tx_endpoint_info_rh() - Prefill fixed TX endpoint information 467 * that is used during packet transmit 468 * @pdev: Handle to DP pdev struct 469 * 470 * Return: QDF_STATUS_SUCCESS/QDF_STATUS_E_NOENT 471 */ 472 static QDF_STATUS dp_pdev_fill_tx_endpoint_info_rh(struct dp_pdev *pdev) 473 { 474 struct dp_pdev_rh *rh_pdev = dp_get_rh_pdev_from_dp_pdev(pdev); 475 struct dp_soc_rh *rh_soc = dp_get_rh_soc_from_dp_soc(pdev->soc); 476 struct dp_tx_ep_info_rh *tx_ep_info = &rh_pdev->tx_ep_info; 477 struct hif_opaque_softc *hif_handle = pdev->soc->hif_handle; 478 int ul_is_polled, dl_is_polled; 479 uint8_t ul_pipe, dl_pipe; 480 int status; 481 482 status = hif_map_service_to_pipe(hif_handle, HTT_DATA2_MSG_SVC, 483 &ul_pipe, &dl_pipe, 484 &ul_is_polled, &dl_is_polled); 485 if (status) { 486 hif_err("Failed to map tx pipe: %d", status); 487 return QDF_STATUS_E_NOENT; 488 } 489 490 tx_ep_info->ce_tx_hdl = hif_get_ce_handle(hif_handle, ul_pipe); 491 492 tx_ep_info->download_len = HAL_TX_DESC_LEN_BYTES + 493 sizeof(struct tlv_32_hdr) + 494 DP_RH_TX_HDR_SIZE_OUTER_HDR_MAX + 495 DP_RH_TX_HDR_SIZE_802_1Q + 496 DP_RH_TX_HDR_SIZE_LLC_SNAP + 497 DP_RH_TX_HDR_SIZE_IP; 498 499 tx_ep_info->tx_endpoint = rh_soc->tx_endpoint; 500 501 return QDF_STATUS_SUCCESS; 502 } 503 504 static QDF_STATUS dp_pdev_attach_rh(struct dp_pdev *pdev, 505 struct cdp_pdev_attach_params *params) 506 { 507 return dp_pdev_fill_tx_endpoint_info_rh(pdev); 508 } 509 510 static QDF_STATUS dp_pdev_detach_rh(struct dp_pdev *pdev) 511 { 512 return QDF_STATUS_SUCCESS; 513 } 514 515 static QDF_STATUS dp_vdev_attach_rh(struct dp_soc *soc, struct dp_vdev *vdev) 516 { 517 return QDF_STATUS_SUCCESS; 518 } 519 520 static QDF_STATUS dp_vdev_detach_rh(struct dp_soc *soc, struct dp_vdev *vdev) 521 { 522 return QDF_STATUS_SUCCESS; 523 } 524 525 qdf_size_t dp_get_soc_context_size_rh(void) 526 { 527 return sizeof(struct dp_soc_rh); 528 } 529 530 #ifdef NO_RX_PKT_HDR_TLV 531 /** 532 * dp_rxdma_ring_sel_cfg_rh() - Setup RXDMA ring config 533 * @soc: Common DP soc handle 534 * 535 * Return: QDF_STATUS 536 */ 537 static QDF_STATUS 538 dp_rxdma_ring_sel_cfg_rh(struct dp_soc *soc) 539 { 540 int i; 541 int mac_id; 542 struct htt_rx_ring_tlv_filter htt_tlv_filter = {0}; 543 struct dp_srng *rx_mac_srng; 544 QDF_STATUS status = QDF_STATUS_SUCCESS; 545 546 htt_tlv_filter.mpdu_start = 1; 547 htt_tlv_filter.msdu_start = 1; 548 htt_tlv_filter.mpdu_end = 1; 549 htt_tlv_filter.msdu_end = 1; 550 htt_tlv_filter.attention = 1; 551 htt_tlv_filter.packet = 1; 552 htt_tlv_filter.packet_header = 0; 553 554 htt_tlv_filter.ppdu_start = 0; 555 htt_tlv_filter.ppdu_end = 0; 556 htt_tlv_filter.ppdu_end_user_stats = 0; 557 htt_tlv_filter.ppdu_end_user_stats_ext = 0; 558 htt_tlv_filter.ppdu_end_status_done = 0; 559 htt_tlv_filter.enable_fp = 1; 560 htt_tlv_filter.enable_md = 0; 561 htt_tlv_filter.enable_md = 0; 562 htt_tlv_filter.enable_mo = 0; 563 564 htt_tlv_filter.fp_mgmt_filter = 0; 565 htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ; 566 htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST | 567 FILTER_DATA_MCAST | 568 FILTER_DATA_DATA); 569 htt_tlv_filter.mo_mgmt_filter = 0; 570 htt_tlv_filter.mo_ctrl_filter = 0; 571 htt_tlv_filter.mo_data_filter = 0; 572 htt_tlv_filter.md_data_filter = 0; 573 574 htt_tlv_filter.offset_valid = true; 575 576 htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size; 577 /*Not subscribing rx_pkt_header*/ 578 htt_tlv_filter.rx_header_offset = 0; 579 htt_tlv_filter.rx_mpdu_start_offset = 580 hal_rx_mpdu_start_offset_get(soc->hal_soc); 581 htt_tlv_filter.rx_mpdu_end_offset = 582 hal_rx_mpdu_end_offset_get(soc->hal_soc); 583 htt_tlv_filter.rx_msdu_start_offset = 584 hal_rx_msdu_start_offset_get(soc->hal_soc); 585 htt_tlv_filter.rx_msdu_end_offset = 586 hal_rx_msdu_end_offset_get(soc->hal_soc); 587 htt_tlv_filter.rx_attn_offset = 588 hal_rx_attn_offset_get(soc->hal_soc); 589 590 for (i = 0; i < MAX_PDEV_CNT; i++) { 591 struct dp_pdev *pdev = soc->pdev_list[i]; 592 593 if (!pdev) 594 continue; 595 596 for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) { 597 int mac_for_pdev = 598 dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id); 599 /* 600 * Obtain lmac id from pdev to access the LMAC ring 601 * in soc context 602 */ 603 int lmac_id = 604 dp_get_lmac_id_for_pdev_id(soc, mac_id, 605 pdev->pdev_id); 606 607 rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id); 608 htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev, 609 rx_mac_srng->hal_srng, 610 RXDMA_BUF, RX_DATA_BUFFER_SIZE, 611 &htt_tlv_filter); 612 } 613 } 614 615 if (QDF_IS_STATUS_SUCCESS(status)) 616 status = dp_htt_h2t_rx_ring_rfs_cfg(soc->htt_handle); 617 618 return status; 619 } 620 #else 621 622 static QDF_STATUS 623 dp_rxdma_ring_sel_cfg_rh(struct dp_soc *soc) 624 { 625 int i; 626 int mac_id; 627 struct htt_rx_ring_tlv_filter htt_tlv_filter = {0}; 628 struct dp_srng *rx_mac_srng; 629 QDF_STATUS status = QDF_STATUS_SUCCESS; 630 631 htt_tlv_filter.mpdu_start = 1; 632 htt_tlv_filter.msdu_start = 1; 633 htt_tlv_filter.mpdu_end = 1; 634 htt_tlv_filter.msdu_end = 1; 635 htt_tlv_filter.attention = 1; 636 htt_tlv_filter.packet = 1; 637 htt_tlv_filter.packet_header = 1; 638 639 htt_tlv_filter.ppdu_start = 0; 640 htt_tlv_filter.ppdu_end = 0; 641 htt_tlv_filter.ppdu_end_user_stats = 0; 642 htt_tlv_filter.ppdu_end_user_stats_ext = 0; 643 htt_tlv_filter.ppdu_end_status_done = 0; 644 htt_tlv_filter.enable_fp = 1; 645 htt_tlv_filter.enable_md = 0; 646 htt_tlv_filter.enable_md = 0; 647 htt_tlv_filter.enable_mo = 0; 648 649 htt_tlv_filter.fp_mgmt_filter = 0; 650 htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ; 651 htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST | 652 FILTER_DATA_MCAST | 653 FILTER_DATA_DATA); 654 htt_tlv_filter.mo_mgmt_filter = 0; 655 htt_tlv_filter.mo_ctrl_filter = 0; 656 htt_tlv_filter.mo_data_filter = 0; 657 htt_tlv_filter.md_data_filter = 0; 658 659 htt_tlv_filter.offset_valid = true; 660 661 htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size; 662 htt_tlv_filter.rx_header_offset = 663 hal_rx_pkt_tlv_offset_get(soc->hal_soc); 664 htt_tlv_filter.rx_mpdu_start_offset = 665 hal_rx_mpdu_start_offset_get(soc->hal_soc); 666 htt_tlv_filter.rx_mpdu_end_offset = 667 hal_rx_mpdu_end_offset_get(soc->hal_soc); 668 htt_tlv_filter.rx_msdu_start_offset = 669 hal_rx_msdu_start_offset_get(soc->hal_soc); 670 htt_tlv_filter.rx_msdu_end_offset = 671 hal_rx_msdu_end_offset_get(soc->hal_soc); 672 htt_tlv_filter.rx_attn_offset = 673 hal_rx_attn_offset_get(soc->hal_soc); 674 675 for (i = 0; i < MAX_PDEV_CNT; i++) { 676 struct dp_pdev *pdev = soc->pdev_list[i]; 677 678 if (!pdev) 679 continue; 680 681 for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) { 682 int mac_for_pdev = 683 dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id); 684 /* 685 * Obtain lmac id from pdev to access the LMAC ring 686 * in soc context 687 */ 688 int lmac_id = 689 dp_get_lmac_id_for_pdev_id(soc, mac_id, 690 pdev->pdev_id); 691 692 rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id); 693 htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev, 694 rx_mac_srng->hal_srng, 695 RXDMA_BUF, RX_DATA_BUFFER_SIZE, 696 &htt_tlv_filter); 697 } 698 } 699 700 if (QDF_IS_STATUS_SUCCESS(status)) 701 status = dp_htt_h2t_rx_ring_rfs_cfg(soc->htt_handle); 702 703 return status; 704 } 705 #endif 706 707 static void dp_soc_srng_deinit_rh(struct dp_soc *soc) 708 { 709 } 710 711 static void dp_soc_srng_free_rh(struct dp_soc *soc) 712 { 713 } 714 715 static QDF_STATUS dp_soc_srng_alloc_rh(struct dp_soc *soc) 716 { 717 return QDF_STATUS_SUCCESS; 718 } 719 720 static QDF_STATUS dp_soc_srng_init_rh(struct dp_soc *soc) 721 { 722 return QDF_STATUS_SUCCESS; 723 } 724 725 static void dp_tx_implicit_rbm_set_rh(struct dp_soc *soc, 726 uint8_t tx_ring_id, 727 uint8_t bm_id) 728 { 729 } 730 731 static QDF_STATUS dp_txrx_set_vdev_param_rh(struct dp_soc *soc, 732 struct dp_vdev *vdev, 733 enum cdp_vdev_param_type param, 734 cdp_config_param_type val) 735 { 736 return QDF_STATUS_SUCCESS; 737 } 738 739 static void dp_get_rx_hash_key_rh(struct dp_soc *soc, 740 struct cdp_lro_hash_config *lro_hash) 741 { 742 dp_get_rx_hash_key_bytes(lro_hash); 743 } 744 745 #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM) 746 static void dp_update_ring_hptp_rh(struct dp_soc *soc, bool force_flush) 747 { 748 struct dp_pdev_rh *rh_pdev = 749 dp_get_rh_pdev_from_dp_pdev(soc->pdev_list[0]); 750 struct dp_tx_ep_info_rh *tx_ep_info = &rh_pdev->tx_ep_info; 751 752 ce_flush_tx_ring_write_idx(tx_ep_info->ce_tx_hdl, force_flush); 753 } 754 #endif 755 756 void dp_initialize_arch_ops_rh(struct dp_arch_ops *arch_ops) 757 { 758 arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_rh; 759 arch_ops->tx_comp_get_params_from_hal_desc = 760 dp_tx_comp_get_params_from_hal_desc_rh; 761 arch_ops->dp_tx_process_htt_completion = 762 dp_tx_process_htt_completion_rh; 763 arch_ops->dp_wbm_get_rx_desc_from_hal_desc = 764 dp_wbm_get_rx_desc_from_hal_desc_rh; 765 arch_ops->dp_tx_desc_pool_alloc = dp_tx_desc_pool_alloc_rh; 766 arch_ops->dp_tx_desc_pool_free = dp_tx_desc_pool_free_rh; 767 arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_rh; 768 arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_rh; 769 arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_rh; 770 arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_rh; 771 arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_rh; 772 arch_ops->txrx_get_context_size = dp_get_context_size_rh; 773 arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_rh; 774 arch_ops->txrx_soc_attach = dp_soc_attach_rh; 775 arch_ops->txrx_soc_detach = dp_soc_detach_rh; 776 arch_ops->txrx_soc_init = dp_soc_init_rh; 777 arch_ops->txrx_soc_deinit = dp_soc_deinit_rh; 778 arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_rh; 779 arch_ops->txrx_soc_srng_init = dp_soc_srng_init_rh; 780 arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_rh; 781 arch_ops->txrx_soc_srng_free = dp_soc_srng_free_rh; 782 arch_ops->txrx_pdev_attach = dp_pdev_attach_rh; 783 arch_ops->txrx_pdev_detach = dp_pdev_detach_rh; 784 arch_ops->txrx_vdev_attach = dp_vdev_attach_rh; 785 arch_ops->txrx_vdev_detach = dp_vdev_detach_rh; 786 arch_ops->txrx_peer_map_attach = dp_peer_map_attach_rh; 787 arch_ops->txrx_peer_map_detach = dp_peer_map_detach_rh; 788 arch_ops->get_rx_hash_key = dp_get_rx_hash_key_rh; 789 arch_ops->dp_rx_desc_cookie_2_va = 790 dp_rx_desc_cookie_2_va_rh; 791 arch_ops->dp_rx_intrabss_mcast_handler = 792 dp_rx_intrabss_handle_nawds_rh; 793 arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_rh; 794 arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_rh; 795 arch_ops->dp_rx_peer_metadata_peer_id_get = 796 dp_rx_peer_metadata_peer_id_get_rh; 797 arch_ops->soc_cfg_attach = dp_soc_cfg_attach_rh; 798 arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_rh; 799 arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_rh; 800 arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_rh; 801 arch_ops->dp_peer_rx_reorder_queue_setup = 802 dp_peer_rx_reorder_queue_setup_rh; 803 arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_rh; 804 arch_ops->reo_remap_config = dp_reo_remap_config_rh; 805 arch_ops->txrx_peer_setup = dp_peer_setup_rh; 806 arch_ops->txrx_srng_init = dp_srng_init_rh; 807 #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM) 808 arch_ops->dp_update_ring_hptp = dp_update_ring_hptp_rh; 809 #endif 810 arch_ops->dp_flush_tx_ring = dp_flush_tx_ring_rh; 811 } 812