1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include "dp_types.h" 20 #include <dp_internal.h> 21 #include <dp_htt.h> 22 #include "dp_rh.h" 23 #include "dp_rh_tx.h" 24 #include "dp_rh_htt.h" 25 #include "dp_tx_desc.h" 26 #include "dp_rh_rx.h" 27 #include "dp_peer.h" 28 #include <wlan_utility.h> 29 #include <dp_rings.h> 30 #include <ce_api.h> 31 #include <ce_internal.h> 32 33 static QDF_STATUS 34 dp_srng_init_rh(struct dp_soc *soc, struct dp_srng *srng, int ring_type, 35 int ring_num, int mac_id) 36 { 37 hal_soc_handle_t hal_soc = soc->hal_soc; 38 struct hal_srng_params ring_params; 39 40 if (srng->hal_srng) { 41 dp_init_err("%pK: Ring type: %d, num:%d is already initialized", 42 soc, ring_type, ring_num); 43 return QDF_STATUS_SUCCESS; 44 } 45 46 /* memset the srng ring to zero */ 47 qdf_mem_zero(srng->base_vaddr_unaligned, srng->alloc_size); 48 49 qdf_mem_zero(&ring_params, sizeof(struct hal_srng_params)); 50 ring_params.ring_base_paddr = srng->base_paddr_aligned; 51 ring_params.ring_base_vaddr = srng->base_vaddr_aligned; 52 53 ring_params.num_entries = srng->num_entries; 54 55 dp_info("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u", 56 ring_type, ring_num, 57 (void *)ring_params.ring_base_vaddr, 58 (void *)ring_params.ring_base_paddr, 59 ring_params.num_entries); 60 61 if (soc->cdp_soc.ol_ops->get_con_mode && 62 soc->cdp_soc.ol_ops->get_con_mode() == 63 QDF_GLOBAL_MONITOR_MODE) { 64 if (soc->intr_mode == DP_INTR_MSI && 65 !dp_skip_msi_cfg(soc, ring_type)) { 66 dp_srng_msi_setup(soc, srng, &ring_params, 67 ring_type, ring_num); 68 dp_verbose_debug("Using MSI for ring_type: %d, ring_num %d", 69 ring_type, ring_num); 70 } else { 71 ring_params.msi_data = 0; 72 ring_params.msi_addr = 0; 73 dp_srng_set_msi2_ring_params(soc, &ring_params, 0, 0); 74 dp_verbose_debug("Skipping MSI for ring_type: %d, ring_num %d", 75 ring_type, ring_num); 76 } 77 78 dp_srng_configure_interrupt_thresholds(soc, &ring_params, 79 ring_type, ring_num, 80 srng->num_entries); 81 } 82 83 srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num, 84 mac_id, &ring_params, 0); 85 86 if (!srng->hal_srng) { 87 dp_srng_free(soc, srng); 88 return QDF_STATUS_E_FAILURE; 89 } 90 91 return QDF_STATUS_SUCCESS; 92 } 93 94 static QDF_STATUS 95 dp_peer_setup_rh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id, 96 uint8_t *peer_mac, 97 struct cdp_peer_setup_info *setup_info) 98 { 99 struct dp_soc *soc = (struct dp_soc *)soc_hdl; 100 struct dp_pdev *pdev; 101 QDF_STATUS status = QDF_STATUS_SUCCESS; 102 struct dp_vdev *vdev = NULL; 103 struct dp_peer *peer = 104 dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id, 105 DP_MOD_ID_CDP); 106 enum wlan_op_mode vdev_opmode; 107 108 if (!peer) 109 return QDF_STATUS_E_FAILURE; 110 111 vdev = peer->vdev; 112 if (!vdev) { 113 status = QDF_STATUS_E_FAILURE; 114 goto fail; 115 } 116 117 /* save vdev related member in case vdev freed */ 118 vdev_opmode = vdev->opmode; 119 pdev = vdev->pdev; 120 121 dp_info("pdev: %d vdev :%d opmode:%u", 122 pdev->pdev_id, vdev->vdev_id, vdev->opmode); 123 124 /* 125 * There are corner cases where the AD1 = AD2 = "VAPs address" 126 * i.e both the devices have same MAC address. In these 127 * cases we want such pkts to be processed in NULL Q handler 128 * which is REO2TCL ring. for this reason we should 129 * not setup reo_queues and default route for bss_peer. 130 */ 131 dp_monitor_peer_tx_init(pdev, peer); 132 133 if (!setup_info) 134 if (dp_peer_legacy_setup(soc, peer) != 135 QDF_STATUS_SUCCESS) { 136 status = QDF_STATUS_E_RESOURCES; 137 goto fail; 138 } 139 140 if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap) { 141 status = QDF_STATUS_E_FAILURE; 142 goto fail; 143 } 144 145 if (vdev_opmode != wlan_op_mode_monitor) 146 dp_peer_rx_init(pdev, peer); 147 148 dp_peer_ppdu_delayed_ba_init(peer); 149 150 fail: 151 dp_peer_unref_delete(peer, DP_MOD_ID_CDP); 152 return status; 153 } 154 155 #ifdef AST_OFFLOAD_ENABLE 156 static void dp_peer_map_detach_rh(struct dp_soc *soc) 157 { 158 dp_soc_wds_detach(soc); 159 dp_peer_ast_table_detach(soc); 160 dp_peer_ast_hash_detach(soc); 161 dp_peer_mec_hash_detach(soc); 162 } 163 164 static QDF_STATUS dp_peer_map_attach_rh(struct dp_soc *soc) 165 { 166 QDF_STATUS status; 167 168 soc->max_peer_id = soc->max_peers; 169 170 status = dp_peer_ast_table_attach(soc); 171 if (!QDF_IS_STATUS_SUCCESS(status)) 172 return status; 173 174 status = dp_peer_ast_hash_attach(soc); 175 if (!QDF_IS_STATUS_SUCCESS(status)) 176 goto ast_table_detach; 177 178 status = dp_peer_mec_hash_attach(soc); 179 if (!QDF_IS_STATUS_SUCCESS(status)) 180 goto hash_detach; 181 182 dp_soc_wds_attach(soc); 183 184 return QDF_STATUS_SUCCESS; 185 186 hash_detach: 187 dp_peer_ast_hash_detach(soc); 188 ast_table_detach: 189 dp_peer_ast_table_detach(soc); 190 191 return status; 192 } 193 #else 194 static void dp_peer_map_detach_rh(struct dp_soc *soc) 195 { 196 } 197 198 static QDF_STATUS dp_peer_map_attach_rh(struct dp_soc *soc) 199 { 200 soc->max_peer_id = soc->max_peers; 201 202 return QDF_STATUS_SUCCESS; 203 } 204 #endif 205 206 /** 207 * dp_soc_cfg_init_rh() - initialize target specific configuration 208 * during dp_soc_init 209 * @soc: dp soc handle 210 */ 211 static void dp_soc_cfg_init_rh(struct dp_soc *soc) 212 { 213 uint32_t target_type; 214 215 target_type = hal_get_target_type(soc->hal_soc); 216 switch (target_type) { 217 case TARGET_TYPE_WCN6450: 218 wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true); 219 soc->ast_override_support = 1; 220 soc->wlan_cfg_ctx->rxdma1_enable = 0; 221 break; 222 default: 223 qdf_print("%s: Unknown tgt type %d\n", __func__, target_type); 224 qdf_assert_always(0); 225 break; 226 } 227 } 228 229 static void dp_soc_cfg_attach_rh(struct dp_soc *soc) 230 { 231 int target_type; 232 233 target_type = hal_get_target_type(soc->hal_soc); 234 switch (target_type) { 235 case TARGET_TYPE_WCN6450: 236 soc->wlan_cfg_ctx->rxdma1_enable = 0; 237 break; 238 default: 239 qdf_print("%s: Unknown tgt type %d\n", __func__, target_type); 240 qdf_assert_always(0); 241 break; 242 } 243 244 /* 245 * keeping TCL and completion rings number, this data 246 * is equivalent number of TX interface rings. 247 */ 248 soc->num_tx_comp_rings = 249 wlan_cfg_num_tx_comp_rings(soc->wlan_cfg_ctx); 250 soc->num_tcl_data_rings = 251 wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx); 252 } 253 254 qdf_size_t dp_get_context_size_rh(enum dp_context_type context_type) 255 { 256 switch (context_type) { 257 case DP_CONTEXT_TYPE_SOC: 258 return sizeof(struct dp_soc_rh); 259 case DP_CONTEXT_TYPE_PDEV: 260 return sizeof(struct dp_pdev_rh); 261 case DP_CONTEXT_TYPE_VDEV: 262 return sizeof(struct dp_vdev_rh); 263 case DP_CONTEXT_TYPE_PEER: 264 return sizeof(struct dp_peer_rh); 265 default: 266 return 0; 267 } 268 } 269 270 qdf_size_t dp_mon_get_context_size_rh(enum dp_context_type context_type) 271 { 272 switch (context_type) { 273 case DP_CONTEXT_TYPE_MON_PDEV: 274 return sizeof(struct dp_mon_pdev_rh); 275 case DP_CONTEXT_TYPE_MON_SOC: 276 return sizeof(struct dp_mon_soc_rh); 277 default: 278 return 0; 279 } 280 } 281 282 static QDF_STATUS dp_soc_attach_rh(struct dp_soc *soc, 283 struct cdp_soc_attach_params *params) 284 { 285 soc->wbm_sw0_bm_id = hal_tx_get_wbm_sw0_bm_id(); 286 return QDF_STATUS_SUCCESS; 287 } 288 289 static QDF_STATUS dp_soc_detach_rh(struct dp_soc *soc) 290 { 291 return QDF_STATUS_SUCCESS; 292 } 293 294 static QDF_STATUS dp_soc_deinit_rh(struct dp_soc *soc) 295 { 296 struct htt_soc *htt_soc = soc->htt_handle; 297 298 qdf_atomic_set(&soc->cmn_init_done, 0); 299 300 /*Degister RX offload flush handlers*/ 301 hif_offld_flush_cb_deregister(soc->hif_handle); 302 303 dp_monitor_soc_deinit(soc); 304 305 /* free peer tables & AST tables allocated during peer_map_attach */ 306 if (soc->peer_map_attach_success) { 307 dp_peer_find_detach(soc); 308 dp_peer_map_detach_rh(soc); 309 soc->peer_map_attach_success = FALSE; 310 } 311 312 qdf_flush_work(&soc->htt_stats.work); 313 qdf_disable_work(&soc->htt_stats.work); 314 315 qdf_spinlock_destroy(&soc->htt_stats.lock); 316 317 qdf_spinlock_destroy(&soc->ast_lock); 318 319 dp_peer_mec_spinlock_destroy(soc); 320 321 qdf_nbuf_queue_free(&soc->htt_stats.msg); 322 323 qdf_nbuf_queue_free(&soc->invalid_buf_queue); 324 325 qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock); 326 327 qdf_spinlock_destroy(&soc->vdev_map_lock); 328 329 dp_soc_tx_desc_sw_pools_deinit(soc); 330 331 dp_soc_srng_deinit(soc); 332 333 dp_hw_link_desc_ring_deinit(soc); 334 335 dp_soc_print_inactive_objects(soc); 336 qdf_spinlock_destroy(&soc->inactive_peer_list_lock); 337 qdf_spinlock_destroy(&soc->inactive_vdev_list_lock); 338 339 htt_soc_htc_dealloc(soc->htt_handle); 340 341 htt_soc_detach(htt_soc); 342 343 wlan_minidump_remove(soc, sizeof(*soc), soc->ctrl_psoc, 344 WLAN_MD_DP_SOC, "dp_soc"); 345 346 return QDF_STATUS_SUCCESS; 347 } 348 349 static void *dp_soc_init_rh(struct dp_soc *soc, HTC_HANDLE htc_handle, 350 struct hif_opaque_softc *hif_handle) 351 { 352 struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle; 353 bool is_monitor_mode = false; 354 uint8_t i; 355 356 wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc, 357 WLAN_MD_DP_SOC, "dp_soc"); 358 359 soc->hif_handle = hif_handle; 360 361 soc->hal_soc = hif_get_hal_handle(soc->hif_handle); 362 if (!soc->hal_soc) 363 goto fail1; 364 365 htt_soc = htt_soc_attach(soc, htc_handle); 366 if (!htt_soc) 367 goto fail1; 368 369 soc->htt_handle = htt_soc; 370 371 if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS) 372 goto fail2; 373 374 htt_set_htc_handle(htt_soc, htc_handle); 375 376 dp_soc_cfg_init_rh(soc); 377 378 dp_monitor_soc_cfg_init(soc); 379 380 /* Note: Any SRNG ring initialization should happen only after 381 * Interrupt mode is set and followed by filling up the 382 * interrupt mask. IT SHOULD ALWAYS BE IN THIS ORDER. 383 */ 384 dp_soc_set_interrupt_mode(soc); 385 if (soc->cdp_soc.ol_ops->get_con_mode && 386 soc->cdp_soc.ol_ops->get_con_mode() == 387 QDF_GLOBAL_MONITOR_MODE) 388 is_monitor_mode = true; 389 390 if (is_monitor_mode) 391 wlan_cfg_fill_interrupt_mask(soc->wlan_cfg_ctx, 0, 392 soc->intr_mode, is_monitor_mode, 393 false, soc->umac_reset_supported); 394 if (dp_soc_srng_init(soc)) { 395 dp_init_err("%pK: dp_soc_srng_init failed", soc); 396 goto fail3; 397 } 398 399 if (dp_htt_soc_initialize_rh(soc->htt_handle, soc->ctrl_psoc, 400 htt_get_htc_handle(htt_soc), 401 soc->hal_soc, soc->osdev) == NULL) 402 goto fail4; 403 404 /* Initialize descriptors in TCL Rings */ 405 for (i = 0; i < soc->num_tcl_data_rings; i++) { 406 hal_tx_init_data_ring(soc->hal_soc, 407 soc->tcl_data_ring[i].hal_srng); 408 } 409 410 if (dp_soc_tx_desc_sw_pools_init(soc)) { 411 dp_init_err("%pK: dp_tx_soc_attach failed", soc); 412 goto fail5; 413 } 414 415 wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, 416 cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH)); 417 soc->cce_disable = false; 418 soc->max_ast_ageout_count = MAX_AST_AGEOUT_COUNT; 419 420 soc->sta_mode_search_policy = DP_TX_ADDR_SEARCH_ADDR_POLICY; 421 qdf_mem_zero(&soc->vdev_id_map, sizeof(soc->vdev_id_map)); 422 qdf_spinlock_create(&soc->vdev_map_lock); 423 qdf_atomic_init(&soc->num_tx_outstanding); 424 qdf_atomic_init(&soc->num_tx_exception); 425 soc->num_tx_allowed = 426 wlan_cfg_get_dp_soc_tx_device_limit(soc->wlan_cfg_ctx); 427 428 if (soc->cdp_soc.ol_ops->get_dp_cfg_param) { 429 int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc, 430 CDP_CFG_MAX_PEER_ID); 431 432 if (ret != -EINVAL) 433 wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret); 434 435 ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc, 436 CDP_CFG_CCE_DISABLE); 437 if (ret == 1) 438 soc->cce_disable = true; 439 } 440 441 /* setup the global rx defrag waitlist */ 442 TAILQ_INIT(&soc->rx.defrag.waitlist); 443 soc->rx.defrag.timeout_ms = 444 wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx); 445 soc->rx.defrag.next_flush_ms = 0; 446 soc->rx.flags.defrag_timeout_check = 447 wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx); 448 qdf_spinlock_create(&soc->rx.defrag.defrag_lock); 449 450 dp_monitor_soc_init(soc); 451 452 qdf_atomic_set(&soc->cmn_init_done, 1); 453 454 qdf_nbuf_queue_init(&soc->htt_stats.msg); 455 456 qdf_spinlock_create(&soc->ast_lock); 457 dp_peer_mec_spinlock_create(soc); 458 459 qdf_nbuf_queue_init(&soc->invalid_buf_queue); 460 461 TAILQ_INIT(&soc->inactive_peer_list); 462 qdf_spinlock_create(&soc->inactive_peer_list_lock); 463 TAILQ_INIT(&soc->inactive_vdev_list); 464 qdf_spinlock_create(&soc->inactive_vdev_list_lock); 465 qdf_spinlock_create(&soc->htt_stats.lock); 466 /* initialize work queue for stats processing */ 467 qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc); 468 469 /*Register RX offload flush handlers*/ 470 hif_offld_flush_cb_register(soc->hif_handle, dp_rx_data_flush); 471 472 dp_info("Mem stats: DMA = %u HEAP = %u SKB = %u", 473 qdf_dma_mem_stats_read(), 474 qdf_heap_mem_stats_read(), 475 qdf_skb_total_mem_stats_read()); 476 477 soc->vdev_stats_id_map = 0; 478 479 return soc; 480 fail5: 481 htt_soc_htc_dealloc(soc->htt_handle); 482 fail4: 483 dp_soc_srng_deinit(soc); 484 fail3: 485 htt_htc_pkt_pool_free(htt_soc); 486 fail2: 487 htt_soc_detach(htt_soc); 488 fail1: 489 return NULL; 490 } 491 492 static void dp_soc_interrupt_detach_rh(struct cdp_soc_t *txrx_soc) 493 { 494 struct dp_soc *soc = (struct dp_soc *)txrx_soc; 495 int i; 496 497 if (soc->intr_mode == DP_INTR_POLL) { 498 qdf_timer_free(&soc->int_timer); 499 } else { 500 hif_deconfigure_ext_group_interrupts(soc->hif_handle); 501 hif_deregister_exec_group(soc->hif_handle, "dp_intr"); 502 } 503 504 for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) { 505 soc->intr_ctx[i].rx_mon_ring_mask = 0; 506 soc->intr_ctx[i].rxdma2host_ring_mask = 0; 507 508 hif_event_history_deinit(soc->hif_handle, i); 509 qdf_lro_deinit(soc->intr_ctx[i].lro_ctx); 510 } 511 512 qdf_mem_set(&soc->mon_intr_id_lmac_map, 513 sizeof(soc->mon_intr_id_lmac_map), 514 DP_MON_INVALID_LMAC_ID); 515 } 516 517 static QDF_STATUS dp_soc_interrupt_attach_rh(struct cdp_soc_t *txrx_soc) 518 { 519 struct dp_soc *soc = (struct dp_soc *)txrx_soc; 520 int i = 0; 521 int num_irq = 0; 522 int lmac_id = 0; 523 int napi_scale; 524 525 qdf_mem_set(&soc->mon_intr_id_lmac_map, 526 sizeof(soc->mon_intr_id_lmac_map), DP_MON_INVALID_LMAC_ID); 527 528 if (soc->cdp_soc.ol_ops->get_con_mode && 529 soc->cdp_soc.ol_ops->get_con_mode() != 530 QDF_GLOBAL_MONITOR_MODE) 531 return QDF_STATUS_SUCCESS; 532 533 for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) { 534 int ret = 0; 535 536 /* Map of IRQ ids registered with one interrupt context */ 537 int irq_id_map[HIF_MAX_GRP_IRQ]; 538 539 int rx_mon_mask = 540 dp_soc_get_mon_mask_for_interrupt_mode(soc, i); 541 int rxdma2host_ring_mask = 542 wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i); 543 544 soc->intr_ctx[i].dp_intr_id = i; 545 soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask; 546 soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask; 547 soc->intr_ctx[i].soc = soc; 548 549 num_irq = 0; 550 551 dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0], 552 &num_irq); 553 554 napi_scale = wlan_cfg_get_napi_scale_factor(soc->wlan_cfg_ctx); 555 if (!napi_scale) 556 napi_scale = QCA_NAPI_DEF_SCALE_BIN_SHIFT; 557 558 ret = hif_register_ext_group(soc->hif_handle, 559 num_irq, irq_id_map, dp_service_srngs_wrapper, 560 &soc->intr_ctx[i], "dp_intr", 561 HIF_EXEC_NAPI_TYPE, napi_scale); 562 563 dp_debug(" int ctx %u num_irq %u irq_id_map %u %u", 564 i, num_irq, irq_id_map[0], irq_id_map[1]); 565 566 if (ret) { 567 dp_init_err("%pK: failed, ret = %d", soc, ret); 568 dp_soc_interrupt_detach_rh(txrx_soc); 569 return QDF_STATUS_E_FAILURE; 570 } 571 572 hif_event_history_init(soc->hif_handle, i); 573 soc->intr_ctx[i].lro_ctx = qdf_lro_init(); 574 575 if (dp_is_mon_mask_valid(soc, &soc->intr_ctx[i])) { 576 soc->mon_intr_id_lmac_map[lmac_id] = i; 577 lmac_id++; 578 } 579 } 580 581 hif_configure_ext_group_interrupts(soc->hif_handle); 582 583 return QDF_STATUS_SUCCESS; 584 } 585 586 static QDF_STATUS dp_soc_attach_poll_rh(struct cdp_soc_t *txrx_soc) 587 { 588 struct dp_soc *soc = (struct dp_soc *)txrx_soc; 589 uint32_t lmac_id = 0; 590 int i; 591 592 qdf_mem_set(&soc->mon_intr_id_lmac_map, 593 sizeof(soc->mon_intr_id_lmac_map), DP_MON_INVALID_LMAC_ID); 594 soc->intr_mode = DP_INTR_POLL; 595 596 for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) { 597 soc->intr_ctx[i].rx_mon_ring_mask = 598 wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i); 599 600 if (dp_is_mon_mask_valid(soc, &soc->intr_ctx[i])) { 601 hif_event_history_init(soc->hif_handle, i); 602 soc->mon_intr_id_lmac_map[lmac_id] = i; 603 lmac_id++; 604 } 605 } 606 607 qdf_timer_init(soc->osdev, &soc->int_timer, 608 dp_interrupt_timer, (void *)soc, 609 QDF_TIMER_TYPE_WAKE_APPS); 610 611 return QDF_STATUS_SUCCESS; 612 } 613 614 static uint32_t dp_service_srngs_rh(void *dp_ctx, uint32_t dp_budget, int cpu) 615 { 616 struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx; 617 struct dp_soc *soc = int_ctx->soc; 618 uint32_t work_done = 0; 619 int budget = dp_budget; 620 uint32_t remaining_quota = dp_budget; 621 622 if (qdf_unlikely(!dp_monitor_is_vdev_timer_running(soc))) { 623 work_done = dp_process_lmac_rings(int_ctx, remaining_quota); 624 if (work_done) { 625 budget -= work_done; 626 if (budget <= 0) 627 goto budget_done; 628 remaining_quota = budget; 629 } 630 } 631 632 budget_done: 633 qdf_atomic_clear_bit(cpu, &soc->service_rings_running); 634 635 if (soc->notify_fw_callback) 636 soc->notify_fw_callback(soc); 637 638 return dp_budget - budget; 639 } 640 641 /** 642 * dp_pdev_fill_tx_endpoint_info_rh() - Prefill fixed TX endpoint information 643 * that is used during packet transmit 644 * @pdev: Handle to DP pdev struct 645 * 646 * Return: QDF_STATUS_SUCCESS/QDF_STATUS_E_NOENT 647 */ 648 static QDF_STATUS dp_pdev_fill_tx_endpoint_info_rh(struct dp_pdev *pdev) 649 { 650 struct dp_pdev_rh *rh_pdev = dp_get_rh_pdev_from_dp_pdev(pdev); 651 struct dp_soc_rh *rh_soc = dp_get_rh_soc_from_dp_soc(pdev->soc); 652 struct dp_tx_ep_info_rh *tx_ep_info = &rh_pdev->tx_ep_info; 653 struct hif_opaque_softc *hif_handle = pdev->soc->hif_handle; 654 int ul_is_polled, dl_is_polled; 655 uint8_t ul_pipe, dl_pipe; 656 int status; 657 658 status = hif_map_service_to_pipe(hif_handle, HTT_DATA2_MSG_SVC, 659 &ul_pipe, &dl_pipe, 660 &ul_is_polled, &dl_is_polled); 661 if (status) { 662 hif_err("Failed to map tx pipe: %d", status); 663 return QDF_STATUS_E_NOENT; 664 } 665 666 tx_ep_info->ce_tx_hdl = hif_get_ce_handle(hif_handle, ul_pipe); 667 668 tx_ep_info->download_len = HAL_TX_DESC_LEN_BYTES + 669 sizeof(struct tlv_32_hdr) + 670 DP_RH_TX_HDR_SIZE_OUTER_HDR_MAX + 671 DP_RH_TX_HDR_SIZE_802_1Q + 672 DP_RH_TX_HDR_SIZE_LLC_SNAP + 673 DP_RH_TX_HDR_SIZE_IP; 674 675 tx_ep_info->tx_endpoint = rh_soc->tx_endpoint; 676 677 return QDF_STATUS_SUCCESS; 678 } 679 680 static QDF_STATUS dp_pdev_attach_rh(struct dp_pdev *pdev, 681 struct cdp_pdev_attach_params *params) 682 { 683 return dp_pdev_fill_tx_endpoint_info_rh(pdev); 684 } 685 686 static QDF_STATUS dp_pdev_detach_rh(struct dp_pdev *pdev) 687 { 688 return QDF_STATUS_SUCCESS; 689 } 690 691 static QDF_STATUS dp_vdev_attach_rh(struct dp_soc *soc, struct dp_vdev *vdev) 692 { 693 return QDF_STATUS_SUCCESS; 694 } 695 696 static QDF_STATUS dp_vdev_detach_rh(struct dp_soc *soc, struct dp_vdev *vdev) 697 { 698 return QDF_STATUS_SUCCESS; 699 } 700 701 qdf_size_t dp_get_soc_context_size_rh(void) 702 { 703 return sizeof(struct dp_soc_rh); 704 } 705 706 #ifdef NO_RX_PKT_HDR_TLV 707 /** 708 * dp_rxdma_ring_sel_cfg_rh() - Setup RXDMA ring config 709 * @soc: Common DP soc handle 710 * 711 * Return: QDF_STATUS 712 */ 713 static QDF_STATUS 714 dp_rxdma_ring_sel_cfg_rh(struct dp_soc *soc) 715 { 716 int i; 717 int mac_id; 718 struct htt_rx_ring_tlv_filter htt_tlv_filter = {0}; 719 struct dp_srng *rx_mac_srng; 720 QDF_STATUS status = QDF_STATUS_SUCCESS; 721 uint16_t buf_size; 722 723 buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx); 724 725 htt_tlv_filter.mpdu_start = 1; 726 htt_tlv_filter.msdu_start = 1; 727 htt_tlv_filter.mpdu_end = 1; 728 htt_tlv_filter.msdu_end = 1; 729 htt_tlv_filter.attention = 1; 730 htt_tlv_filter.packet = 1; 731 htt_tlv_filter.packet_header = 0; 732 733 htt_tlv_filter.ppdu_start = 0; 734 htt_tlv_filter.ppdu_end = 0; 735 htt_tlv_filter.ppdu_end_user_stats = 0; 736 htt_tlv_filter.ppdu_end_user_stats_ext = 0; 737 htt_tlv_filter.ppdu_end_status_done = 0; 738 htt_tlv_filter.enable_fp = 1; 739 htt_tlv_filter.enable_md = 0; 740 htt_tlv_filter.enable_md = 0; 741 htt_tlv_filter.enable_mo = 0; 742 743 htt_tlv_filter.fp_mgmt_filter = 0; 744 htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ; 745 htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST | 746 FILTER_DATA_MCAST | 747 FILTER_DATA_DATA); 748 htt_tlv_filter.mo_mgmt_filter = 0; 749 htt_tlv_filter.mo_ctrl_filter = 0; 750 htt_tlv_filter.mo_data_filter = 0; 751 htt_tlv_filter.md_data_filter = 0; 752 753 htt_tlv_filter.offset_valid = true; 754 755 htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size; 756 /*Not subscribing rx_pkt_header*/ 757 htt_tlv_filter.rx_header_offset = 0; 758 htt_tlv_filter.rx_mpdu_start_offset = 759 hal_rx_mpdu_start_offset_get(soc->hal_soc); 760 htt_tlv_filter.rx_mpdu_end_offset = 761 hal_rx_mpdu_end_offset_get(soc->hal_soc); 762 htt_tlv_filter.rx_msdu_start_offset = 763 hal_rx_msdu_start_offset_get(soc->hal_soc); 764 htt_tlv_filter.rx_msdu_end_offset = 765 hal_rx_msdu_end_offset_get(soc->hal_soc); 766 htt_tlv_filter.rx_attn_offset = 767 hal_rx_attn_offset_get(soc->hal_soc); 768 769 for (i = 0; i < MAX_PDEV_CNT; i++) { 770 struct dp_pdev *pdev = soc->pdev_list[i]; 771 772 if (!pdev) 773 continue; 774 775 for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) { 776 int mac_for_pdev = 777 dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id); 778 /* 779 * Obtain lmac id from pdev to access the LMAC ring 780 * in soc context 781 */ 782 int lmac_id = 783 dp_get_lmac_id_for_pdev_id(soc, mac_id, 784 pdev->pdev_id); 785 786 rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id); 787 htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev, 788 rx_mac_srng->hal_srng, 789 RXDMA_BUF, buf_size, 790 &htt_tlv_filter); 791 } 792 } 793 794 if (QDF_IS_STATUS_SUCCESS(status)) 795 status = dp_htt_h2t_rx_ring_rfs_cfg(soc->htt_handle); 796 797 return status; 798 } 799 #else 800 801 static QDF_STATUS 802 dp_rxdma_ring_sel_cfg_rh(struct dp_soc *soc) 803 { 804 int i; 805 int mac_id; 806 struct htt_rx_ring_tlv_filter htt_tlv_filter = {0}; 807 struct dp_srng *rx_mac_srng; 808 QDF_STATUS status = QDF_STATUS_SUCCESS; 809 uint16_t buf_size; 810 811 buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx); 812 813 htt_tlv_filter.mpdu_start = 1; 814 htt_tlv_filter.msdu_start = 1; 815 htt_tlv_filter.mpdu_end = 1; 816 htt_tlv_filter.msdu_end = 1; 817 htt_tlv_filter.attention = 1; 818 htt_tlv_filter.packet = 1; 819 htt_tlv_filter.packet_header = 1; 820 821 htt_tlv_filter.ppdu_start = 0; 822 htt_tlv_filter.ppdu_end = 0; 823 htt_tlv_filter.ppdu_end_user_stats = 0; 824 htt_tlv_filter.ppdu_end_user_stats_ext = 0; 825 htt_tlv_filter.ppdu_end_status_done = 0; 826 htt_tlv_filter.enable_fp = 1; 827 htt_tlv_filter.enable_md = 0; 828 htt_tlv_filter.enable_md = 0; 829 htt_tlv_filter.enable_mo = 0; 830 831 htt_tlv_filter.fp_mgmt_filter = 0; 832 htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ; 833 htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST | 834 FILTER_DATA_MCAST | 835 FILTER_DATA_DATA); 836 htt_tlv_filter.mo_mgmt_filter = 0; 837 htt_tlv_filter.mo_ctrl_filter = 0; 838 htt_tlv_filter.mo_data_filter = 0; 839 htt_tlv_filter.md_data_filter = 0; 840 841 htt_tlv_filter.offset_valid = true; 842 843 htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size; 844 htt_tlv_filter.rx_header_offset = 845 hal_rx_pkt_tlv_offset_get(soc->hal_soc); 846 htt_tlv_filter.rx_mpdu_start_offset = 847 hal_rx_mpdu_start_offset_get(soc->hal_soc); 848 htt_tlv_filter.rx_mpdu_end_offset = 849 hal_rx_mpdu_end_offset_get(soc->hal_soc); 850 htt_tlv_filter.rx_msdu_start_offset = 851 hal_rx_msdu_start_offset_get(soc->hal_soc); 852 htt_tlv_filter.rx_msdu_end_offset = 853 hal_rx_msdu_end_offset_get(soc->hal_soc); 854 htt_tlv_filter.rx_attn_offset = 855 hal_rx_attn_offset_get(soc->hal_soc); 856 857 for (i = 0; i < MAX_PDEV_CNT; i++) { 858 struct dp_pdev *pdev = soc->pdev_list[i]; 859 860 if (!pdev) 861 continue; 862 863 for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) { 864 int mac_for_pdev = 865 dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id); 866 /* 867 * Obtain lmac id from pdev to access the LMAC ring 868 * in soc context 869 */ 870 int lmac_id = 871 dp_get_lmac_id_for_pdev_id(soc, mac_id, 872 pdev->pdev_id); 873 874 rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id); 875 htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev, 876 rx_mac_srng->hal_srng, 877 RXDMA_BUF, buf_size, 878 &htt_tlv_filter); 879 } 880 } 881 882 if (QDF_IS_STATUS_SUCCESS(status)) 883 status = dp_htt_h2t_rx_ring_rfs_cfg(soc->htt_handle); 884 885 return status; 886 } 887 #endif 888 889 static void dp_soc_srng_deinit_rh(struct dp_soc *soc) 890 { 891 } 892 893 static void dp_soc_srng_free_rh(struct dp_soc *soc) 894 { 895 } 896 897 static QDF_STATUS dp_soc_srng_alloc_rh(struct dp_soc *soc) 898 { 899 return QDF_STATUS_SUCCESS; 900 } 901 902 static QDF_STATUS dp_soc_srng_init_rh(struct dp_soc *soc) 903 { 904 return QDF_STATUS_SUCCESS; 905 } 906 907 static void dp_tx_implicit_rbm_set_rh(struct dp_soc *soc, 908 uint8_t tx_ring_id, 909 uint8_t bm_id) 910 { 911 } 912 913 static QDF_STATUS dp_txrx_set_vdev_param_rh(struct dp_soc *soc, 914 struct dp_vdev *vdev, 915 enum cdp_vdev_param_type param, 916 cdp_config_param_type val) 917 { 918 return QDF_STATUS_SUCCESS; 919 } 920 921 static void dp_get_rx_hash_key_rh(struct dp_soc *soc, 922 struct cdp_lro_hash_config *lro_hash) 923 { 924 dp_get_rx_hash_key_bytes(lro_hash); 925 } 926 927 #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM) 928 static void dp_update_ring_hptp_rh(struct dp_soc *soc, bool force_flush) 929 { 930 struct dp_pdev_rh *rh_pdev = 931 dp_get_rh_pdev_from_dp_pdev(soc->pdev_list[0]); 932 struct dp_tx_ep_info_rh *tx_ep_info = &rh_pdev->tx_ep_info; 933 934 ce_flush_tx_ring_write_idx(tx_ep_info->ce_tx_hdl, force_flush); 935 } 936 #endif 937 938 void dp_initialize_arch_ops_rh(struct dp_arch_ops *arch_ops) 939 { 940 arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_rh; 941 arch_ops->tx_comp_get_params_from_hal_desc = 942 dp_tx_comp_get_params_from_hal_desc_rh; 943 arch_ops->dp_tx_process_htt_completion = 944 dp_tx_process_htt_completion_rh; 945 arch_ops->dp_wbm_get_rx_desc_from_hal_desc = 946 dp_wbm_get_rx_desc_from_hal_desc_rh; 947 arch_ops->dp_tx_desc_pool_alloc = dp_tx_desc_pool_alloc_rh; 948 arch_ops->dp_tx_desc_pool_free = dp_tx_desc_pool_free_rh; 949 arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_rh; 950 arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_rh; 951 arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_rh; 952 arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_rh; 953 arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_rh; 954 arch_ops->txrx_get_context_size = dp_get_context_size_rh; 955 arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_rh; 956 arch_ops->txrx_soc_attach = dp_soc_attach_rh; 957 arch_ops->txrx_soc_detach = dp_soc_detach_rh; 958 arch_ops->txrx_soc_init = dp_soc_init_rh; 959 arch_ops->txrx_soc_deinit = dp_soc_deinit_rh; 960 arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_rh; 961 arch_ops->txrx_soc_srng_init = dp_soc_srng_init_rh; 962 arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_rh; 963 arch_ops->txrx_soc_srng_free = dp_soc_srng_free_rh; 964 arch_ops->txrx_pdev_attach = dp_pdev_attach_rh; 965 arch_ops->txrx_pdev_detach = dp_pdev_detach_rh; 966 arch_ops->txrx_vdev_attach = dp_vdev_attach_rh; 967 arch_ops->txrx_vdev_detach = dp_vdev_detach_rh; 968 arch_ops->txrx_peer_map_attach = dp_peer_map_attach_rh; 969 arch_ops->txrx_peer_map_detach = dp_peer_map_detach_rh; 970 arch_ops->get_rx_hash_key = dp_get_rx_hash_key_rh; 971 arch_ops->dp_rx_desc_cookie_2_va = 972 dp_rx_desc_cookie_2_va_rh; 973 arch_ops->dp_rx_intrabss_mcast_handler = 974 dp_rx_intrabss_handle_nawds_rh; 975 arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_rh; 976 arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_rh; 977 arch_ops->dp_rx_peer_metadata_peer_id_get = 978 dp_rx_peer_metadata_peer_id_get_rh; 979 arch_ops->soc_cfg_attach = dp_soc_cfg_attach_rh; 980 arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_rh; 981 arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_rh; 982 arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_rh; 983 arch_ops->dp_peer_rx_reorder_queue_setup = 984 dp_peer_rx_reorder_queue_setup_rh; 985 arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_rh; 986 arch_ops->reo_remap_config = dp_reo_remap_config_rh; 987 arch_ops->txrx_peer_setup = dp_peer_setup_rh; 988 arch_ops->txrx_srng_init = dp_srng_init_rh; 989 #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM) 990 arch_ops->dp_update_ring_hptp = dp_update_ring_hptp_rh; 991 #endif 992 arch_ops->dp_flush_tx_ring = dp_flush_tx_ring_rh; 993 arch_ops->dp_soc_interrupt_attach = dp_soc_interrupt_attach_rh; 994 arch_ops->dp_soc_attach_poll = dp_soc_attach_poll_rh; 995 arch_ops->dp_soc_interrupt_detach = dp_soc_interrupt_detach_rh; 996 arch_ops->dp_service_srngs = dp_service_srngs_rh; 997 } 998