1 /* 2 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _DP_TX_MON_2_0_H_ 19 #define _DP_TX_MON_2_0_H_ 20 21 #include <qdf_nbuf_frag.h> 22 #include <hal_be_api_mon.h> 23 24 struct dp_mon_desc; 25 26 /** 27 * struct dp_tx_mon_desc_list - structure to store descriptor linked list 28 * @desc_list: descriptor list 29 * @tail: descriptor list tail 30 * @tx_mon_reap_cnt: tx monitor reap count 31 */ 32 struct dp_tx_mon_desc_list { 33 union dp_mon_desc_list_elem_t *desc_list; 34 union dp_mon_desc_list_elem_t *tail; 35 uint32_t tx_mon_reap_cnt; 36 }; 37 38 /** 39 * dp_tx_mon_buffers_alloc() - allocate tx monitor buffers 40 * @soc: DP soc handle 41 * @size: buffer size 42 * 43 * Return: QDF_STATUS_SUCCESS: Success 44 * QDF_STATUS_E_FAILURE: Error 45 */ 46 QDF_STATUS 47 dp_tx_mon_buffers_alloc(struct dp_soc *soc, uint32_t size); 48 49 /** 50 * dp_tx_mon_buffers_free() - free tx monitor buffers 51 * @soc: dp soc handle 52 * 53 */ 54 void 55 dp_tx_mon_buffers_free(struct dp_soc *soc); 56 57 /** 58 * dp_tx_mon_buf_desc_pool_deinit() - deinit tx monitor descriptor pool 59 * @soc: dp soc handle 60 * 61 */ 62 void 63 dp_tx_mon_buf_desc_pool_deinit(struct dp_soc *soc); 64 65 /** 66 * dp_tx_mon_buf_desc_pool_init() - init tx monitor descriptor pool 67 * @soc: dp soc handle 68 * 69 * Return: QDF_STATUS_SUCCESS: Success 70 * QDF_STATUS_E_FAILURE: Error 71 */ 72 QDF_STATUS 73 dp_tx_mon_buf_desc_pool_init(struct dp_soc *soc); 74 75 /** 76 * dp_tx_mon_buf_desc_pool_free() - free tx monitor descriptor pool 77 * @soc: dp soc handle 78 * 79 */ 80 void dp_tx_mon_buf_desc_pool_free(struct dp_soc *soc); 81 82 /** 83 * dp_tx_mon_buf_desc_pool_alloc() - allocate tx monitor descriptor pool 84 * @soc: DP soc handle 85 * 86 * Return: QDF_STATUS_SUCCESS: Success 87 * QDF_STATUS_E_FAILURE: Error 88 */ 89 QDF_STATUS 90 dp_tx_mon_buf_desc_pool_alloc(struct dp_soc *soc); 91 92 /** 93 * dp_tx_mon_update_end_reason() - API to update end reason 94 * 95 * @mon_pdev: DP_MON_PDEV handle 96 * @ppdu_id: ppdu_id 97 * @end_reason: monitor destination descriptor end reason 98 * 99 * Return: void 100 */ 101 void dp_tx_mon_update_end_reason(struct dp_mon_pdev *mon_pdev, 102 int ppdu_id, int end_reason); 103 104 /** 105 * dp_tx_mon_status_free_packet_buf() - API to free packet buffer 106 * @pdev: pdev Handle 107 * @status_frag: status frag 108 * @end_offset: status fragment end offset 109 * @mon_desc_list_ref: tx monitor descriptor list reference 110 * 111 * Return: void 112 */ 113 void 114 dp_tx_mon_status_free_packet_buf(struct dp_pdev *pdev, 115 qdf_frag_t status_frag, 116 uint32_t end_offset, 117 struct dp_tx_mon_desc_list *mon_desc_list_ref); 118 119 /** 120 * dp_tx_process_pktlog_be() - process pktlog 121 * @soc: dp soc handle 122 * @pdev: dp pdev handle 123 * @status_frag: frag pointer which needs to be added to nbuf 124 * @end_offset: Offset in frag to be added to nbuf_frags 125 * 126 * Return: 127 * * 0 - OK to runtime suspend the device 128 * * -EINVAL - invalid argument 129 * * -ENOMEM - out of memory 130 */ 131 QDF_STATUS 132 dp_tx_process_pktlog_be(struct dp_soc *soc, struct dp_pdev *pdev, 133 void *status_frag, uint32_t end_offset); 134 /** 135 * dp_tx_mon_process_status_tlv() - API to processed TLV 136 * invoked from interrupt handler 137 * 138 * @soc: DP_SOC handle 139 * @pdev: DP_PDEV handle 140 * @mon_ring_desc: descriptor status info 141 * @status_frag: status buffer frag address 142 * @end_offset: end offset of buffer that has valid buffer 143 * @mon_desc_list_ref: tx monitor descriptor list reference 144 * 145 * Return: QDF_STATUS 146 */ 147 QDF_STATUS 148 dp_tx_mon_process_status_tlv(struct dp_soc *soc, 149 struct dp_pdev *pdev, 150 struct hal_mon_desc *mon_ring_desc, 151 qdf_frag_t status_frag, 152 uint32_t end_offset, 153 struct dp_tx_mon_desc_list *mon_desc_list_ref); 154 155 /** 156 * dp_tx_mon_process_2_0() - tx monitor interrupt process 157 * @soc: dp soc handle 158 * @int_ctx: interrupt context 159 * @mac_id: mac id 160 * @quota: quota to process 161 * 162 */ 163 uint32_t 164 dp_tx_mon_process_2_0(struct dp_soc *soc, struct dp_intr *int_ctx, 165 uint32_t mac_id, uint32_t quota); 166 167 /** 168 * dp_tx_mon_print_ring_stat_2_0() - Print monitor ring stats 169 * @pdev: dp pdev handle 170 * 171 */ 172 void 173 dp_tx_mon_print_ring_stat_2_0(struct dp_pdev *pdev); 174 175 /* The maximum buffer length allocated for radiotap for monitor status buffer */ 176 #define MAX_MONITOR_HEADER (512) 177 #define MAX_DUMMY_FRM_BODY (128) 178 179 #define MAX_STATUS_BUFFER_IN_PPDU (64) 180 #define TXMON_NO_BUFFER_SZ (64) 181 182 #define DP_BA_ACK_FRAME_SIZE (sizeof(struct ieee80211_ctlframe_addr2) + 36) 183 #define DP_ACK_FRAME_SIZE (sizeof(struct ieee80211_frame_min_one)) 184 #define DP_CTS_FRAME_SIZE (sizeof(struct ieee80211_frame_min_one)) 185 #define DP_ACKNOACK_FRAME_SIZE (sizeof(struct ieee80211_frame) + 16) 186 187 #define DP_IEEE80211_BAR_CTL_TID_S 12 188 #define DP_IEEE80211_BAR_CTL_TID_M 0xf 189 #define DP_IEEE80211_BAR_CTL_POLICY_S 0 190 #define DP_IEEE80211_BAR_CTL_POLICY_M 0x1 191 #define DP_IEEE80211_BA_S_SEQ_S 4 192 #define DP_IEEE80211_BAR_CTL_COMBA 0x0004 193 194 #define TXMON_PPDU(ppdu_info, field) ppdu_info->field 195 #define TXMON_PPDU_USR(ppdu_info, user_index, field) \ 196 ppdu_info->hal_txmon.rx_user_status[user_index].field 197 #define TXMON_PPDU_COM(ppdu_info, field) ppdu_info->hal_txmon.rx_status.field 198 #define TXMON_PPDU_HAL(ppdu_info, field) ppdu_info->hal_txmon.field 199 200 #define HE_DATA_CNT 6 201 202 #define INITIATOR_WINDOW 0 203 #define RESPONSE_WINDOW 1 204 205 /** 206 * enum bf_type - tx monitor supported Beamformed type 207 * @NO_BF: 208 * @LEGACY_BF: 209 * @SU_BF: 210 * @MU_BF: 211 */ 212 enum bf_type { 213 NO_BF = 0, 214 LEGACY_BF, 215 SU_BF, 216 MU_BF 217 }; 218 219 /** 220 * enum dot11b_preamble_type - tx monitor supported 11b preamble type 221 * @SHORT_PREAMBLE: 222 * @LONG_PREAMBLE: 223 */ 224 enum dot11b_preamble_type { 225 SHORT_PREAMBLE = 0, 226 LONG_PREAMBLE, 227 }; 228 229 /** 230 * enum bw_type - tx monitor supported bandwidth type 231 * @TXMON_BW_20_MHZ: 232 * @TXMON_BW_40_MHZ: 233 * @TXMON_BW_80_MHZ: 234 * @TXMON_BW_160_MHZ: 235 * @TXMON_BW_240_MHZ: 236 * @TXMON_BW_320_MHZ: 237 */ 238 enum bw_type { 239 TXMON_BW_20_MHZ = 0, 240 TXMON_BW_40_MHZ, 241 TXMON_BW_80_MHZ, 242 TXMON_BW_160_MHZ, 243 TXMON_BW_240_MHZ, 244 TXMON_BW_320_MHZ 245 }; 246 247 /** 248 * enum ppdu_start_reason - tx monitor supported PPDU start reason type 249 * @TXMON_FES_PROTECTION_FRAME: 250 * @TXMON_FES_AFTER_PROTECTION: 251 * @TXMON_FES_ONLY: 252 * @TXMON_RESPONSE_FRAME: 253 * @TXMON_TRIG_RESPONSE_FRAME: 254 * @TXMON_DYNAMIC_PROTECTION_FES_ONLY: 255 */ 256 enum ppdu_start_reason { 257 TXMON_FES_PROTECTION_FRAME, 258 TXMON_FES_AFTER_PROTECTION, 259 TXMON_FES_ONLY, 260 TXMON_RESPONSE_FRAME, 261 TXMON_TRIG_RESPONSE_FRAME, 262 TXMON_DYNAMIC_PROTECTION_FES_ONLY 263 }; 264 265 /** 266 * enum guard_interval - tx monitor supported Guard interval type 267 * @TXMON_GI_0_8_US: 268 * @TXMON_GI_0_4_US: 269 * @TXMON_GI_1_6_US: 270 * @TXMON_GI_3_2_US: 271 */ 272 enum guard_interval { 273 TXMON_GI_0_8_US = 0, 274 TXMON_GI_0_4_US, 275 TXMON_GI_1_6_US, 276 TXMON_GI_3_2_US 277 }; 278 279 /** 280 * enum RU_size_start - tx monitor supported RU size start type 281 * @TXMON_RU_26: 282 * @TXMON_RU_52: 283 * @TXMON_RU_106: 284 * @TXMON_RU_242: 285 * @TXMON_RU_484: 286 * @TXMON_RU_996: 287 * @TXMON_RU_1992: 288 * @TXMON_RU_FULLBW_240: 289 * @TXMON_RU_FULLBW_320: 290 * @TXMON_RU_MULTI_LARGE: 291 * @TXMON_RU_78: 292 * @TXMON_RU_132: 293 */ 294 enum RU_size_start { 295 TXMON_RU_26 = 0, 296 TXMON_RU_52, 297 TXMON_RU_106, 298 TXMON_RU_242, 299 TXMON_RU_484, 300 TXMON_RU_996, 301 TXMON_RU_1992, 302 TXMON_RU_FULLBW_240, 303 TXMON_RU_FULLBW_320, 304 TXMON_RU_MULTI_LARGE, 305 TXMON_RU_78, 306 TXMON_RU_132 307 }; 308 309 /** 310 * enum response_type_expected - expected response type 311 * @TXMON_RESP_NO_RESP: 312 * @TXMON_RESP_ACK: 313 * @TXMON_RESP_BA_64_BITMAP: 314 * @TXMON_RESP_BA_256: 315 * @TXMON_RESP_ACTIONNOACK: 316 * @TXMON_RESP_ACK_BA: 317 * @TXMON_RESP_CTS: 318 * @TXMON_RESP_ACK_DATA: 319 * @TXMON_RESP_NDP_ACK: 320 * @TXMON_RESP_NDP_MODIFIED_ACK: 321 * @TXMON_RESP_NDP_BA: 322 * @TXMON_RESP_NDP_CTS: 323 * @TXMON_RESP_NDP_ACK_OR_NDP_MODIFIED_ACK: 324 * @TXMON_RESP_UL_MU_BA: 325 * @TXMON_RESP_UL_MU_BA_AND_DATA: 326 * @TXMON_RESP_UL_MU_CBF: 327 * @TXMON_RESP_UL_MU_FRAMES: 328 * @TXMON_RESP_ANY_RESP_TO_DEVICE: 329 * @TXMON_RESP_ANY_RESP_ACCEPTED: 330 * @TXMON_RESP_FRAMELESS_PHYRX_RESP_ACCEPTED: 331 * @TXMON_RESP_RANGING_NDP_AND_LMR: 332 * @TXMON_RESP_BA_512: 333 * @TXMON_RESP_BA_1024: 334 * @TXMON_RESP_UL_MU_RANGING_CTS2S: 335 * @TXMON_RESP_UL_MU_RANGING_NDP: 336 * @TXMON_RESP_UL_MU_RANGING_LMR: 337 */ 338 enum response_type_expected { 339 TXMON_RESP_NO_RESP = 0, 340 TXMON_RESP_ACK, 341 TXMON_RESP_BA_64_BITMAP, 342 TXMON_RESP_BA_256, 343 TXMON_RESP_ACTIONNOACK, 344 TXMON_RESP_ACK_BA, 345 TXMON_RESP_CTS, 346 TXMON_RESP_ACK_DATA, 347 TXMON_RESP_NDP_ACK, 348 TXMON_RESP_NDP_MODIFIED_ACK, 349 TXMON_RESP_NDP_BA, 350 TXMON_RESP_NDP_CTS, 351 TXMON_RESP_NDP_ACK_OR_NDP_MODIFIED_ACK, 352 TXMON_RESP_UL_MU_BA, 353 TXMON_RESP_UL_MU_BA_AND_DATA, 354 TXMON_RESP_UL_MU_CBF, 355 TXMON_RESP_UL_MU_FRAMES, 356 TXMON_RESP_ANY_RESP_TO_DEVICE, 357 TXMON_RESP_ANY_RESP_ACCEPTED, 358 TXMON_RESP_FRAMELESS_PHYRX_RESP_ACCEPTED, 359 TXMON_RESP_RANGING_NDP_AND_LMR, 360 TXMON_RESP_BA_512, 361 TXMON_RESP_BA_1024, 362 TXMON_RESP_UL_MU_RANGING_CTS2S, 363 TXMON_RESP_UL_MU_RANGING_NDP, 364 TXMON_RESP_UL_MU_RANGING_LMR 365 }; 366 367 /** 368 * enum resposne_to_respone - tx monitor supported response to response type 369 * @TXMON_RESP_TO_RESP_NONE: 370 * @TXMON_RESP_TO_RESP_SU_BA: 371 * @TXMON_RESP_TO_RESP_MU_BA: 372 * @TXMON_RESP_TO_RESP_CMD: 373 */ 374 enum resposne_to_respone { 375 TXMON_RESP_TO_RESP_NONE = 0, 376 TXMON_RESP_TO_RESP_SU_BA, 377 TXMON_RESP_TO_RESP_MU_BA, 378 TXMON_RESP_TO_RESP_CMD 379 }; 380 381 /** 382 * enum medium_protection_type - tx monitor supported protection type 383 * @TXMON_MEDIUM_NO_PROTECTION: 384 * @TXMON_MEDIUM_RTS_LEGACY: 385 * @TXMON_MEDIUM_RTS_11AC_STATIC_BW: 386 * @TXMON_MEDIUM_RTS_11AC_DYNAMIC_BW: 387 * @TXMON_MEDIUM_CTS2SELF: 388 * @TXMON_MEDIUM_QOS_NULL_NO_ACK_3ADDR: 389 * @TXMON_MEDIUM_QOS_NULL_NO_ACK_4ADDR: 390 */ 391 enum medium_protection_type { 392 TXMON_MEDIUM_NO_PROTECTION, 393 TXMON_MEDIUM_RTS_LEGACY, 394 TXMON_MEDIUM_RTS_11AC_STATIC_BW, 395 TXMON_MEDIUM_RTS_11AC_DYNAMIC_BW, 396 TXMON_MEDIUM_CTS2SELF, 397 TXMON_MEDIUM_QOS_NULL_NO_ACK_3ADDR, 398 TXMON_MEDIUM_QOS_NULL_NO_ACK_4ADDR, 399 }; 400 401 /** 402 * enum ndp_frame - tx monitor supported ndp frame type 403 * @TXMON_NO_NDP_TRANSMISSION: 404 * @TXMON_BEAMFORMING_NDP: 405 * @TXMON_HE_RANGING_NDP: 406 * @TXMON_HE_FEEDBACK_NDP: 407 */ 408 enum ndp_frame { 409 TXMON_NO_NDP_TRANSMISSION, 410 TXMON_BEAMFORMING_NDP, 411 TXMON_HE_RANGING_NDP, 412 TXMON_HE_FEEDBACK_NDP, 413 }; 414 415 /** 416 * enum tx_ppdu_info_type - tx monitor supported ppdu type 417 * @TX_PROT_PPDU_INFO: 418 * @TX_DATA_PPDU_INFO: 419 */ 420 enum tx_ppdu_info_type { 421 TX_PROT_PPDU_INFO, 422 TX_DATA_PPDU_INFO, 423 }; 424 425 /** 426 * struct dp_tx_ppdu_info - structure to store tx ppdu info 427 * @ppdu_id: current ppdu info ppdu id 428 * @frame_type: ppdu info frame type 429 * @cur_usr_idx: current user index of ppdu info 430 * @ulist: union of linked lists 431 * @tx_ppdu_info_dlist_elem: support adding to double linked list 432 * @tx_ppdu_info_slist_elem: support adding to single linked list 433 * @hal_txmon: hal tx monitor info for that ppdu 434 */ 435 struct dp_tx_ppdu_info { 436 uint32_t ppdu_id; 437 uint8_t frame_type; 438 uint8_t cur_usr_idx; 439 440 union { 441 TAILQ_ENTRY(dp_tx_ppdu_info) tx_ppdu_info_dlist_elem; 442 STAILQ_ENTRY(dp_tx_ppdu_info) tx_ppdu_info_slist_elem; 443 } ulist; 444 445 #define tx_ppdu_info_list_elem ulist.tx_ppdu_info_dlist_elem 446 #define tx_ppdu_info_queue_elem ulist.tx_ppdu_info_slist_elem 447 448 struct hal_tx_ppdu_info hal_txmon; 449 }; 450 451 /** 452 * struct dp_tx_monitor_drop_stats - structure to store tx monitor drop 453 * statistics 454 * @ppdu_drop_cnt: ppdu drop counter 455 * @mpdu_drop_cnt: mpdu drop counter 456 * @tlv_drop_cnt: tlv drop counter 457 * @pkt_buf_recv: tx monitor packet buffer received 458 * @pkt_buf_free: tx monitor packet buffer free 459 * @pkt_buf_processed: tx monitor packet buffer processed 460 * @pkt_buf_to_stack: tx monitor packet buffer send to stack 461 * @status_buf_recv: tx monitor status buffer received 462 * @status_buf_free: tx monitor status buffer free 463 * @totat_tx_mon_replenish_cnt: tx monitor replenish count 464 * @total_tx_mon_reap_cnt: tx monitor reap count 465 * @tx_mon_stuck: tx monitor stuck count 466 * @total_tx_mon_stuck: tx monitor stuck count 467 * @ppdu_info_drop_th: count ppdu info been dropped due threshold reached 468 * @ppdu_info_drop_flush: count ppdu info been dropped due to flush detected 469 * @ppdu_info_drop_trunc: count ppdu info been dropped due to truncated 470 */ 471 struct dp_tx_monitor_drop_stats { 472 uint64_t ppdu_drop_cnt; 473 uint64_t mpdu_drop_cnt; 474 uint64_t tlv_drop_cnt; 475 476 uint64_t pkt_buf_recv; 477 uint64_t pkt_buf_free; 478 uint64_t pkt_buf_processed; 479 uint64_t pkt_buf_to_stack; 480 481 uint64_t status_buf_recv; 482 uint64_t status_buf_free; 483 484 uint64_t totat_tx_mon_replenish_cnt; 485 uint64_t total_tx_mon_reap_cnt; 486 uint8_t tx_mon_stuck; 487 uint32_t total_tx_mon_stuck; 488 489 uint64_t ppdu_info_drop_th; 490 uint64_t ppdu_info_drop_flush; 491 uint64_t ppdu_info_drop_trunc; 492 }; 493 494 /** 495 * enum dp_tx_monitor_mode - tx monitor supported mode 496 * @TX_MON_BE_DISABLE: tx monitor disable 497 * @TX_MON_BE_FULL_CAPTURE: tx monitor mode to capture full packet 498 * @TX_MON_BE_PEER_FILTER: tx monitor mode to capture peer filter 499 */ 500 enum dp_tx_monitor_mode { 501 TX_MON_BE_DISABLE, 502 TX_MON_BE_FULL_CAPTURE, 503 TX_MON_BE_PEER_FILTER, 504 }; 505 506 /** 507 * enum dp_tx_monitor_framework_mode - tx monitor framework mode 508 * @TX_MON_BE_FRM_WRK_DISABLE: tx monitor frame work disable 509 * @TX_MON_BE_FRM_WRK_FULL_CAPTURE: tx monitor frame work full capture 510 * @TX_MON_BE_FRM_WRK_128B_CAPTURE: tx monitor frame work 128B capture 511 */ 512 enum dp_tx_monitor_framework_mode { 513 TX_MON_BE_FRM_WRK_DISABLE, 514 TX_MON_BE_FRM_WRK_FULL_CAPTURE, 515 TX_MON_BE_FRM_WRK_128B_CAPTURE, 516 }; 517 518 #define TX_TAILQ_INSERT_TAIL(pdev, tx_ppdu_info) \ 519 do { \ 520 STAILQ_INSERT_TAIL(&pdev->tx_ppdu_info_list, \ 521 tx_ppdu_info, tx_ppdu_info_list_elem);\ 522 pdev->tx_ppdu_info_queue_depth++; \ 523 } while (0) 524 525 #define TX_TAILQ_REMOVE(pdev, tx_ppdu_info) \ 526 do { \ 527 TAILQ_REMOVE(&pdev->tx_ppdu_info_list, tx_ppdu_info, \ 528 tx_ppdu_info_list_elem); \ 529 pdev->tx_ppdu_info_queue_depth--; \ 530 } while (0) 531 532 #define TX_TAILQ_FIRST(pdev) TAILQ_FIRST(&pdev->tx_ppdu_info_list) 533 534 #define TX_TAILQ_FOREACH_SAFE(pdev, tx_ppdu_info) \ 535 do { \ 536 struct dp_tx_ppdu_info *tx_ppdu_info_next = NULL; \ 537 TAILQ_FOREACH_SAFE(tx_ppdu_info, \ 538 &pdev->tx_ppdu_info_list, \ 539 tx_ppdu_info_list_elem, \ 540 tx_ppdu_info_next); \ 541 } while (0) 542 543 #ifndef WLAN_TX_PKT_CAPTURE_ENH_BE 544 /** 545 * struct dp_pdev_tx_monitor_be - info to store tx capture information in pdev 546 * @be_ppdu_id: current ppdu id 547 * @mode: tx monitor core framework current mode 548 * @stats: tx monitor drop stats for that mac 549 * 550 */ 551 struct dp_pdev_tx_monitor_be { 552 uint32_t be_ppdu_id; 553 uint32_t mode; 554 struct dp_tx_monitor_drop_stats stats; 555 }; 556 557 /** 558 * struct dp_peer_tx_capture_be - Tx monitor peer structure 559 * 560 * This is a dummy structure 561 */ 562 struct dp_peer_tx_capture_be { 563 }; 564 #else 565 566 /** 567 * struct dp_txmon_frag_vec - a contiguous range of physical memory address 568 * @frag_buf: frag buffer address 569 * @end_offset: byte offset within the frag buffer where valid data resides 570 */ 571 struct dp_txmon_frag_vec { 572 qdf_frag_t frag_buf; 573 uint32_t end_offset; 574 }; 575 576 /* 577 * NB: intentionally not using kernel-doc comment because the kernel-doc 578 * script does not handle the STAILQ_HEAD macro 579 * struct dp_pdev_tx_monitor_be - info to store tx capture information in pdev 580 * @be_ppdu_id: current ppdu id 581 * @be_end_reason_bitmap: current end reason bitmap 582 * @mode: tx monitor current mode 583 * @tx_mon_list_lock: spinlock protection to list 584 * @post_ppdu_workqueue: tx monitor workqueue representation 585 * @post_ppdu_work: tx monitor post ppdu work 586 * @tx_ppdu_info_list_depth: list depth counter 587 * @tx_ppdu_info_list: ppdu info list to hold ppdu 588 * @defer_ppdu_info_list_depth: defer ppdu list depth counter 589 * @defer_ppdu_info_list: defer ppdu info list to hold defer ppdu 590 * @stats: tx monitor drop stats for that mac 591 * @tx_prot_ppdu_info: tx monitor protection ppdu info 592 * @tx_data_ppdu_info: tx monitor data ppdu info 593 * @last_prot_ppdu_info: last tx monitor protection ppdu info 594 * @last_data_ppdu_info: last tx monitor data ppdu info 595 * @prot_status_info: protection status info 596 * @data_status_info: data status info 597 * @last_tsft: last received tsft 598 * @last_ppdu_timestamp: last received ppdu_timestamp 599 * @last_frag_q_idx: last index of frag buffer 600 * @cur_frag_q_idx: current index of frag buffer 601 * @status_frag_queue: array of status frag queue to hold 64 status buffer 602 */ 603 struct dp_pdev_tx_monitor_be { 604 uint32_t be_ppdu_id; 605 uint32_t be_end_reason_bitmap; 606 uint32_t mode; 607 608 qdf_spinlock_t tx_mon_list_lock; 609 610 qdf_work_t post_ppdu_work; 611 qdf_workqueue_t *post_ppdu_workqueue; 612 613 uint32_t tx_ppdu_info_list_depth; 614 615 STAILQ_HEAD(, dp_tx_ppdu_info) tx_ppdu_info_queue; 616 617 uint32_t defer_ppdu_info_list_depth; 618 619 STAILQ_HEAD(, dp_tx_ppdu_info) defer_tx_ppdu_info_queue; 620 621 struct dp_tx_monitor_drop_stats stats; 622 623 struct dp_tx_ppdu_info *tx_prot_ppdu_info; 624 struct dp_tx_ppdu_info *tx_data_ppdu_info; 625 626 struct dp_tx_ppdu_info *last_prot_ppdu_info; 627 struct dp_tx_ppdu_info *last_data_ppdu_info; 628 629 struct hal_tx_status_info prot_status_info; 630 struct hal_tx_status_info data_status_info; 631 632 uint64_t last_tsft; 633 uint32_t last_ppdu_timestamp; 634 635 uint8_t last_frag_q_idx; 636 uint8_t cur_frag_q_idx; 637 struct dp_txmon_frag_vec frag_q_vec[MAX_STATUS_BUFFER_IN_PPDU]; 638 }; 639 640 /** 641 * struct dp_peer_tx_capture_be - Tx monitor peer structure 642 * 643 * need to be added here 644 */ 645 struct dp_peer_tx_capture_be { 646 }; 647 #endif /* WLAN_TX_PKT_CAPTURE_ENH_BE */ 648 649 /** 650 * dp_tx_mon_ppdu_info_free() - API to free dp_tx_ppdu_info 651 * @tx_ppdu_info: pointer to tx_ppdu_info 652 * 653 * Return: void 654 */ 655 void dp_tx_mon_ppdu_info_free(struct dp_tx_ppdu_info *tx_ppdu_info); 656 657 /** 658 * dp_tx_mon_free_usr_mpduq() - API to free user mpduq 659 * @tx_ppdu_info: pointer to tx_ppdu_info 660 * @usr_idx: user index 661 * @tx_mon_be: pointer to tx monitor be 662 * 663 * Return: void 664 */ 665 void dp_tx_mon_free_usr_mpduq(struct dp_tx_ppdu_info *tx_ppdu_info, 666 uint8_t usr_idx, 667 struct dp_pdev_tx_monitor_be *tx_mon_be); 668 669 /** 670 * dp_tx_mon_free_ppdu_info() - API to free dp_tx_ppdu_info 671 * @tx_ppdu_info: pointer to tx_ppdu_info 672 * @tx_mon_be: pointer to tx monitor be 673 * 674 * Return: void 675 */ 676 void dp_tx_mon_free_ppdu_info(struct dp_tx_ppdu_info *tx_ppdu_info, 677 struct dp_pdev_tx_monitor_be *tx_mon_be); 678 679 /** 680 * dp_tx_mon_get_ppdu_info() - API to allocate dp_tx_ppdu_info 681 * @pdev: pdev handle 682 * @type: type of ppdu_info data or protection 683 * @num_user: number user in a ppdu_info 684 * @ppdu_id: ppdu_id number 685 * 686 * Return: pointer to dp_tx_ppdu_info 687 */ 688 struct dp_tx_ppdu_info *dp_tx_mon_get_ppdu_info(struct dp_pdev *pdev, 689 enum tx_ppdu_info_type type, 690 uint8_t num_user, 691 uint32_t ppdu_id); 692 693 #ifdef WLAN_TX_PKT_CAPTURE_ENH_BE 694 /** 695 * dp_tx_ppdu_stats_attach_2_0 - Initialize Tx PPDU stats and enhanced capture 696 * @pdev: DP PDEV 697 * 698 * Return: none 699 */ 700 void dp_tx_ppdu_stats_attach_2_0(struct dp_pdev *pdev); 701 702 /** 703 * dp_tx_ppdu_stats_detach_2_0 - Cleanup Tx PPDU stats and enhanced capture 704 * @pdev: DP PDEV 705 * 706 * Return: none 707 */ 708 void dp_tx_ppdu_stats_detach_2_0(struct dp_pdev *pdev); 709 710 /** 711 * dp_print_pdev_tx_monitor_stats_2_0: print tx capture stats 712 * @pdev: DP PDEV handle 713 * 714 * return: void 715 */ 716 void dp_print_pdev_tx_monitor_stats_2_0(struct dp_pdev *pdev); 717 718 /** 719 * dp_config_enh_tx_monitor_2_0()- API to enable/disable enhanced tx capture 720 * @pdev: DP_PDEV handle 721 * @val: user provided value 722 * 723 * Return: QDF_STATUS 724 */ 725 QDF_STATUS dp_config_enh_tx_monitor_2_0(struct dp_pdev *pdev, uint8_t val); 726 727 /** 728 * dp_peer_set_tx_capture_enabled_2_0() - add tx monitor peer filter 729 * @pdev_handle: Datapath PDEV handle 730 * @peer_handle: Datapath PEER handle 731 * @is_tx_pkt_cap_enable: flag for tx capture enable/disable 732 * @peer_mac: peer mac address 733 * 734 * Return: status 735 */ 736 QDF_STATUS dp_peer_set_tx_capture_enabled_2_0(struct dp_pdev *pdev_handle, 737 struct dp_peer *peer_handle, 738 uint8_t is_tx_pkt_cap_enable, 739 uint8_t *peer_mac); 740 #endif /* WLAN_TX_PKT_CAPTURE_ENH_BE */ 741 742 #if (defined(WIFI_MONITOR_SUPPORT) && !defined(WLAN_TX_PKT_CAPTURE_ENH_BE)) 743 /** 744 * dp_config_enh_tx_core_monitor_2_0()- API to validate core framework 745 * @pdev: DP_PDEV handle 746 * @val: user provided value 747 * 748 * Return: QDF_STATUS 749 */ 750 QDF_STATUS dp_config_enh_tx_core_monitor_2_0(struct dp_pdev *pdev, uint8_t val); 751 #endif 752 753 #endif /* _DP_TX_MON_2_0_H_ */ 754