1 /* 2 * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * @file cdp_txrx_mon_struct.h 21 * @brief Define the monitor mode API structure 22 * shared by data path and the OS interface module 23 */ 24 25 #ifndef _CDP_TXRX_MON_STRUCT_H_ 26 #define _CDP_TXRX_MON_STRUCT_H_ 27 /* XXX not really a mode; there are really multiple PHY's */ 28 enum cdp_mon_phymode { 29 /* autoselect */ 30 CDP_IEEE80211_MODE_AUTO = 0, 31 /* 5GHz, OFDM */ 32 CDP_IEEE80211_MODE_11A = 1, 33 /* 2GHz, CCK */ 34 CDP_IEEE80211_MODE_11B = 2, 35 /* 2GHz, OFDM */ 36 CDP_IEEE80211_MODE_11G = 3, 37 /* 2GHz, GFSK */ 38 CDP_IEEE80211_MODE_FH = 4, 39 /* 5GHz, OFDM, 2x clock dynamic turbo */ 40 CDP_IEEE80211_MODE_TURBO_A = 5, 41 /* 2GHz, OFDM, 2x clock dynamic turbo */ 42 CDP_IEEE80211_MODE_TURBO_G = 6, 43 /* 5Ghz, HT20 */ 44 CDP_IEEE80211_MODE_11NA_HT20 = 7, 45 /* 2Ghz, HT20 */ 46 CDP_IEEE80211_MODE_11NG_HT20 = 8, 47 /* 5Ghz, HT40 (ext ch +1) */ 48 CDP_IEEE80211_MODE_11NA_HT40PLUS = 9, 49 /* 5Ghz, HT40 (ext ch -1) */ 50 CDP_IEEE80211_MODE_11NA_HT40MINUS = 10, 51 /* 2Ghz, HT40 (ext ch +1) */ 52 CDP_IEEE80211_MODE_11NG_HT40PLUS = 11, 53 /* 2Ghz, HT40 (ext ch -1) */ 54 CDP_IEEE80211_MODE_11NG_HT40MINUS = 12, 55 /* 2Ghz, Auto HT40 */ 56 CDP_IEEE80211_MODE_11NG_HT40 = 13, 57 /* 5Ghz, Auto HT40 */ 58 CDP_IEEE80211_MODE_11NA_HT40 = 14, 59 /* 5Ghz, VHT20 */ 60 CDP_IEEE80211_MODE_11AC_VHT20 = 15, 61 /* 5Ghz, VHT40 (Ext ch +1) */ 62 CDP_IEEE80211_MODE_11AC_VHT40PLUS = 16, 63 /* 5Ghz VHT40 (Ext ch -1) */ 64 CDP_IEEE80211_MODE_11AC_VHT40MINUS = 17, 65 /* 5Ghz, VHT40 */ 66 CDP_IEEE80211_MODE_11AC_VHT40 = 18, 67 /* 5Ghz, VHT80 */ 68 CDP_IEEE80211_MODE_11AC_VHT80 = 19, 69 /* 5Ghz, VHT160 */ 70 CDP_IEEE80211_MODE_11AC_VHT160 = 20, 71 /* 5Ghz, VHT80_80 */ 72 CDP_IEEE80211_MODE_11AC_VHT80_80 = 21, 73 }; 74 75 enum { 76 CDP_PKT_TYPE_OFDM = 0, 77 CDP_PKT_TYPE_CCK, 78 CDP_PKT_TYPE_HT, 79 CDP_PKT_TYPE_VHT, 80 CDP_PKT_TYPE_HE, 81 }; 82 83 enum { 84 CDP_SGI_0_8_US = 0, 85 CDP_SGI_0_4_US, 86 CDP_SGI_1_6_US, 87 CDP_SGI_3_2_US, 88 }; 89 90 enum { 91 CDP_RX_TYPE_SU = 0, 92 CDP_RX_TYPE_MU_MIMO, 93 CDP_RX_TYPE_MU_OFDMA, 94 CDP_RX_TYPE_MU_OFDMA_MIMO, 95 }; 96 97 enum { 98 CDP_FULL_RX_BW_20 = 0, 99 CDP_FULL_RX_BW_40, 100 CDP_FULL_RX_BW_80, 101 CDP_FULL_RX_BW_160, 102 }; 103 104 struct cdp_mon_status { 105 /* bss color value 1-63 used for update on ppdu_desc bsscolor */ 106 uint8_t bsscolor; 107 int rs_numchains; 108 int rs_flags; 109 #define IEEE80211_RX_FCS_ERROR 0x01 110 #define IEEE80211_RX_MIC_ERROR 0x02 111 #define IEEE80211_RX_DECRYPT_ERROR 0x04 112 /* holes in flags here between, ATH_RX_XXXX to IEEE80211_RX_XXX */ 113 #define IEEE80211_RX_KEYMISS 0x200 114 int rs_rssi; /* RSSI (noise floor ajusted) */ 115 int rs_abs_rssi; /* absolute RSSI */ 116 int rs_datarate; /* data rate received */ 117 int rs_rateieee; 118 int rs_ratephy1; 119 int rs_ratephy2; 120 int rs_ratephy3; 121 122 /* Keep the same as ATH_MAX_ANTENNA */ 123 #define IEEE80211_MAX_ANTENNA 3 124 /* RSSI (noise floor ajusted) */ 125 u_int8_t rs_rssictl[IEEE80211_MAX_ANTENNA]; 126 /* RSSI (noise floor ajusted) */ 127 u_int8_t rs_rssiextn[IEEE80211_MAX_ANTENNA]; 128 /* rs_rssi is valid or not */ 129 u_int8_t rs_isvalidrssi; 130 131 enum cdp_mon_phymode rs_phymode; 132 int rs_freq; 133 134 union { 135 u_int8_t data[8]; 136 u_int64_t tsf; 137 } rs_tstamp; 138 139 /* 140 * Detail channel structure of recv frame. 141 * It could be NULL if not available 142 */ 143 144 145 #ifdef ATH_SUPPORT_AOW 146 u_int16_t rs_rxseq; /* WLAN Sequence number */ 147 #endif 148 #ifdef ATH_VOW_EXT_STATS 149 /* Lower 16 bits holds the udp checksum offset in the data pkt */ 150 u_int32_t vow_extstats_offset; 151 /* Higher 16 bits contains offset in the data pkt at which vow 152 * ext stats are embedded 153 */ 154 #endif 155 u_int8_t rs_isaggr; 156 u_int8_t rs_isapsd; 157 int16_t rs_noisefloor; 158 u_int16_t rs_channel; 159 #ifdef ATH_SUPPORT_TxBF 160 u_int32_t rs_rpttstamp; /* txbf report time stamp*/ 161 #endif 162 163 /* The following counts are meant to assist in stats calculation. 164 * These variables are incremented only in specific situations, and 165 * should not be relied upon for any purpose other than the original 166 * stats related purpose they have been introduced for. 167 */ 168 169 u_int16_t rs_cryptodecapcount; /* Crypto bytes decapped/demic'ed. */ 170 u_int8_t rs_padspace; /* No. of padding bytes present after 171 header in wbuf. */ 172 u_int8_t rs_qosdecapcount; /* QoS/HTC bytes decapped. */ 173 174 /* End of stats calculation related counts. */ 175 176 /* 177 * uint8_t rs_lsig[IEEE80211_LSIG_LEN]; 178 * uint8_t rs_htsig[IEEE80211_HTSIG_LEN]; 179 * uint8_t rs_servicebytes[IEEE80211_SB_LEN]; 180 * uint8_t rs_fcs_error; 181 */ 182 183 /* cdp convergence monitor mode status */ 184 union { 185 u_int8_t cdp_data[8]; 186 u_int64_t cdp_tsf; 187 } cdp_rs_tstamp; 188 189 uint8_t cdp_rs_pream_type; 190 uint32_t cdp_rs_user_rssi; 191 uint8_t cdp_rs_stbc; 192 uint8_t cdp_rs_sgi; 193 uint32_t cdf_rs_rate_mcs; 194 uint32_t cdp_rs_reception_type; 195 uint32_t cdp_rs_bw; 196 uint32_t cdp_rs_nss; 197 uint8_t cdp_rs_fcs_err; 198 bool cdp_rs_rxdma_err; 199 }; 200 201 enum { 202 CDP_MON_PPDU_START = 0, 203 CDP_MON_PPDU_END, 204 }; 205 206 #define MAX_PPDU_ID_HIST 128 207 208 /** 209 * struct cdp_pdev_mon_stats 210 * @status_ppdu_state: state on PPDU start and end 211 * @status_ppdu_start: status ring PPDU start TLV count 212 * @status_ppdu_end: status ring PPDU end TLV count 213 * @status_ppdu_compl: status ring matching start and end count on PPDU 214 * @status_ppdu_start_mis: status ring missing start TLV count on PPDU 215 * @status_ppdu_end_mis: status ring missing end TLV count on PPDU 216 * @status_ppdu_done: status ring PPDU done TLV count 217 * @dest_ppdu_done: destination ring PPDU count 218 * @dest_mpdu_done: destination ring MPDU count 219 * @dup_mon_linkdesc_cnt: duplicate link descriptor indications from HW 220 * @dup_mon_buf_cnt: duplicate buffer indications from HW 221 * @tlv_tag_status_err: status not correct in the tlv tag 222 * @status_buf_done_war: Number of status ring buffers for which DMA not done 223 * WAR is applied. 224 * @mon_rx_bufs_replenished_dest: Rx buffers replenish count 225 * @mon_rx_bufs_reaped_dest: Rx buffer reap count 226 * @ppdu_id_mismatch: counter to track ppdu id mismatch in 227 * mointor status and monitor destination ring 228 * @ppdu_id_match: counter to track ppdu id match in 229 * mointor status and monitor destination ring 230 * @status_ppdu_drop: Number of ppdu dropped from monitor status ring 231 * @dest_ppdu_drop: Number of ppdu dropped from monitor destination ring 232 */ 233 struct cdp_pdev_mon_stats { 234 #ifndef REMOVE_MON_DBG_STATS 235 uint32_t status_ppdu_state; 236 uint32_t status_ppdu_start; 237 uint32_t status_ppdu_end; 238 uint32_t status_ppdu_compl; 239 uint32_t status_ppdu_start_mis; 240 uint32_t status_ppdu_end_mis; 241 #endif 242 uint32_t status_ppdu_done; 243 uint32_t dest_ppdu_done; 244 uint32_t dest_mpdu_done; 245 uint32_t dest_mpdu_drop; 246 uint32_t dup_mon_linkdesc_cnt; 247 uint32_t dup_mon_buf_cnt; 248 uint32_t stat_ring_ppdu_id_hist[MAX_PPDU_ID_HIST]; 249 uint32_t dest_ring_ppdu_id_hist[MAX_PPDU_ID_HIST]; 250 uint32_t ppdu_id_hist_idx; 251 uint32_t mon_rx_dest_stuck; 252 uint32_t tlv_tag_status_err; 253 uint32_t status_buf_done_war; 254 uint32_t mon_rx_bufs_replenished_dest; 255 uint32_t mon_rx_bufs_reaped_dest; 256 uint32_t ppdu_id_mismatch; 257 uint32_t ppdu_id_match; 258 uint32_t status_ppdu_drop; 259 uint32_t dest_ppdu_drop; 260 }; 261 #endif 262