1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef __CDP_TXRX_MOB_DEF_H 21 #define __CDP_TXRX_MOB_DEF_H 22 #include <sir_types.h> 23 #include <htt.h> 24 25 #define TX_WMM_AC_NUM 4 26 #define ENABLE_DP_HIST_STATS 27 #define DP_MEMORY_OPT 28 #ifndef CONFIG_BERYLLIUM 29 #define DP_USE_SINGLE_TCL 30 #endif 31 32 #define DP_RX_DISABLE_NDI_MDNS_FORWARDING 33 34 #define OL_TXQ_PAUSE_REASON_FW (1 << 0) 35 #define OL_TXQ_PAUSE_REASON_PEER_UNAUTHORIZED (1 << 1) 36 #define OL_TXQ_PAUSE_REASON_TX_ABORT (1 << 2) 37 #define OL_TXQ_PAUSE_REASON_VDEV_STOP (1 << 3) 38 #define OL_TXQ_PAUSE_REASON_THERMAL_MITIGATION (1 << 4) 39 40 #define OL_TXRX_INVALID_NUM_PEERS (-1) 41 42 43 /* Maximum number of station supported by data path, including BC. */ 44 #define WLAN_MAX_STA_COUNT (HAL_NUM_STA) 45 46 /* The symbolic station ID return to HDD to specify the packet is bc/mc */ 47 #define WLAN_RX_BCMC_STA_ID (WLAN_MAX_STA_COUNT + 1) 48 49 /* The symbolic station ID return to HDD to specify the packet is 50 to soft-AP itself */ 51 #define WLAN_RX_SAP_SELF_STA_ID (WLAN_MAX_STA_COUNT + 2) 52 53 /* is 802.11 address multicast/broadcast? */ 54 #define IEEE80211_IS_MULTICAST(_a) (*(_a) & 0x01) 55 56 #define MAX_PEERS 32 57 58 /* 59 * Bins used for reporting delay histogram: 60 * bin 0: 0 - 10 ms delay 61 * bin 1: 10 - 20 ms delay 62 * bin 2: 20 - 40 ms delay 63 * bin 3: 40 - 80 ms delay 64 * bin 4: 80 - 160 ms delay 65 * bin 5: > 160 ms delay 66 */ 67 #define QCA_TX_DELAY_HIST_REPORT_BINS 6 68 69 /* BA actions */ 70 #define IEEE80211_ACTION_BA_ADDBA_REQUEST 0 /* ADDBA request */ 71 #define IEEE80211_ACTION_BA_ADDBA_RESPONSE 1 /* ADDBA response */ 72 #define IEEE80211_ACTION_BA_DELBA 2 /* DELBA */ 73 74 #define IEEE80211_BA_POLICY_DELAYED 0 75 #define IEEE80211_BA_POLICY_IMMEDIATE 1 76 #define IEEE80211_BA_AMSDU_SUPPORTED 1 77 78 /** 79 * enum netif_action_type - Type of actions on netif queues 80 * @WLAN_STOP_ALL_NETIF_QUEUE: stop all netif queues 81 * @WLAN_START_ALL_NETIF_QUEUE: start all netif queues 82 * @WLAN_WAKE_ALL_NETIF_QUEUE: wake all netif queues 83 * @WLAN_STOP_ALL_NETIF_QUEUE_N_CARRIER: stop all queues and off carrier 84 * @WLAN_START_ALL_NETIF_QUEUE_N_CARRIER: start all queues and on carrier 85 * @WLAN_NETIF_TX_DISABLE: disable tx 86 * @WLAN_NETIF_TX_DISABLE_N_CARRIER: disable tx and off carrier 87 * @WLAN_NETIF_CARRIER_ON: on carrier 88 * @WLAN_NETIF_CARRIER_OFF: off carrier 89 * @WLAN_NETIF_PRIORITY_QUEUE_ON: start priority netif queues 90 * @WLAN_NETIF_PRIORITY_QUEUE_OFF: stop priority netif queues 91 * @WLAN_WAKE_NON_PRIORITY_QUEUE: wake non priority netif queues 92 * @WLAN_STOP_NON_PRIORITY_QUEUE: stop non priority netif queues 93 */ 94 enum netif_action_type { 95 WLAN_NETIF_ACTION_TYPE_NONE = 0, 96 WLAN_STOP_ALL_NETIF_QUEUE = 1, 97 WLAN_START_ALL_NETIF_QUEUE = 2, 98 WLAN_WAKE_ALL_NETIF_QUEUE = 3, 99 WLAN_STOP_ALL_NETIF_QUEUE_N_CARRIER = 4, 100 WLAN_START_ALL_NETIF_QUEUE_N_CARRIER = 5, 101 WLAN_NETIF_TX_DISABLE = 6, 102 WLAN_NETIF_TX_DISABLE_N_CARRIER = 7, 103 WLAN_NETIF_CARRIER_ON = 8, 104 WLAN_NETIF_CARRIER_OFF = 9, 105 WLAN_NETIF_PRIORITY_QUEUE_ON = 10, 106 WLAN_NETIF_PRIORITY_QUEUE_OFF = 11, 107 WLAN_NETIF_VO_QUEUE_ON = 12, 108 WLAN_NETIF_VO_QUEUE_OFF = 13, 109 WLAN_NETIF_VI_QUEUE_ON = 14, 110 WLAN_NETIF_VI_QUEUE_OFF = 15, 111 WLAN_NETIF_BE_BK_QUEUE_OFF = 16, 112 WLAN_NETIF_BE_BK_QUEUE_ON = 17, 113 WLAN_WAKE_NON_PRIORITY_QUEUE = 18, 114 WLAN_STOP_NON_PRIORITY_QUEUE = 19, 115 WLAN_NETIF_ACTION_TYPE_MAX, 116 }; 117 118 /** 119 * enum netif_reason_type - reason for netif queue action 120 * @WLAN_CONTROL_PATH: action from control path 121 * @WLAN_DATA_FLOW_CONTROL: because of flow control 122 * @WLAN_FW_PAUSE: because of firmware pause 123 * @WLAN_TX_ABORT: because of tx abort 124 * @WLAN_VDEV_STOP: because of vdev stop 125 * @WLAN_PEER_UNAUTHORISED: because of peer is unauthorised 126 * @WLAN_THERMAL_MITIGATION: because of thermal mitigation 127 */ 128 enum netif_reason_type { 129 WLAN_CONTROL_PATH = 1, 130 WLAN_DATA_FLOW_CONTROL, 131 WLAN_FW_PAUSE, 132 WLAN_TX_ABORT, 133 WLAN_VDEV_STOP, 134 WLAN_PEER_UNAUTHORISED, 135 WLAN_THERMAL_MITIGATION, 136 WLAN_DATA_FLOW_CONTROL_PRIORITY, 137 WLAN_DATA_FLOW_CTRL_BE_BK, 138 WLAN_DATA_FLOW_CTRL_VI, 139 WLAN_DATA_FLOW_CTRL_VO, 140 WLAN_DATA_FLOW_CTRL_PRI, 141 WLAN_REASON_TYPE_MAX, 142 }; 143 144 enum ol_rx_err_type { 145 OL_RX_ERR_DEFRAG_MIC, 146 OL_RX_ERR_PN, 147 OL_RX_ERR_UNKNOWN_PEER, 148 OL_RX_ERR_MALFORMED, 149 OL_RX_ERR_TKIP_MIC, 150 OL_RX_ERR_DECRYPT, 151 OL_RX_ERR_MPDU_LENGTH, 152 OL_RX_ERR_ENCRYPT_REQUIRED, 153 OL_RX_ERR_DUP, 154 OL_RX_ERR_UNKNOWN, 155 OL_RX_ERR_FCS, 156 OL_RX_ERR_PRIVACY, 157 OL_RX_ERR_NONE_FRAG, 158 OL_RX_ERR_NONE = 0xFF 159 }; 160 161 enum throttle_level { 162 THROTTLE_LEVEL_0, 163 THROTTLE_LEVEL_1, 164 THROTTLE_LEVEL_2, 165 THROTTLE_LEVEL_3, 166 /* Invalid */ 167 THROTTLE_LEVEL_MAX, 168 }; 169 170 enum { 171 OL_TX_WMM_AC_BE, 172 OL_TX_WMM_AC_BK, 173 OL_TX_WMM_AC_VI, 174 OL_TX_WMM_AC_VO, 175 OL_TX_NUM_WMM_AC 176 }; 177 178 /** 179 * @enum ol_tx_spec 180 * @brief indicate what non-standard transmission actions to apply 181 * @details 182 * Indicate one or more of the following: 183 * - The tx frame already has a complete 802.11 header. 184 * Thus, skip 802.3/native-WiFi to 802.11 header encapsulation and 185 * A-MSDU aggregation. 186 * - The tx frame should not be aggregated (A-MPDU or A-MSDU) 187 * - The tx frame is already encrypted - don't attempt encryption. 188 * - The tx frame is a segment of a TCP jumbo frame. 189 * - This tx frame should not be unmapped and freed by the txrx layer 190 * after transmission, but instead given to a registered tx completion 191 * callback. 192 * More than one of these specification can apply, though typically 193 * only a single specification is applied to a tx frame. 194 * A compound specification can be created, as a bit-OR of these 195 * specifications. 196 */ 197 enum ol_tx_spec { 198 OL_TX_SPEC_STD = 0x0, /* do regular processing */ 199 OL_TX_SPEC_RAW = 0x1, /* skip encap + A-MSDU aggr */ 200 OL_TX_SPEC_NO_AGGR = 0x2, /* skip encap + all aggr */ 201 OL_TX_SPEC_NO_ENCRYPT = 0x4, /* skip encap + encrypt */ 202 OL_TX_SPEC_TSO = 0x8, /* TCP segmented */ 203 OL_TX_SPEC_NWIFI_NO_ENCRYPT = 0x10, /* skip encrypt for nwifi */ 204 OL_TX_SPEC_NO_FREE = 0x20, /* give to cb rather than free */ 205 }; 206 207 /** 208 * @enum peer_debug_id_type: debug ids to track peer get_ref and release_ref 209 * @brief Unique peer debug IDs to track the callers. Each new usage can add to 210 * this enum list to create a new "PEER_DEBUG_ID_". 211 * @PEER_DEBUG_ID_OL_INTERNAL: debug id for OL internal usage 212 * @PEER_DEBUG_ID_WMA_PKT_DROP: debug id for wma_is_pkt_drop_candidate API 213 * @PEER_DEBUG_ID_WMA_ADDBA_REQ: debug id for ADDBA request 214 * @PEER_DEBUG_ID_WMA_DELBA_REQ: debug id for DELBA request 215 * @PEER_DEBUG_ID_LIM_SEND_ADDBA_RESP: debug id for send ADDBA response 216 * @PEER_DEBUG_ID_OL_RX_THREAD: debug id for rx thread 217 * @PEER_DEBUG_ID_WMA_CCMP_REPLAY_ATTACK: debug id for CCMP replay 218 * @PEER_DEBUG_ID_WMA_DEL_BSS:debug id for remove BSS 219 * @PEER_DEBUG_ID_WMA_VDEV_STOP_RESP:debug id for vdev stop response handler 220 * @PEER_DEBUG_ID_OL_PEER_MAP:debug id for peer map/unmap 221 * @PEER_DEBUG_ID_OL_PEER_ATTACH: debug id for peer attach/detach 222 * @PEER_DEBUG_ID_OL_TXQ_VDEV_FL: debug id for vdev flush 223 * @PEER_DEBUG_ID_OL_HASH_ERS:debug id for peer find hash erase 224 * @PEER_DEBUG_ID_MAX: debug id MAX 225 */ 226 enum peer_debug_id_type { 227 PEER_DEBUG_ID_OL_INTERNAL, 228 PEER_DEBUG_ID_WMA_PKT_DROP, 229 PEER_DEBUG_ID_WMA_ADDBA_REQ, 230 PEER_DEBUG_ID_WMA_DELBA_REQ, 231 PEER_DEBUG_ID_LIM_SEND_ADDBA_RESP, 232 PEER_DEBUG_ID_OL_RX_THREAD, 233 PEER_DEBUG_ID_WMA_CCMP_REPLAY_ATTACK, 234 PEER_DEBUG_ID_WMA_DEL_BSS, 235 PEER_DEBUG_ID_WMA_VDEV_STOP_RESP, 236 PEER_DEBUG_ID_OL_PEER_MAP, 237 PEER_DEBUG_ID_OL_PEER_ATTACH, 238 PEER_DEBUG_ID_OL_TXQ_VDEV_FL, 239 PEER_DEBUG_ID_OL_HASH_ERS, 240 PEER_DEBUG_ID_OL_UNMAP_TIMER_WORK, 241 PEER_DEBUG_ID_MAX 242 }; 243 244 /** 245 * struct ol_txrx_desc_type - txrx descriptor type 246 * @is_qos_enabled: is station qos enabled 247 * @is_wapi_supported: is station wapi supported 248 * @peer_addr: peer mac address 249 */ 250 struct ol_txrx_desc_type { 251 uint8_t is_qos_enabled; 252 uint8_t is_wapi_supported; 253 struct qdf_mac_addr peer_addr; 254 }; 255 256 /** 257 * struct ol_tx_sched_wrr_ac_specs_t - the wrr ac specs params structure 258 * @wrr_skip_weight: map to ol_tx_sched_wrr_adv_category_info_t.specs. 259 * wrr_skip_weight 260 * @credit_threshold: map to ol_tx_sched_wrr_adv_category_info_t.specs. 261 * credit_threshold 262 * @send_limit: map to ol_tx_sched_wrr_adv_category_info_t.specs. 263 * send_limit 264 * @credit_reserve: map to ol_tx_sched_wrr_adv_category_info_t.specs. 265 * credit_reserve 266 * @discard_weight: map to ol_tx_sched_wrr_adv_category_info_t.specs. 267 * discard_weight 268 * 269 * This structure is for wrr ac specs params set from user, it will update 270 * its content corresponding to the ol_tx_sched_wrr_adv_category_info_t.specs. 271 */ 272 struct ol_tx_sched_wrr_ac_specs_t { 273 int wrr_skip_weight; 274 uint32_t credit_threshold; 275 uint16_t send_limit; 276 int credit_reserve; 277 int discard_weight; 278 }; 279 280 /** 281 * struct txrx_pdev_cfg_param_t - configuration information 282 * passed to the data path 283 */ 284 struct txrx_pdev_cfg_param_t { 285 uint8_t is_full_reorder_offload; 286 /* IPA Micro controller data path offload enable flag */ 287 uint8_t is_uc_offload_enabled; 288 /* IPA Micro controller data path offload TX buffer count */ 289 uint32_t uc_tx_buffer_count; 290 /* IPA Micro controller data path offload TX buffer size */ 291 uint32_t uc_tx_buffer_size; 292 /* IPA Micro controller data path offload RX indication ring count */ 293 uint32_t uc_rx_indication_ring_count; 294 /* IPA Micro controller data path offload TX partition base */ 295 uint32_t uc_tx_partition_base; 296 /* IP, TCP and UDP checksum offload */ 297 bool ip_tcp_udp_checksum_offload; 298 /* IP, TCP and UDP checksum offload for NAN Mode */ 299 bool nan_ip_tcp_udp_checksum_offload; 300 /* IP, TCP and UDP checksum offload for P2P Mode*/ 301 bool p2p_ip_tcp_udp_checksum_offload; 302 /* Checksum offload override flag for Legcay modes */ 303 bool legacy_mode_csum_disable; 304 /* Rx processing in thread from TXRX */ 305 bool enable_rxthread; 306 /* CE classification enabled through INI */ 307 bool ce_classify_enabled; 308 #if defined(QCA_LL_TX_FLOW_CONTROL_V2) || defined(QCA_LL_PDEV_TX_FLOW_CONTROL) 309 /* Threshold to stop queue in percentage */ 310 uint32_t tx_flow_stop_queue_th; 311 /* Start queue offset in percentage */ 312 uint32_t tx_flow_start_queue_offset; 313 #endif 314 315 #ifdef QCA_SUPPORT_TXRX_DRIVER_TCP_DEL_ACK 316 /* enable the tcp delay ack feature in the driver */ 317 bool del_ack_enable; 318 /* timeout if no more tcp ack frames, unit is ms */ 319 uint16_t del_ack_timer_value; 320 /* the maximum number of replaced tcp ack frames */ 321 uint16_t del_ack_pkt_count; 322 #endif 323 324 struct ol_tx_sched_wrr_ac_specs_t ac_specs[TX_WMM_AC_NUM]; 325 bool gro_enable; 326 bool tso_enable; 327 bool lro_enable; 328 bool sg_enable; 329 bool enable_data_stall_detection; 330 bool enable_flow_steering; 331 bool disable_intra_bss_fwd; 332 333 #ifdef WLAN_SUPPORT_TXRX_HL_BUNDLE 334 uint16_t bundle_timer_value; 335 uint16_t bundle_size; 336 #endif 337 uint8_t pktlog_buffer_size; 338 }; 339 340 #ifdef IPA_OFFLOAD 341 /** 342 * ol_txrx_ipa_resources - Resources needed for IPA 343 */ 344 struct ol_txrx_ipa_resources { 345 qdf_shared_mem_t *ce_sr; 346 uint32_t ce_sr_ring_size; 347 qdf_dma_addr_t ce_reg_paddr; 348 349 qdf_shared_mem_t *tx_comp_ring; 350 uint32_t tx_num_alloc_buffer; 351 352 qdf_shared_mem_t *rx_rdy_ring; 353 qdf_shared_mem_t *rx_proc_done_idx; 354 355 qdf_shared_mem_t *rx2_rdy_ring; 356 qdf_shared_mem_t *rx2_proc_done_idx; 357 358 /* IPA UC doorbell registers paddr */ 359 qdf_dma_addr_t tx_comp_doorbell_dmaaddr; 360 qdf_dma_addr_t rx_ready_doorbell_dmaaddr; 361 362 uint32_t tx_pipe_handle; 363 uint32_t rx_pipe_handle; 364 }; 365 #endif 366 367 struct ol_txrx_ocb_chan_info { 368 uint32_t chan_freq; 369 uint16_t disable_rx_stats_hdr:1; 370 }; 371 372 /** 373 * ol_mic_error_info - carries the information associated with 374 * a MIC error 375 * @vdev_id: virtual device ID 376 * @key_id: Key ID 377 * @pn: packet number 378 * @sa: source address 379 * @da: destination address 380 * @ta: transmitter address 381 */ 382 struct ol_mic_error_info { 383 uint8_t vdev_id; 384 uint32_t key_id; 385 uint64_t pn; 386 uint8_t sa[QDF_MAC_ADDR_SIZE]; 387 uint8_t da[QDF_MAC_ADDR_SIZE]; 388 uint8_t ta[QDF_MAC_ADDR_SIZE]; 389 }; 390 391 /** 392 * ol_error_info - carries the information associated with an 393 * error indicated by the firmware 394 * @mic_err: MIC error information 395 */ 396 struct ol_error_info { 397 union { 398 struct ol_mic_error_info mic_err; 399 } u; 400 }; 401 402 403 /** 404 * struct ol_txrx_ocb_set_chan - txrx OCB channel info 405 * @ocb_channel_count: Channel count 406 * @ocb_channel_info: OCB channel info 407 */ 408 struct ol_txrx_ocb_set_chan { 409 uint32_t ocb_channel_count; 410 struct ol_txrx_ocb_chan_info *ocb_channel_info; 411 }; 412 413 /** 414 * @brief Parameter type to pass WMM setting to ol_txrx_set_wmm_param 415 * @details 416 * The struct is used to specify informaiton to update TX WMM scheduler. 417 */ 418 struct ol_tx_ac_param_t { 419 uint32_t aifs; 420 uint32_t cwmin; 421 uint32_t cwmax; 422 }; 423 424 struct ol_tx_wmm_param_t { 425 struct ol_tx_ac_param_t ac[OL_TX_NUM_WMM_AC]; 426 }; 427 428 struct ieee80211_ba_parameterset { 429 #if _BYTE_ORDER == _BIG_ENDIAN 430 uint16_t buffersize:10, /* B6-15 buffer size */ 431 tid:4, /* B2-5 TID */ 432 bapolicy:1, /* B1 block ack policy */ 433 amsdusupported:1; /* B0 amsdu supported */ 434 #else 435 uint16_t amsdusupported:1, /* B0 amsdu supported */ 436 bapolicy:1, /* B1 block ack policy */ 437 tid:4, /* B2-5 TID */ 438 buffersize:10; /* B6-15 buffer size */ 439 #endif 440 } __packed; 441 442 struct ieee80211_ba_seqctrl { 443 #if _BYTE_ORDER == _BIG_ENDIAN 444 uint16_t startseqnum:12, /* B4-15 starting sequence number */ 445 fragnum:4; /* B0-3 fragment number */ 446 #else 447 uint16_t fragnum:4, /* B0-3 fragment number */ 448 startseqnum:12; /* B4-15 starting sequence number */ 449 #endif 450 } __packed; 451 452 struct ieee80211_delba_parameterset { 453 #if _BYTE_ORDER == _BIG_ENDIAN 454 uint16_t tid:4, /* B12-15 tid */ 455 initiator:1, /* B11 initiator */ 456 reserved0:11; /* B0-10 reserved */ 457 #else 458 uint16_t reserved0:11, /* B0-10 reserved */ 459 initiator:1, /* B11 initiator */ 460 tid:4; /* B12-15 tid */ 461 #endif 462 } __packed; 463 464 /** 465 * ol_txrx_vdev_peer_remove_cb - wma_remove_peer callback 466 */ 467 typedef void (*ol_txrx_vdev_peer_remove_cb)(void *handle, uint8_t *bssid, 468 uint8_t vdev_id, void *peer); 469 470 /** 471 * @typedef tx_pause_callback 472 * @brief OSIF function registered with the data path 473 */ 474 typedef void (*tx_pause_callback)(uint8_t vdev_id, 475 enum netif_action_type action, 476 enum netif_reason_type reason); 477 478 typedef void (*ipa_uc_op_cb_type)(uint8_t *op_msg, 479 void *osif_ctxt); 480 481 /** 482 * struct ol_rx_inv_peer_params - rx invalid peer data parameters 483 * @vdev_id: Virtual device ID 484 * @ra: RX data receiver MAC address 485 * @ta: RX data transmitter MAC address 486 */ 487 struct ol_rx_inv_peer_params { 488 uint8_t vdev_id; 489 uint8_t ra[QDF_MAC_ADDR_SIZE]; 490 uint8_t ta[QDF_MAC_ADDR_SIZE]; 491 }; 492 493 /** 494 * cdp_txrx_ext_stats: dp extended stats 495 * tx_msdu_enqueue: tx msdu queued to hw 496 * tx_msdu_overflow: tx msdu overflow 497 * rx_mpdu_received: rx mpdu processed by hw 498 * rx_mpdu_delivered: rx mpdu received from hw 499 * rx_mpdu_error: rx mpdu error count 500 * rx_mpdu_missed: rx mpdu missed by hw 501 */ 502 struct cdp_txrx_ext_stats { 503 uint32_t tx_msdu_enqueue; 504 uint32_t tx_msdu_overflow; 505 uint32_t rx_mpdu_received; 506 uint32_t rx_mpdu_delivered; 507 uint32_t rx_mpdu_error; 508 uint32_t rx_mpdu_missed; 509 }; 510 511 #endif /* __CDP_TXRX_MOB_DEF_H */ 512