xref: /wlan-dirver/fw-api/hw/qcn9224/v2/vht_sig_a_info.h (revision d4846129c1dbcafa0b923a0430ed64c272fc5fb0)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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17 
18 
19 
20 
21 
22 
23 
24 
25 
26 #ifndef _VHT_SIG_A_INFO_H_
27 #define _VHT_SIG_A_INFO_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_VHT_SIG_A_INFO 2
32 
33 
34 struct vht_sig_a_info {
35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
36              uint32_t bandwidth                                               :  2,
37                       vhta_reserved_0                                         :  1,
38                       stbc                                                    :  1,
39                       group_id                                                :  6,
40                       n_sts                                                   : 12,
41                       txop_ps_not_allowed                                     :  1,
42                       vhta_reserved_0b                                        :  1,
43                       reserved_0                                              :  8;
44              uint32_t gi_setting                                              :  2,
45                       su_mu_coding                                            :  1,
46                       ldpc_extra_symbol                                       :  1,
47                       mcs                                                     :  4,
48                       beamformed                                              :  1,
49                       vhta_reserved_1                                         :  1,
50                       crc                                                     :  8,
51                       tail                                                    :  6,
52                       reserved_1                                              :  7,
53                       rx_integrity_check_passed                               :  1;
54 #else
55              uint32_t reserved_0                                              :  8,
56                       vhta_reserved_0b                                        :  1,
57                       txop_ps_not_allowed                                     :  1,
58                       n_sts                                                   : 12,
59                       group_id                                                :  6,
60                       stbc                                                    :  1,
61                       vhta_reserved_0                                         :  1,
62                       bandwidth                                               :  2;
63              uint32_t rx_integrity_check_passed                               :  1,
64                       reserved_1                                              :  7,
65                       tail                                                    :  6,
66                       crc                                                     :  8,
67                       vhta_reserved_1                                         :  1,
68                       beamformed                                              :  1,
69                       mcs                                                     :  4,
70                       ldpc_extra_symbol                                       :  1,
71                       su_mu_coding                                            :  1,
72                       gi_setting                                              :  2;
73 #endif
74 };
75 
76 
77 
78 
79 #define VHT_SIG_A_INFO_BANDWIDTH_OFFSET                                             0x00000000
80 #define VHT_SIG_A_INFO_BANDWIDTH_LSB                                                0
81 #define VHT_SIG_A_INFO_BANDWIDTH_MSB                                                1
82 #define VHT_SIG_A_INFO_BANDWIDTH_MASK                                               0x00000003
83 
84 
85 
86 
87 #define VHT_SIG_A_INFO_VHTA_RESERVED_0_OFFSET                                       0x00000000
88 #define VHT_SIG_A_INFO_VHTA_RESERVED_0_LSB                                          2
89 #define VHT_SIG_A_INFO_VHTA_RESERVED_0_MSB                                          2
90 #define VHT_SIG_A_INFO_VHTA_RESERVED_0_MASK                                         0x00000004
91 
92 
93 
94 
95 #define VHT_SIG_A_INFO_STBC_OFFSET                                                  0x00000000
96 #define VHT_SIG_A_INFO_STBC_LSB                                                     3
97 #define VHT_SIG_A_INFO_STBC_MSB                                                     3
98 #define VHT_SIG_A_INFO_STBC_MASK                                                    0x00000008
99 
100 
101 
102 
103 #define VHT_SIG_A_INFO_GROUP_ID_OFFSET                                              0x00000000
104 #define VHT_SIG_A_INFO_GROUP_ID_LSB                                                 4
105 #define VHT_SIG_A_INFO_GROUP_ID_MSB                                                 9
106 #define VHT_SIG_A_INFO_GROUP_ID_MASK                                                0x000003f0
107 
108 
109 
110 
111 #define VHT_SIG_A_INFO_N_STS_OFFSET                                                 0x00000000
112 #define VHT_SIG_A_INFO_N_STS_LSB                                                    10
113 #define VHT_SIG_A_INFO_N_STS_MSB                                                    21
114 #define VHT_SIG_A_INFO_N_STS_MASK                                                   0x003ffc00
115 
116 
117 
118 
119 #define VHT_SIG_A_INFO_TXOP_PS_NOT_ALLOWED_OFFSET                                   0x00000000
120 #define VHT_SIG_A_INFO_TXOP_PS_NOT_ALLOWED_LSB                                      22
121 #define VHT_SIG_A_INFO_TXOP_PS_NOT_ALLOWED_MSB                                      22
122 #define VHT_SIG_A_INFO_TXOP_PS_NOT_ALLOWED_MASK                                     0x00400000
123 
124 
125 
126 
127 #define VHT_SIG_A_INFO_VHTA_RESERVED_0B_OFFSET                                      0x00000000
128 #define VHT_SIG_A_INFO_VHTA_RESERVED_0B_LSB                                         23
129 #define VHT_SIG_A_INFO_VHTA_RESERVED_0B_MSB                                         23
130 #define VHT_SIG_A_INFO_VHTA_RESERVED_0B_MASK                                        0x00800000
131 
132 
133 
134 
135 #define VHT_SIG_A_INFO_RESERVED_0_OFFSET                                            0x00000000
136 #define VHT_SIG_A_INFO_RESERVED_0_LSB                                               24
137 #define VHT_SIG_A_INFO_RESERVED_0_MSB                                               31
138 #define VHT_SIG_A_INFO_RESERVED_0_MASK                                              0xff000000
139 
140 
141 
142 
143 #define VHT_SIG_A_INFO_GI_SETTING_OFFSET                                            0x00000004
144 #define VHT_SIG_A_INFO_GI_SETTING_LSB                                               0
145 #define VHT_SIG_A_INFO_GI_SETTING_MSB                                               1
146 #define VHT_SIG_A_INFO_GI_SETTING_MASK                                              0x00000003
147 
148 
149 
150 
151 #define VHT_SIG_A_INFO_SU_MU_CODING_OFFSET                                          0x00000004
152 #define VHT_SIG_A_INFO_SU_MU_CODING_LSB                                             2
153 #define VHT_SIG_A_INFO_SU_MU_CODING_MSB                                             2
154 #define VHT_SIG_A_INFO_SU_MU_CODING_MASK                                            0x00000004
155 
156 
157 
158 
159 #define VHT_SIG_A_INFO_LDPC_EXTRA_SYMBOL_OFFSET                                     0x00000004
160 #define VHT_SIG_A_INFO_LDPC_EXTRA_SYMBOL_LSB                                        3
161 #define VHT_SIG_A_INFO_LDPC_EXTRA_SYMBOL_MSB                                        3
162 #define VHT_SIG_A_INFO_LDPC_EXTRA_SYMBOL_MASK                                       0x00000008
163 
164 
165 
166 
167 #define VHT_SIG_A_INFO_MCS_OFFSET                                                   0x00000004
168 #define VHT_SIG_A_INFO_MCS_LSB                                                      4
169 #define VHT_SIG_A_INFO_MCS_MSB                                                      7
170 #define VHT_SIG_A_INFO_MCS_MASK                                                     0x000000f0
171 
172 
173 
174 
175 #define VHT_SIG_A_INFO_BEAMFORMED_OFFSET                                            0x00000004
176 #define VHT_SIG_A_INFO_BEAMFORMED_LSB                                               8
177 #define VHT_SIG_A_INFO_BEAMFORMED_MSB                                               8
178 #define VHT_SIG_A_INFO_BEAMFORMED_MASK                                              0x00000100
179 
180 
181 
182 
183 #define VHT_SIG_A_INFO_VHTA_RESERVED_1_OFFSET                                       0x00000004
184 #define VHT_SIG_A_INFO_VHTA_RESERVED_1_LSB                                          9
185 #define VHT_SIG_A_INFO_VHTA_RESERVED_1_MSB                                          9
186 #define VHT_SIG_A_INFO_VHTA_RESERVED_1_MASK                                         0x00000200
187 
188 
189 
190 
191 #define VHT_SIG_A_INFO_CRC_OFFSET                                                   0x00000004
192 #define VHT_SIG_A_INFO_CRC_LSB                                                      10
193 #define VHT_SIG_A_INFO_CRC_MSB                                                      17
194 #define VHT_SIG_A_INFO_CRC_MASK                                                     0x0003fc00
195 
196 
197 
198 
199 #define VHT_SIG_A_INFO_TAIL_OFFSET                                                  0x00000004
200 #define VHT_SIG_A_INFO_TAIL_LSB                                                     18
201 #define VHT_SIG_A_INFO_TAIL_MSB                                                     23
202 #define VHT_SIG_A_INFO_TAIL_MASK                                                    0x00fc0000
203 
204 
205 
206 
207 #define VHT_SIG_A_INFO_RESERVED_1_OFFSET                                            0x00000004
208 #define VHT_SIG_A_INFO_RESERVED_1_LSB                                               24
209 #define VHT_SIG_A_INFO_RESERVED_1_MSB                                               30
210 #define VHT_SIG_A_INFO_RESERVED_1_MASK                                              0x7f000000
211 
212 
213 
214 
215 #define VHT_SIG_A_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET                             0x00000004
216 #define VHT_SIG_A_INFO_RX_INTEGRITY_CHECK_PASSED_LSB                                31
217 #define VHT_SIG_A_INFO_RX_INTEGRITY_CHECK_PASSED_MSB                                31
218 #define VHT_SIG_A_INFO_RX_INTEGRITY_CHECK_PASSED_MASK                               0x80000000
219 
220 
221 
222 #endif
223