1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _TX_FLUSH_REQ_H_ 18 #define _TX_FLUSH_REQ_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #define NUM_OF_DWORDS_TX_FLUSH_REQ 2 23 24 #define NUM_OF_QWORDS_TX_FLUSH_REQ 1 25 26 27 struct tx_flush_req { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 uint32_t flush_req_reason : 8, // [7:0] 30 phytx_abort_reason : 8, // [15:8] 31 flush_req_user_number_or_link_id : 6, // [21:16] 32 mlo_abort_reason : 5, // [26:22] 33 reserved_0a : 5; // [31:27] 34 uint32_t tlv64_padding : 32; // [31:0] 35 #else 36 uint32_t reserved_0a : 5, // [31:27] 37 mlo_abort_reason : 5, // [26:22] 38 flush_req_user_number_or_link_id : 6, // [21:16] 39 phytx_abort_reason : 8, // [15:8] 40 flush_req_reason : 8; // [7:0] 41 uint32_t tlv64_padding : 32; // [31:0] 42 #endif 43 }; 44 45 46 /* Description FLUSH_REQ_REASON 47 48 The reason why the flush request was generated. 49 50 <enum 0 reserved_code>This is included for clean implementation 51 and verification. This code should NOT be used during a 52 valid FLUSH. It is used as a keeper value when flush logic 53 is idle 54 <enum 1 txpcu_flreq_code_txop_exceeded>Flush request issued 55 by TXPCU in case of a WCOEX abort. 56 <enum 2 crypt_flreq_rx_int_tx>This is a corner case scenario. 57 A situation where: 58 a.A RX is just over and CCA indication is IDLE 59 b.Crypt is still busy decrypting 60 c.A TX just starts. 61 The TX should be tried later. This situation may be rare. 62 Just taking an extra precaution. 63 <enum 3 txpcu_flreq_code_rts_pkt_cca_abort>This is the static 64 BW failure happening right after start_tx for either RTS 65 frame or data packet 66 <enum 4 txpcu_flreq_code_cts_cca_abort>This is the static 67 BW failure in the protection sequence (CTS). 68 <enum 5 pdg_flreq_code_txop_abort>This is PDG signaling 69 not enough TXOP for transmission 70 <enum 6 sw_explicit_flush_termination>When SW issues a flush 71 WHICH CAUSES AN ONGOING FES to terminate 72 <enum 7 fes_stp_not_enough_txop_rem>Not enough TXOP remaining 73 in either SW or HW mode. This checks if the remaining TXOP 74 < a parameterized minimum time. Currently half SIFS duration 75 (5 us). 76 <enum 8 hwsch_sch_tlv_zero_hdr_err>HWSCH flush when Parser 77 engine encounters a header with all zeros in the DWORD 78 <enum 9 fes_stp_tlv_time_exceeded_bkof_exp>Issued in case 79 TLV transmission exceeds start_tx time 80 <enum 10 fes_stp_sw_fes_time_gt_hw>SW mode abort. When HWSCH 81 determines that none of the SW programmed (upto 3) BW times 82 can fit into the current TXOP remaining 83 <enum 11 txpcu_flreq_ppdu_allow_bw_fields_not_set>Flush 84 request issued by TXPCU in case none of the PPDU_ALLOW_BW_* 85 fields are set in PCU_PPDU_SETUP TLV 86 <enum 12 txpcu_false_mu_reception>Flush request issued by 87 TXPCU if RXPCU initiates a response generation for a MU 88 reception even though MU reception was not expected 89 <enum 13 hwsch_coex_abort>Flush request issued by HWSCH 90 when a coex event caused this transmit to be aborted 91 <enum 14 hwsch_svd_rdy_timeout>Flush request issued by HWSCH 92 when the PHY does not return the SVD_READY before a timeout 93 expires 94 <enum 15 num_mpdu_count_zero>Flush request issued by TXPCU 95 when the number of MPDU counter for selected BW is zero 96 97 <enum 16 unsupported_cbf>Flush request issued by TXPCU if 98 TXPCU receives TX_PKT_END with error_unsupported_cbf during 99 CV transfer. 100 <enum 17 txpcu_flreq_pcu_ppdu_setup_init_not_valid>Indicates 101 TXPCU has not received PCU_PPDU_SETUP_INIT from PDG, by 102 the time it received PRE_START_TX from HWSCH. 103 <enum 18 txpcu_flreq_pcu_ppdu_setup_start_not_valid>Indicates 104 TXPCU has not received PCU_PPDU_SETUP_START from PDG, by 105 the time it received START_TX from HWSCH. 106 <enum 19 txpcu_flreq_tx_phy_descriptor_not_valid>Indicates 107 TXPCU has not received TX_PHY_DESCRIPTOR within REQD_TLVS_WAIT_TIME 108 after receiving START_TX from HWSCH. 109 <enum 20 txpcu_req_tlvs_timeout_for_cbf>TXPCU did nor receive 110 the CBF info TLVs from the PHY fast enough which resulted 111 in a timeout. 112 <enum 21 txdma_flreq_no_of_mpdu_less_than_limit_status>Indicates 113 the total number of MPDUs that needs to be send out by 114 TXDMA is less than the number indicated by PDG/TXPCU in 115 the MPDU_LIMIT_STATUS 116 <enum 22 txole_flreq_frag_en_amsdu_ampdu>Fragmentation is 117 enabled in TX_FES_SETUP for an AMSDU or AMPDU 118 <enum 23 txole_flreq_more_frag_set_for_last_seg>more_frag 119 bit in TX_FES_SETUP TLV is set for the last MPDU fragment 120 121 <enum 24 txpcu_flreq_start_tx_bw_mismatch>Indicates TXPCU 122 has detected a mismatch between BWs detected at PRE_START_TX 123 and START_TX 124 <enum 25 txpcu_flreq_coex_bw_not_allowed>flush request and 125 is asserted by TXPCU when the final negotiated BW from 126 COEX is not allowed by SW 127 <enum 26 txole_flreq_frag_en_sw_encrypted>flush request 128 and is asserted by TXPCU when the final negotiated BW from 129 COEX is not allowed by SW 130 <enum 27 txole_flreq_frag_en_buffer_chaining>Fragmentation 131 is enabled in raw mode buffer chaining mode. 132 <enum 28 txole_flreq_pv1_type3_amsdu_error>A1 and A2 set 133 to MAC addresses for 11ah PV1 short frame which is an AMSDU 134 135 <enum 29 txole_flreq_pv1_wrong_key_type>An unsupported key_type 136 is set for a PV1 frames. WEP, TKIP and WAPI are not supported 137 for PV1 frames 138 <enum 30 txole_flreq_illegal_frame>Unexpected Tx Mpdu length. 139 Asserted if the MSDU PACKET TLV length is less than the 140 expected WMAC header 141 <enum 31 pdg_flreq_coex_reasons>Asserted by PDG when COEX 142 related logic in PDG requires a flush request. 143 <enum 32 wifi_txole_no_full_msdu_for_checksum_en>Full MSDU 144 packet was not provided by TXDMA when checksum/TSO/fragmentation 145 was enabled 146 <enum 33 wifi_txole_length_mismatch_802_3_eth_frame>The 147 length field in the incoming 802.3 ethernet frame doesn't 148 match with the actual number of bytes in the data TLV. 149 <enum 34 wifi_txole_pv0_amsdu_frame_err>Non-QoS frames are 150 queued as part of AMSDU 151 <enum 35 wifi_txole_pv0_wrong_key_type>Key type in peer 152 table set to NO_CIPHER for protected frames 153 <enum 36 wifi_fes_stp_cca_busy_in_pifs>This flush is initiated 154 by scheduler when (if enabled) CCA goes busy in the middle 155 of a PIFS burst 156 <enum 37 prot_frame_data_underrun>This flush is initiated 157 by TXPCU when a protection frame is send, but TXPCU has 158 not received address fields in time. 159 <enum 38 pdg_no_length_received>PDG generated this flush 160 request because not one MPDU length info has been received 161 at the required timeout (which is programmable) 162 <enum 39 pdg_wrong_preamble_req_order>PDG generated this 163 flush request because PHY issued an unexpected preamble 164 request type 165 <enum 40 txpcu_flreq_retry_for_optimal_bw>The most desired 166 BW was not available, and TXPCU would like to try the most 167 optimal transmit BW again after a new BO period. 168 <enum 41 wifi_txole_incomplete_llc_frame>LLC received incomplete 169 frame 170 <enum 42 pdg_cts_lower_bw_fit_err>PDG received a CTS frame 171 that reduced the BW, As a result the MPDU does not fit 172 in the previous reserved time, the thus this transmission 173 is aborted 174 <enum 43 pdg_cts_shorter_dur_fit_err>PDG received a CTS 175 frame that a reduced duration field. As a result the MPDU 176 does not fit in the previous reserved time, the thus this 177 transmission is aborted 178 179 Note the duration field in CTS can be reduced as a result 180 of COEX reasons 181 <enum 44 hwsch_sch_tlv_len_oor_err>HWSCH flush when Parser 182 engine encounters a header whose length is greater than 183 511 dwords. This excludes DUMMY TLVs. 184 <enum 45 hwsch_sch_tlv_taglen_mismatch_err>HWSCH flush when 185 Parser engine encounters a header whose TAG does not match 186 the XML specified length. This check excludes zero length 187 and variable length TLVs 188 <enum 46 hwsch_sch_tlv_sfm_tracking_err>HWSCH flush when 189 Parser engine encounters a non contiguous error check code, 190 while reading SFM. This check is primarily to catch data 191 write or read issues within the buffering process of scheduler 192 TLV in SFM 193 <enum 47 wifitx_flush_rssi_above_obss_nonsrg_thr>When HWSCH 194 attempts to transmit a packet based on OBSS_PD non-SRG 195 opportunity, a flush with this code is generated if "ReceivedRssi 196 from RXPCU > Scheduler_cmd.RssiAltNonSrg". 197 <enum 48 wifitx_flush_rssi_above_obss_srg_thr>When HWSCH 198 attempts to transmit a packet based on OBSS_PD non-SRG 199 opportunity, a flush with this code is generated if "ReceivedRssi 200 from RXPCU > Scheduler_cmd.RssiAltSrg". 201 <enum 49 wifitx_flush_rssi_above_srp_pwr_thr>When HWSCH 202 attempts to transmit a packet within an SRP opportunity 203 window, a flush with this code is generated if "Scheduler_cmd.SrpAltPwr 204 > SRP_less_RSSI". 205 <enum 50 hwsch_unexpected_sch_tlv_end_err>parse errors 206 <enum 51 hwsch_sch_tlv_tag_oor_err>HWSCH flush when Parser 207 engine encounters a header whose TAG is not listed in the 208 XML TAG table 209 <enum 52 txpcu_phytx_abort_err>An abort from PHY TX got 210 received 211 <enum 53 txpcu_coex_soft_abort_err>A soft from coex got 212 received before even a single MPDU got transmitted. Therefor 213 transmission is terminated. 214 <enum 54 pdg_min_user_count_missed>PDG was asked to start 215 an MU transmission, but the number of users with actual 216 data was less then the threshold (Min_users_with_data_count) 217 218 <enum 55 pdg_min_byte_count_missed>PDG was asked to start 219 an SU transmission, but the number of bytes that PDG has 220 been informed about that can be transmitted is less then 221 the required threshold (min_ppdu_bytes) 222 <enum 56 pdg_min_mpdu_count_missed>PDG was asked to start 223 an SU transmission, but the number of MPDUs that PDG has 224 been informed about that can be transmitted is less then 225 the required threshold (min_mpdus_in_ppdu) 226 <enum 57 pdg_cannot_pad_min_ppdu_time>PDG uses this code 227 when the min PPDU time to pad up to (pad_min_ppdu_time) 228 can not be met due to other boundary conditions (e.g. FES 229 time/TXOP time/TBTT) 230 <enum 58 ucode_flush_request>Flush request initiated by 231 the ucode (M3) 232 <enum 59 txpcu_resp_frame_flushed>TXPCU uses this code on 233 encountering an error condition (e.g. late MACTX_PHY_DESC 234 or CV error) while generating a response. 235 <enum 60 hwsch_sifs_burst_svd_ready_timeout>This flush code 236 is used by HWSCH to indicate that during SIFS bursting, 237 an SVD_READY timeout was detected, which resulted in the 238 SIFS burst to be aborted. 239 <enum 61 txpcu_phy_data_request_to_early>TXPCU has not been 240 properly initialized when the first data request from the 241 PHY has been seen. 242 <enum 62 txpcu_trigger_response_cs_check_fail>TXPCU found 243 that the medium was not idle for the Carries Sense check 244 that PDG indicated was needed for the triggered response 245 frame. 246 <enum 63 pdg_ofdma_max_unused_space_violation>PDG found 247 out that when trying to assign the RUs among the available 248 users, the number of unused RUs remained above the allowed 249 threshold 250 <enum 64 crypto_tx_user_capacity_exceeded>This happens when 251 Crypto receives TLVs for more TX users than it can support 252 at that point of time 253 <enum 65 crypto_tx_non_mu_key_type_rcvd>This happens when 254 Crypto receives unsupported Key types (WEP, TKIP) for MU 255 256 <enum 66 txpcu_cbf_resp_abort>CBF response generation by 257 TXPCU ran into issues due to info not being available from 258 the PHY 259 <enum 67 txpcu_phy_nap_received_during_tx>TXPCU received 260 a PHY NAP TLV from rxpcu while a transmission was ongoing. 261 The transmission will be terminated with this abort reason. 262 263 <enum 68 rxpcu_trigger_with_fcs_error>RXPCU found out that 264 the trigger frame that was received and for which the TX 265 path has been activated to generate a response, had an 266 FCS error. 267 <enum 69 pdg_flreq_coex_bt_higher_priority>Asserted by PDG 268 when COEX indicated to PDG that the transmit request is 269 NOT granted because a higher priority BT activity is ongoing. 270 271 <enum 70 txpcu_txrx_conflict_detected>TXPCU detected a conflict 272 between an FES transmission and a self-gen response transmission. 273 This is when the PHY + RXPCU delays cause a self-gen to 274 overlap with the pre-backoff time from HWSCH for the next 275 FES. 276 <enum 71 pdg_mu_cts_ru_allocation_corruption>PDG received 277 a MU-RTS trigger for which the CTS RU response setting 278 is not valid 279 <enum 72 pdg_trig_for_blocked_ru>PDG received a trigger 280 based transmission request for an RU size that is blocked 281 by SW. 282 <enum 73 pdg_trig_response_mode_corruption>Asserted when 283 PDG gets a TX_FES_SETUP with field "Fes_in_11ax_Trigger_response_config" 284 not being in sync with what it was expecting. 285 <enum 74 pdg_invalid_trigger_config_received>PDG received 286 OFDMA_TRIGGER_DETAILS and the configuration in there (which 287 RXPCU gets from the trigger frame has invalid field value 288 combinations 289 <enum 75 txole_msdu_too_long>This flush request will be 290 asserted if the length of a checksum enabled MSDU is more 291 than 2400 bytes. 292 <enum 76 txole_inconsistent_mesh>This flush request will 293 be asserted if mesh_enable is set for an MSDU subframe 294 while its not set for another MSDU subframe in the same 295 AMSDU 296 <enum 77 txole_mesh_enable_for_ethernet>This flush request 297 will be asserted if mesh_enable is set for an ethernet 298 frame 299 <enum 78 txpcu_trig_response_mode_corruption>Asserted when 300 TXPCU gets a TX_FES_SETUP with field "ofdma_triggered_response" 301 not being in sync with what it was expecting. 302 <enum 79 pdg_11ax_invalid_rate_setup>PDG received an 11ax 303 transmit set of parameters that is not allowed or not supported 304 305 <enum 80 txpcu_trig_response_info_too_late>TXPCU generates 306 this flush request because trigger response transmission 307 setup info from the SCH was received too late 308 <enum 81 wifitx_flush_obss_pd_disabled_for_tx>When HWSCH 309 attempts to transmit a packet having obss_pd disabled within 310 an obss_pd opportunity window this flush code is generated 311 312 <enum 82 wifitx_flush_srp_disabled_for_tx>When HWSCH attempts 313 to transmit a packet having SRP disabled within an obss_pd 314 opportunity window this flush code is generated 315 <enum 83 pdg_flreq_code_srp_sr_missed>In SRP SR, PDG will 316 generate flush if receiving PDG_TX_REQ in a blocking window 317 around SRP SR limit 318 <enum 84 pdg_rbo_user_limit_no_data>PDG generates when no 319 data can be sent for the users specified by TX_FES_SETUP 320 field "RBO_must_have_data_user_limit." 321 <enum 85 pdg_no_cbf_response_received>Used by PDG for an 322 MU-MIMO sounding plus steering burst when it did not receive 323 CBF from any recipient STA 324 <enum 86 pdg_flreq_unexpected_notify_frame>PDG generates 325 when encountering a 'HARD_NOTIFY' or a 'SEMI_HARD_NOTIFY' 326 frame unless ignore_tx_notify_setting is set in 'PDG_FES_SETUP' 327 328 <enum 87 pdg_flush_min_ppdu_time_missed>PDG was asked to 329 start a transmission, but the time required to transmit 330 the PPDU is less than the required threshold (flush_min_ppdu_time) 331 332 <enum 88 txpcu_flreq_rxpcu_setup_config_error>Used by TXPCU 333 when Tx is complete and it is about to generate 'EXPECTED_RESPONSE' 334 but it has not got any 'RXPCU_SETUP_COMPLETE' although 'rxpcu_setup_complete_present' 335 was set in 'TX_FES_SETUP' 336 <enum 89 txpcu_flreq_late_trig_tlvs>Used by TXPCU when the 337 'RECEIVED_TRIGER_INFO' TLV is sent to SCH after the 'pre_phy_desc' 338 timer has expired, if enabled 339 <enum 90 pdg_flreq_notify_mpdu_late>Used by PDG when the 340 first 'MPDU_INFO' is not available when sending 'PCU_PPDU_SETUP_START' 341 so PDG has assumed a regular MPDU ('FW_tx_notify_frame = 342 NO_TX_NOTIFY'), but later the MPDU turned out to be a notify 343 frame, if enabled 344 <enum 91 txdma_flreq_sfm_full>TXDMA generates this flush 345 request when it gets 'MPDU_INFO's for a user that it is 346 unable to write into SFM since its SFM allocation is full. 347 348 <enum 92 txpcu_flreq_pre_phy_desc_late>Used in TXPCU for 349 generating a flush request when 'PRE_PHY_DESC' is received 350 late (determined by a timer) 351 <enum 93 pdg_flreq_cannot_fit_trig_response>This flush request 352 code is used by PDG if the trigger response MPDUs cannot 353 be fit to avoid sending only null delimiters for e.g. unassociated 354 UORA and colliding with another STA with valid data. 355 <enum 94 pdg_flreq_unexpected_fes_setup>Flush request used 356 by PDG in case of unexpected 'TX_FES_SETUP' 357 <enum 95 pdg_flreq_code_mlo_abort>Flush request used by 358 PDG in case of MLO constraints forcing an abort 359 <enum 96 hwsch_bkoff_trunc_seq_abort>Flush request used 360 by HWSCH if an MLO backoff truncation request resulted in 361 a forced abort to avoid windows too close to transmissions 362 363 <enum 97 txole_flreq_illegal_frag_settings>Flush request 364 used by TXOLE if fragmentation is requested but the settings 365 are illegal 366 <enum 98 txpcu_flreq_mac_flex_overwrite_err>Flush request 367 used by TXPCU when required overwrite TLVs are not received 368 from microcode, or when overwrite TLVs are dropped in MAC 369 due to SFM full condition 370 <enum 99 txpcu_lmr_req_timeout>Flush request by TXPCU if 371 PHY does not respond to 'MACRX_LMR_READ_REQUEST' or 'MACRX_LMR_DATA_REQUEST' 372 on time 373 <enum 100 txpcu_lmr_phyrx_err_abort>Flush request by TXPCU 374 if PHY sent 'PHYRX_LMR_TRANSFER_ABORT' or 'PHYRX_LMR_READ_REQUEST_ACK' 375 with status anything other than OK 376 <enum 101 txpcu_rx_bitmap_ack_mismatch>Flush request by 377 TXPCU on getting a mismatched TLV from RXPCU for 'RX_FRAME_*BITMAP_ACK' (1Kbit 378 instead of 256-bit or vice versa) 379 <enum 102 txpcu_rx_incorrect_ba_cnt_for_ampdu>Flush request 380 by TXPCU on getting an 'RX_RESPONSE_REQUIRED_INFO' with 381 A-MPDU set, VHT Ack clear and 'response_ba*_cnt' zero, 382 to avoid a system hang 383 <enum 103 txpcu_flreq_cbf_done_delayed>Flush request by 384 TXPCU on not getting a 'MACTX_CBF_DONE' from RXPCU after 385 sending 'RESPONSE_END_STATUS' TLV 386 <enum 104 txpcu_flreq_sfm_full>Flush request by TXPCU if 387 SFM indicates 'user_fifo_full' 388 <enum 105 pdg_flreq_calc_psdu_length_too_low>PDG was asked 389 to start an MU transmission, but one of the users' RU is 390 such that within the PPDU time the PSDU length that can 391 be fit is too low (based on a threshold in a PDG register) 392 393 <enum 106 pdg_flush_min_ppdu_time_obss_sr_missed>PDG was 394 asked to start an OBSS PD SR transmission, but the time 395 required to transmit the PPDU is less than the required 396 threshold (flush_min_ppdu_time_obss_pd_sr) 397 <enum 107 pdg_flreq_code_txop_abort_obss_sr>PDG was asked 398 to start an OBSS PD SR transmission, but the time required 399 for the FES is more than the OBSS PPDU duration (max_fes_time_obss_pd_sr) 400 401 <enum 108 pdg_flreq_cv_corr_tlv_timeout>PDG timed out waiting 402 for CV correlation TLVs from microcode 403 <enum 109 pdg_flreq_pri_user_cbf_fail>Flush request from 404 PDG if CV correlation is enabled and the 'PHYTX_CV_CORR_STATUS' 405 from microcode indicates that the primary user's CBF has 406 failed 407 <enum 110 hwsch_sfm_availability_check_fail>HWSCH-issued 408 flush when the SFM availability check fails during a SIFS 409 burst or when fetching part 2 TLVs 410 <enum 111 pdg_cannot_pad_response_time>PDG uses this code 411 when the response time to pad up to (required_response_time) 412 cannot be met due to the frame length in 'PDG_RESPONSE' 413 exceeding the calculated padded length 414 <enum 112 ul_mu_rx_early_abort>Flush request to terminate 415 an FES when RXPCU aborted an UL MU reception early because 416 at the end of the "early_termination_window," the required 417 number of users with at least one valid MPDU delimiter 418 was not reached. 419 420 <enum 113 reserved_flush_code_25>Placeholder for future 421 needs 422 <enum 114 reserved_flush_code_26>TXPCU uses this code when 423 more than the configured maximum CTS2SELF are being sent. 424 425 <enum 115 reserved_flush_code_27>TXPCU uses this code when 426 at the time of the main PPDU transmission, fewer than the 427 configured minimum CTS2SELF were sent. 428 <enum 116 reserved_flush_code_28>TXDMA uses this code when 429 it is about to issue zero-address or zero-length read or 430 when it read a 'TX_MSDU_LINK' but the Buffer_type field 431 in the uniform descriptor header does not indicate 'Transmit_MSDU_Link_descriptor' 432 433 434 <enum 117 reserved_flush_code_29>TXPCU uses this code when 435 it gets a 'pre_start_tx' pulse from SCH but has not yet 436 got the 'TX_FES_SETUP' TLV 437 438 <enum 118 reserved_flush_code_30>Placeholder for future 439 needs 440 <enum 119 reserved_flush_code_31>Placeholder for future 441 needs 442 <enum 120 reserved_flush_code_32>Placeholder for future 443 needs 444 <enum 121 reserved_flush_code_33>Placeholder for future 445 needs 446 <enum 122 reserved_flush_code_34>Placeholder for future 447 needs 448 <enum 123 reserved_flush_code_35>Placeholder for future 449 needs 450 <enum 124 reserved_flush_code_36>Placeholder for future 451 needs 452 <enum 125 reserved_flush_code_37>Placeholder for future 453 needs 454 <enum 126 reserved_flush_code_38>Placeholder for future 455 needs 456 <enum 127 unknown_flush_request_code>Used by SCH when it 457 receives an undefined flush request reason code 458 */ 459 460 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_OFFSET 0x0000000000000000 461 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_LSB 0 462 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MSB 7 463 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MASK 0x00000000000000ff 464 465 466 /* Description PHYTX_ABORT_REASON 467 468 Field only valid when Flush_req_reason == TXPCU_PHYTX_ABORT_ERR 469 470 471 <enum 0 no_phytx_error_reported>This value is the default 472 value the MAC will fill in the status TLV (when not PHY 473 abort was received). 474 475 Note that when PHY generates the PHYTX_ABORT_REQUEST, this 476 value shall never be used. 477 <enum 1 error_txtd_ifft_underrun>PHY ran out of transmit 478 data due to transmit underrun - this field is user-specific 479 (see user_number field) 480 <enum 2 error_tx_invalid_tlv> 481 <enum 3 error_tx_unexpected_tlv> 482 <enum 4 error_tx_pkt_end_error> 483 <enum 5 error_tx_bw_is_gt_dyn_bw> 484 <enum 6 error_txtd_pkt_start_error> 485 <enum 7 error_txfd_pre_phy_tlv_ooo> 486 <enum 8 error_txtd_mu_data_underrun> 487 <enum 9 error_tx_legacy_rate_illegal> 488 <enum 10 error_tx_fifo_error> 489 <enum 11 error_tx_ack_wd_error> 490 <enum 12 error_tx_tpc_miss> 491 <enum 13 error_mac_tx_abort> 492 <enum 14 error_tx_pcss_phy_desc_wdg_timeout> 493 <enum 15 error_unsupported_cbf> 494 <enum 16 error_cv_static_bandwidth_mismatch> 495 <enum 17 error_cv_dynamic_bandwidth_mismatch> 496 <enum 18 error_cv_unsupported_nss_total> 497 <enum 19 error_nss_bf_params_mismatch> 498 <enum 20 error_txbf_fail> 499 <enum 21 error_txbf_snd_fail>This used to be called 'error_illegal_nss.' 500 501 <enum 22 error_otp_txbf> 502 <enum 23 error_tx_inv_chainmask> 503 <enum 24 error_cv_index_assign_overload>This error indicates 504 that CV prefetch command indicated a CV index that is not 505 available. 506 <enum 25 error_cv_index_delete>This error indicates that 507 CV delete command indicated a CV index that did not contain 508 any valid info 509 <enum 26 error_tx_he_rate_illegal>Error found with the HE 510 transmission parameters 511 <enum 27 error_tx_pcss_wdg_timeout> 512 <enum 28 error_tx_tlv_tag_mismatch> 513 <enum 29 error_tx_cck_fifo_flush> 514 <enum 30 error_tx_no_mac_pkt_end> 515 <enum 31 error_tx_abort_for_mac_war> 516 <enum 32 error_tx_stuck> 517 <enum 33 error_tx_invalid_uplink_tlv> 518 <enum 34 error_txfd_txcck_illegal_tx_rate_error> 519 <enum 35 error_txfd_txcck_underrun_error> 520 <enum 36 error_txfd_mpi_req_grant_error> 521 <enum 37 error_txfd_control_tlv_fifo_ovfl_error> 522 <enum 38 error_txfd_tlv_fifo_overflow_error> 523 <enum 39 error_txfd_data_fifo_underflow_error> 524 <enum 40 error_txfd_data_fifo_overflow_error> 525 <enum 41 error_txfd_service_fifo_overflow_error> 526 <enum 42 error_txfd_he_sigb_fifo_overflow_error> 527 <enum 43 error_txfd_spurious_data_fifo_error> 528 <enum 44 error_txfd_he_siga_fifo_ovfl_error> 529 <enum 45 error_txfd_unknown_tlv_error> 530 <enum 46 error_txfd_mac_response_ordering_error> 531 <enum 47 error_txfd_unexpected_mac_pkt_end_error> 532 <enum 48 error_txfd_tlv_fifo_rd_hang_error>All FIFO read 533 hang errors use this value. 534 <enum 49 error_txfd_tlv_fifo_no_rd_error>All FIFO no read 535 errors use this value. 536 <enum 50 error_txfd_ordering_fifo_no_rd_error> 537 <enum 51 error_txfd_illegal_cf_tlv_error> 538 <enum 52 error_txfd_user_ru_hang_error> 539 <enum 53 error_txfd_stream_ru_hang_error> 540 <enum 54 error_txfd_num_pad_bits_error> 541 <enum 55 error_txfd_phy_abort_ack_wd_to_error> 542 <enum 56 error_txfd_pre_pkt_isr_not_done_before_phy_desc_error> 543 544 <enum 57 error_txfd_bf_weights_not_ready_error> 545 <enum 58 error_txfd_req_timer_breach_error> 546 <enum 59 error_txfd_wd_to_error> 547 <enum 60 error_txfd_legacy_bf_weights_not_ready_error> 548 <enum 61 error_txfd_axi_slave_to_error> 549 <enum 62 error_txfd_hw_acc_error> 550 <enum 63 error_txfd_txb_req_fifo_underrun_error> 551 <enum 64 error_txfd_unknown_ru_alloc_error> 552 <enum 65 error_txfd_more_user_desc_per_user_tlvs_error> 553 <enum 66 error_txfd_ldpc_param_calc_to_error> 554 <enum 69 error_txfd_cbf_start_before_expect_cbf_clear_error> 555 556 <enum 70 error_txfd_out_of_range_cbf_user_id_error> 557 <enum 71 error_txfd_less_cbf_data_error> 558 <enum 72 error_txfd_more_cbf_data_error> 559 <enum 73 error_txfd_cbf_done_not_received_error> 560 <enum 74 error_txfd_mpi_cbf_valid_to_error> 561 <enum 75 error_txfd_cbf_start_missing_error> 562 <enum 76 error_txfd_mimo_ctrl_error> 563 <enum 77 error_txfd_cbf_buffer_ovfl_error> 564 <enum 78 error_txfd_dma0_hang_error> 565 <enum 79 error_txfd_dma1_hang_error> 566 <enum 80 error_txfd_b2b_cbf_start_error> 567 <enum 81 error_txfd_b2b_cbf_done_error> 568 <enum 82 error_txfd_unsaved_cv_error> 569 <enum 83 error_txfd_wt_mem_wr_conflict_error> 570 <enum 84 error_txfd_wt_mem_rd_conflict_error> 571 <enum 85 error_txfd_qre_intf_to_error> 572 <enum 86 error_txfd_qre_txbf_stomp_rx_error> 573 <enum 87 error_txfd_qre_rx_stomp_txbf_error> 574 <enum 88 error_txfd_precoding_start_before_bf_param_clr_error> 575 576 <enum 89 error_txfd_tone_map_lut_rd_conflict_error> 577 <enum 90 error_txfd_precoding_fifo_ovfl_error> 578 <enum 91 error_txfd_precoding_fifo_udfl_error> 579 <enum 92 error_txfd_txbf_axi_slave_to_error> 580 <enum 93 error_txfd_less_prefetch_tlvs_error> 581 <enum 94 error_txfd_more_prefetch_tlvs_error> 582 <enum 95 error_txfd_prefetch_fifo_ovfl_error> 583 <enum 96 error_txfd_prefetch_fifo_udfl_error> 584 <enum 97 error_txfd_precoding_error> 585 <enum 98 error_txfd_cv_ctrl_state_to_error> 586 <enum 99 error_txfd_txbfp_qre_tone_udfl_error> 587 <enum 100 error_txfd_less_bf_param_per_user_tlvs_error> 588 <enum 101 error_txfd_more_bf_param_per_user_tlvs_error> 589 <enum 102 error_txfd_bf_param_common_unexpected_error> 590 <enum 103 error_txfd_less_expect_cbf_per_user_tlvs_error> 591 592 <enum 104 error_txfd_more_expect_cbf_per_user_tlvs_error> 593 594 <enum 105 error_txfd_precoding_stg1_stg2_wait_to_error> 595 <enum 106 error_txfd_expect_cbf_per_user_before_common_error> 596 597 <enum 107 error_txfd_prefetch_per_user_before_common_error> 598 599 <enum 108 error_txfd_bf_param_per_user_before_common_error> 600 601 <enum 109 error_txfd_ndp_cbf_bw_mismatch_error> 602 <enum 110 error_txtd_tx_pre_desc_error> 603 <enum 111 error_txtd_tx_desc_error> 604 <enum 112 error_txtd_start_error> 605 <enum 113 error_txtd_sym_error> 606 <enum 114 error_txtd_multi_sym_error> 607 <enum 115 error_txtd_pre_data_error> 608 <enum 116 error_txtd_pkt_data_error> 609 <enum 117 error_txtd_pkt_end_error> 610 <enum 118 error_txtd_tx_frame_unexp> 611 <enum 119 error_txtd_start_unexp> 612 <enum 120 error_txtd_fft_error_1> 613 <enum 121 error_txtd_fft_error_2> 614 <enum 122 error_txtd_uld_sym_cp_len_zero> 615 <enum 123 error_txtd_start_done> 616 <enum 124 error_txtd_start_nonidle> 617 <enum 125 error_txtd_tx_abort_nonidle> 618 <enum 126 error_txtd_tx_abort_done> 619 <enum 127 error_txtd_tx_abort_idle> 620 <enum 128 error_txtd_cck_sample_overflow> 621 <enum 129 error_txtd_cck_timeout> 622 <enum 130 error_txtd_ofdm_sym_mismatch> 623 <enum 131 error_txtd_tx_vld_unalign_error> 624 <enum 132 error_txtd_fft_cdc_fifo>This is the merged Rx/Tx 625 CDC FIFO empty/full error code 626 <enum 133 error_mac_tb_ppdu_abort>All 'error_txtd_chn' codes 627 use this value as well. 628 <enum 136 error_abort_req_from_macrx_enum_05>This code is 629 used to abort the Tx when MAC Rx issues an abort request 630 with code 05 "macrx_abort_too_much_bad_data." 631 <enum 137 error_tx_extra_sym_mismatch> 632 <enum 138 error_tx_vht_length_not_multiple_of_3> 633 <enum 139 error_tx_11b_rate_illegal> 634 <enum 140 error_tx_ht_rate_illegal> 635 <enum 141 error_tx_vht_rate_illegal> 636 <enum 142 error_mac_rf_only_abort> 637 <enum 255 error_tx_invalid_error_code> 638 */ 639 640 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_OFFSET 0x0000000000000000 641 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_LSB 8 642 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MSB 15 643 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MASK 0x000000000000ff00 644 645 646 /* Description FLUSH_REQ_USER_NUMBER_OR_LINK_ID 647 648 Field only valid when Flush_req_reason == TXPCU_PHYTX_ABORT_ERR 649 or PDG_FLREQ_CODE_{TXOP, MLO}_ABORT 650 651 In case of TXPCU_PHYTX_ABORT_ERR, for some errors, the user 652 for which this error was detected can be indicated in this 653 field. 654 655 In case of PDG_FLREQ_CODE_*_ABORT due to MLO, this field 656 will carry the partner link ID and validity due to which 657 the abort was initiated. 658 Bit [5]: partner link ID valid 659 Bits [4:3]: set to 0 660 Bits [2:0]: partner link ID 661 <legal 0-39> 662 */ 663 664 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_OFFSET 0x0000000000000000 665 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_LSB 16 666 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MSB 21 667 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MASK 0x00000000003f0000 668 669 670 /* Description MLO_ABORT_REASON 671 672 Field valid only when Flush_req_reason == PDG_FLREQ_CODE_{TXOP, 673 MLO}_ABORT 674 675 <enum 0 sw_blocked_self> SW-specified block of the peer 676 for self-link 677 <enum 1 sw_blocked_partner> SW-specified block of the peer 678 from a partner link 679 <enum 2 rx_ongoing> Blocked due to RX ongoing in partner 680 link 681 <enum 3 cts2self_truncated> MLO truncated CTS2SELF leading 682 to abort 683 <enum 4 max_padding_exceeded> Maximum padding exceeded 684 <enum 5 max_overlap_exceeded> Maximum overlap duration exceeded 685 686 <enum 6 user_collision_threshold_exceeded> User collision 687 threshold for MU exceeded 688 <enum 7 sw_blocked_vdev_id> SW-specified block due to VDEV 689 ID collision with a non-MLO broadcast/multicast 690 <enum 8 r2r_response_truncated> 691 <enum 10 emlsr_blackout> Blocked due to EMLSR black-out 692 window 693 <enum 16 t2_response_changed> T2 response changed in 'MLO_TX_RESP' 694 695 <enum 17 ppdu_duration_zero> PPDU duration zero in 'MLO_TX_RESP' 696 697 <enum 18 ppdu_duration_bigger_than_allowed> PPDU duration 698 bigger than allowed in non-response mode 'MLO_TX_RESP' 699 <enum 19 ppdu_padding_not_allowed> PPDU in non-A-MPDU format 700 cannot be padded 701 <enum 20 resp_ppdu_duration_truncated> PPDU duration truncated 702 in response mode 'MLO_TX_RESP' 703 <enum 21 ppdu_duration_limit> flush generated due to TXOP 704 abort 705 <enum 22 overview_mpdu_cnt_zero> flush generated due to 706 TXOP abort as MPDU count is zero for all users in 'MPDU_QUEUE_OVERVIEW' 707 708 <enum 23 overview_not_ready> flush generated due to MLO 709 abort as 'MPDU_QUEUE_OVERVIEW' is not ready for all users 710 at PPDU phase 711 <enum 24 trigger_frame_mlo_alignment_fail> Trigger frame 712 end-alignment cannot be met, e.g. due to LDPC extra symbol 713 714 <enum 9 mlo_reserved> 715 */ 716 717 #define TX_FLUSH_REQ_MLO_ABORT_REASON_OFFSET 0x0000000000000000 718 #define TX_FLUSH_REQ_MLO_ABORT_REASON_LSB 22 719 #define TX_FLUSH_REQ_MLO_ABORT_REASON_MSB 26 720 #define TX_FLUSH_REQ_MLO_ABORT_REASON_MASK 0x0000000007c00000 721 722 723 /* Description RESERVED_0A 724 725 <legal 0> 726 */ 727 728 #define TX_FLUSH_REQ_RESERVED_0A_OFFSET 0x0000000000000000 729 #define TX_FLUSH_REQ_RESERVED_0A_LSB 27 730 #define TX_FLUSH_REQ_RESERVED_0A_MSB 31 731 #define TX_FLUSH_REQ_RESERVED_0A_MASK 0x00000000f8000000 732 733 734 /* Description TLV64_PADDING 735 736 Automatic DWORD padding inserted while converting TLV32 737 to TLV64 for 64 bit ARCH 738 <legal 0> 739 */ 740 741 #define TX_FLUSH_REQ_TLV64_PADDING_OFFSET 0x0000000000000000 742 #define TX_FLUSH_REQ_TLV64_PADDING_LSB 32 743 #define TX_FLUSH_REQ_TLV64_PADDING_MSB 63 744 #define TX_FLUSH_REQ_TLV64_PADDING_MASK 0xffffffff00000000 745 746 747 748 #endif // TX_FLUSH_REQ 749