xref: /wlan-dirver/fw-api/hw/qcn6432/phyrx_he_sig_a_mu_dl.h (revision c3fae0027cee33fc678d59c8f87f857a99c25436)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _PHYRX_HE_SIG_A_MU_DL_H_
18 #define _PHYRX_HE_SIG_A_MU_DL_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "he_sig_a_mu_dl_info.h"
23 #define NUM_OF_DWORDS_PHYRX_HE_SIG_A_MU_DL 2
24 
25 #define NUM_OF_QWORDS_PHYRX_HE_SIG_A_MU_DL 1
26 
27 
28 struct phyrx_he_sig_a_mu_dl {
29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
30              struct   he_sig_a_mu_dl_info                                       phyrx_he_sig_a_mu_dl_info_details;
31 #else
32              struct   he_sig_a_mu_dl_info                                       phyrx_he_sig_a_mu_dl_info_details;
33 #endif
34 };
35 
36 
37 /* Description		PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS
38 
39 			See detailed description of the STRUCT
40 */
41 
42 
43 /* Description		DL_UL_FLAG
44 
45 			Differentiates between DL and UL transmission
46 
47 			<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
48 			<enum 1 DL_UL_FLAG_IS_UL>
49 			NOTE: This is unsupported for "HE MU" format (including "MU_SU")
50 			<legal all>
51 */
52 
53 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_OFFSET    0x0000000000000000
54 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_LSB       0
55 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_MSB       0
56 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_MASK      0x0000000000000001
57 
58 
59 /* Description		MCS_OF_SIG_B
60 
61 			Indicates the MCS of HE-SIG-B
62 			<legal 0-5>
63 */
64 
65 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_OFFSET  0x0000000000000000
66 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_LSB     1
67 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_MSB     3
68 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_MASK    0x000000000000000e
69 
70 
71 /* Description		DCM_OF_SIG_B
72 
73 			Indicates whether dual sub-carrier modulation is applied
74 			 to HE-SIG-B
75 
76 			0: No DCM for HE_SIG_B
77 			1: DCM for HE_SIG_B
78 			<legal all>
79 */
80 
81 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_OFFSET  0x0000000000000000
82 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_LSB     4
83 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_MSB     4
84 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_MASK    0x0000000000000010
85 
86 
87 /* Description		BSS_COLOR_ID
88 
89 			BSS color ID
90 
91 			Field Used by MAC HW
92 			<legal all>
93 */
94 
95 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_OFFSET  0x0000000000000000
96 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_LSB     5
97 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_MSB     10
98 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_MASK    0x00000000000007e0
99 
100 
101 /* Description		SPATIAL_REUSE
102 
103 			Spatial reuse
104 
105 			For 20MHz one SR field corresponding to entire 20MHz (other
106 			 3 fields indicate identical values)
107 			For 40MHz two SR fields for each 20MHz (other 2 fields indicate
108 			 identical values)
109 			For 80MHz four SR fields for each 20MHz
110 			For 160MHz four SR fields for each 40MHz
111 			<legal all>
112 */
113 
114 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x0000000000000000
115 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_LSB    11
116 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_MSB    14
117 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_MASK   0x0000000000007800
118 
119 
120 /* Description		TRANSMIT_BW
121 
122 			Bandwidth of the PPDU.
123 
124 			<enum 0 HE_SIG_A_MU_DL_BW20> 20 Mhz
125 			<enum 1 HE_SIG_A_MU_DL_BW40> 40 Mhz
126 			<enum 2 HE_SIG_A_MU_DL_BW80> 80 MHz non-preamble puncturing
127 			 mode
128 			<enum 3 HE_SIG_A_MU_DL_BW160> 160 MHz and 80+80 MHz non-preamble
129 			 puncturing mode
130 			<enum 4 HE_SIG_A_MU_DL_BW80_SEC_20_PUNC> for preamble puncturing
131 			 in 80 MHz, where in the preamble only the secondary 20
132 			MHz is punctured
133 			<enum 5 HE_SIG_A_MU_DL_BW80_20_PUNC_IN_SEC_40> for preamble
134 			 puncturing in 80 MHz, where in the preamble only one of
135 			 the two 20 MHz sub-channels in secondary 40 MHz is punctured.
136 
137 			<enum 6 HE_SIG_A_MU_DL_BW160_SEC_20_PUNC> for preamble puncturing
138 			 in 160 MHz or 80+80 MHz, where in the primary 80 MHz of
139 			 the preamble only the secondary 20 MHz is punctured.
140 			<enum 7 HE_SIG_A_MU_DL_BW160_SEC_40_80_PUNC> for preamble
141 			 puncturing in 160 MHz or 80+80 MHz, where in the primary
142 			 80 MHz of the preamble the primary 40 MHz is present.
143 
144 			On RX side, Field Used by MAC HW
145 			<legal 0-7>
146 */
147 
148 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_OFFSET   0x0000000000000000
149 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_LSB      15
150 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_MSB      17
151 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_MASK     0x0000000000038000
152 
153 
154 /* Description		NUM_SIG_B_SYMBOLS
155 
156 			Number of symbols
157 
158 			For OFDMA, the actual number of symbols is 1 larger then
159 			 indicated in this field.
160 
161 			For MU-MIMO this is equal to the number of users - 1: the
162 			 following encoding is used:
163 			1 => 2 users
164 			2 => 3 users
165 			Etc.
166 
167 			<legal all>
168 */
169 
170 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_OFFSET 0x0000000000000000
171 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_LSB 18
172 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_MSB 21
173 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_MASK 0x00000000003c0000
174 
175 
176 /* Description		COMP_MODE_SIG_B
177 
178 			Indicates the compression mode of HE-SIG-B
179 
180 			0: Regular [uncomp mode]
181 			1: compressed mode (full-BW MU-MIMO only)
182 			<legal all>
183 */
184 
185 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_OFFSET 0x0000000000000000
186 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_LSB  22
187 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_MSB  22
188 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_MASK 0x0000000000400000
189 
190 
191 /* Description		CP_LTF_SIZE
192 
193 			Indicates the CP and HE-LTF type
194 
195 			<enum 0 MU_FourX_LTF_0_8CP> 4xLTF + 0.8 us CP
196 			<enum 1 MU_TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
197 			<enum 2 MU_TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
198 			<enum 3 MU_FourX_LTF_3_2CP> 4x LTF + 3.2 µs CP
199 
200 			<legal all>
201 */
202 
203 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_OFFSET   0x0000000000000000
204 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_LSB      23
205 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_MSB      24
206 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_MASK     0x0000000001800000
207 
208 
209 /* Description		DOPPLER_INDICATION
210 
211 			0: No Doppler support
212 			1: Doppler support
213 			<legal all>
214 */
215 
216 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_OFFSET 0x0000000000000000
217 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_LSB 25
218 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_MSB 25
219 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_MASK 0x0000000002000000
220 
221 
222 /* Description		RESERVED_0A
223 
224 			<legal 0>
225 */
226 
227 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_OFFSET   0x0000000000000000
228 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_LSB      26
229 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_MSB      31
230 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_MASK     0x00000000fc000000
231 
232 
233 /* Description		TXOP_DURATION
234 
235 			Indicates the remaining time in the current TXOP
236 
237 			Field Used by MAC HW
238 			 <legal all>
239 */
240 
241 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_OFFSET 0x0000000000000000
242 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_LSB    32
243 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_MSB    38
244 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_MASK   0x0000007f00000000
245 
246 
247 /* Description		RESERVED_1A
248 
249 			Note: spec indicates this shall be set to 1
250 			<legal 1>
251 */
252 
253 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_OFFSET   0x0000000000000000
254 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_LSB      39
255 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_MSB      39
256 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_MASK     0x0000008000000000
257 
258 
259 /* Description		NUM_LTF_SYMBOLS
260 
261 			Indicates the number of HE-LTF symbols
262 
263 			0: 1 LTF
264 			1: 2 LTFs
265 			2: 4 LTFs
266 			3: 6 LTFs
267 			4: 8 LTFs
268 
269 			<legal all>
270 */
271 
272 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_OFFSET 0x0000000000000000
273 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_LSB  40
274 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_MSB  42
275 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_MASK 0x0000070000000000
276 
277 
278 /* Description		LDPC_EXTRA_SYMBOL
279 
280 			If LDPC,
281 			  0: LDPC extra symbol not present
282 			  1: LDPC extra symbol present
283 			Else
284 			  Set to 1
285 			<legal all>
286 */
287 
288 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET 0x0000000000000000
289 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB 43
290 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MSB 43
291 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK 0x0000080000000000
292 
293 
294 /* Description		STBC
295 
296 			Indicates whether STBC is applied
297 			0: No STBC
298 			1: STBC
299 			<legal all>
300 */
301 
302 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_OFFSET          0x0000000000000000
303 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_LSB             44
304 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_MSB             44
305 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_MASK            0x0000100000000000
306 
307 
308 /* Description		PACKET_EXTENSION_A_FACTOR
309 
310 			the packet extension duration of the trigger-based PPDU
311 			response with these two bits indicating the "a-factor"
312 
313 			<enum 0 a_factor_4>
314 			<enum 1 a_factor_1>
315 			<enum 2 a_factor_2>
316 			<enum 3 a_factor_3>
317 
318 			<legal all>
319 */
320 
321 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_OFFSET 0x0000000000000000
322 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_LSB 45
323 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MSB 46
324 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MASK 0x0000600000000000
325 
326 
327 /* Description		PACKET_EXTENSION_PE_DISAMBIGUITY
328 
329 			the packet extension duration of the trigger-based PPDU
330 			response with this bit indicating the PE-Disambiguity
331 			<legal all>
332 */
333 
334 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x0000000000000000
335 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 47
336 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MSB 47
337 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x0000800000000000
338 
339 
340 /* Description		CRC
341 
342 			CRC for HE-SIG-A contents.
343 			<legal all>
344 */
345 
346 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_OFFSET           0x0000000000000000
347 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_LSB              48
348 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_MSB              51
349 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_MASK             0x000f000000000000
350 
351 
352 /* Description		TAIL
353 
354 			<legal 0>
355 */
356 
357 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_OFFSET          0x0000000000000000
358 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_LSB             52
359 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_MSB             57
360 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_MASK            0x03f0000000000000
361 
362 
363 /* Description		RESERVED_1B
364 
365 			<legal 0>
366 */
367 
368 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_OFFSET   0x0000000000000000
369 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_LSB      58
370 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_MSB      62
371 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_MASK     0x7c00000000000000
372 
373 
374 /* Description		RX_INTEGRITY_CHECK_PASSED
375 
376 			TX side: Set to 0
377 			RX side: Set to 1 if PHY determines the HE-SIG-A CRC check
378 			 has passed, else set to 0
379 
380 			<legal all>
381 */
382 
383 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000
384 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 63
385 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 63
386 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x8000000000000000
387 
388 
389 
390 #endif   // PHYRX_HE_SIG_A_MU_DL
391