xref: /wlan-dirver/fw-api/hw/qcc2072/v1/msmhwiobase.h (revision 57d7edab19a173729467e81c5cecfdb994ac9169)
1 /*
2  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 #ifndef MSMHWIOBASE_H
17 #define MSMHWIOBASE_H
18 
19 #define HOST_WCSS_WCSS_BASE                                                0x0
20 #define HOST_WCSS_WCSS_BASE_SIZE                                    0x00d00000
21 #define HOST_WCSS_WCSS_BASE_PHYS                                    0x00000000
22 
23 #define HOST_TLMM_BASE                                               0x1a00000
24 #define HOST_TLMM_BASE_SIZE                                         0x00100000
25 #define HOST_TLMM_BASE_PHYS                                         0x01a00000
26 
27 #define HOST_CORE_TOP_CSR_BASE                                       0x1b00000
28 #define HOST_CORE_TOP_CSR_BASE_SIZE                                 0x0003f000
29 #define HOST_CORE_TOP_CSR_BASE_PHYS                                 0x01b00000
30 
31 #define HOST_SOC_WFSS_CE_REG_BASE                                    0x1b80000
32 #define HOST_SOC_WFSS_CE_REG_BASE_SIZE                              0x0001c000
33 #define HOST_SOC_WFSS_CE_REG_BASE_PHYS                              0x01b80000
34 
35 #define HOST_WL_TLMM_BASE                                            0x1bc0000
36 #define HOST_WL_TLMM_BASE_SIZE                                      0x00020000
37 #define HOST_WL_TLMM_BASE_PHYS                                      0x01bc0000
38 
39 #define HOST_TSENS_SROT_BASE                                         0x1bf0000
40 #define HOST_TSENS_SROT_BASE_SIZE                                   0x00001000
41 #define HOST_TSENS_SROT_BASE_PHYS                                   0x01bf0000
42 
43 #define HOST_TSENS_TM_BASE                                           0x1bf1000
44 #define HOST_TSENS_TM_BASE_SIZE                                     0x00001000
45 #define HOST_TSENS_TM_BASE_PHYS                                     0x01bf1000
46 
47 #define HOST_QDSS_QDSS_BASE                                          0x1c00000
48 #define HOST_QDSS_QDSS_BASE_SIZE                                    0x00080000
49 #define HOST_QDSS_QDSS_BASE_PHYS                                    0x01c00000
50 
51 #define HOST_QDSS_WRAPPER_TOP_BASE                                   0x1c80000
52 #define HOST_QDSS_WRAPPER_TOP_BASE_SIZE                             0x0007fffd
53 #define HOST_QDSS_WRAPPER_TOP_BASE_PHYS                             0x01c80000
54 
55 #define HOST_QDSS_APB_WCSS_DBG_DEC_QDSS_APB_WCSSDBG_BASE             0x1d00000
56 #define HOST_QDSS_APB_WCSS_DBG_DEC_QDSS_APB_WCSSDBG_BASE_SIZE       0x00100000
57 #define HOST_QDSS_APB_WCSS_DBG_DEC_QDSS_APB_WCSSDBG_BASE_PHYS       0x01d00000
58 
59 #define HOST_PCIE_PCIE_TOP_WRAPPER_BASE                              0x1e00000
60 #define HOST_PCIE_PCIE_TOP_WRAPPER_BASE_SIZE                        0x00020000
61 #define HOST_PCIE_PCIE_TOP_WRAPPER_BASE_PHYS                        0x01e00000
62 
63 #define HOST_SECURITY_CONTROL_WLAN_BASE                              0x1e20000
64 #define HOST_SECURITY_CONTROL_WLAN_BASE_SIZE                        0x00008000
65 #define HOST_SECURITY_CONTROL_WLAN_BASE_PHYS                        0x01e20000
66 
67 #define HOST_EDPD_CAL_ACC_BASE                                       0x1e28000
68 #define HOST_EDPD_CAL_ACC_BASE_SIZE                                 0x00003000
69 #define HOST_EDPD_CAL_ACC_BASE_PHYS                                 0x01e28000
70 
71 #define HOST_CPR_CX_CPR3_BASE                                        0x1e30000
72 #define HOST_CPR_CX_CPR3_BASE_SIZE                                  0x00004000
73 #define HOST_CPR_CX_CPR3_BASE_PHYS                                  0x01e30000
74 
75 #define HOST_CPR_MX_CPR3_BASE                                        0x1e34000
76 #define HOST_CPR_MX_CPR3_BASE_SIZE                                  0x00004000
77 #define HOST_CPR_MX_CPR3_BASE_PHYS                                  0x01e34000
78 
79 #define HOST_HZ_AUXSSAUXSS_SWI_BASE                                  0x1e38000
80 #define HOST_HZ_AUXSSAUXSS_SWI_BASE_SIZE                            0x00007000
81 #define HOST_HZ_AUXSSAUXSS_SWI_BASE_PHYS                            0x01e38000
82 
83 #define HOST_GCC_GCC_BASE                                            0x1e40000
84 #define HOST_GCC_GCC_BASE_SIZE                                      0x0000048c
85 #define HOST_GCC_GCC_BASE_PHYS                                      0x01e40000
86 
87 #define HOST_PCNOC_0_BUS_TIMEOUT_BASE                                0x1e60000
88 #define HOST_PCNOC_0_BUS_TIMEOUT_BASE_SIZE                          0x00001000
89 #define HOST_PCNOC_0_BUS_TIMEOUT_BASE_PHYS                          0x01e60000
90 
91 #define HOST_PCNOC_1_BUS_TIMEOUT_BASE                                0x1e61000
92 #define HOST_PCNOC_1_BUS_TIMEOUT_BASE_SIZE                          0x00001000
93 #define HOST_PCNOC_1_BUS_TIMEOUT_BASE_PHYS                          0x01e61000
94 
95 #define HOST_PCNOC_2_BUS_TIMEOUT_BASE                                0x1e62000
96 #define HOST_PCNOC_2_BUS_TIMEOUT_BASE_SIZE                          0x00001000
97 #define HOST_PCNOC_2_BUS_TIMEOUT_BASE_PHYS                          0x01e62000
98 
99 #define HOST_PCNOC_3_BUS_TIMEOUT_BASE                                0x1e63000
100 #define HOST_PCNOC_3_BUS_TIMEOUT_BASE_SIZE                          0x00001000
101 #define HOST_PCNOC_3_BUS_TIMEOUT_BASE_PHYS                          0x01e63000
102 
103 #define HOST_PCNOC_4_BUS_TIMEOUT_BASE                                0x1e64000
104 #define HOST_PCNOC_4_BUS_TIMEOUT_BASE_SIZE                          0x00001000
105 #define HOST_PCNOC_4_BUS_TIMEOUT_BASE_PHYS                          0x01e64000
106 
107 #define HOST_RRI_PREFETCH_REG_BASE                                   0x1e70000
108 #define HOST_RRI_PREFETCH_REG_BASE_SIZE                             0x00010000
109 #define HOST_RRI_PREFETCH_REG_BASE_PHYS                             0x01e70000
110 
111 #define HOST_SYSTEM_NOC_BASE                                         0x1e80000
112 #define HOST_SYSTEM_NOC_BASE_SIZE                                   0x0000a000
113 #define HOST_SYSTEM_NOC_BASE_PHYS                                   0x01e80000
114 
115 #define HOST_PC_NOC_BASE                                             0x1f00000
116 #define HOST_PC_NOC_BASE_SIZE                                       0x00003880
117 #define HOST_PC_NOC_BASE_PHYS                                       0x01f00000
118 
119 #define HOST_WLAON_WL_AON_REG_BASE                                   0x1f80000
120 #define HOST_WLAON_WL_AON_REG_BASE_SIZE                             0x000007f0
121 #define HOST_WLAON_WL_AON_REG_BASE_PHYS                             0x01f80000
122 
123 #define HOST_SYSPM_SYSPM_REG_BASE                                    0x1f82000
124 #define HOST_SYSPM_SYSPM_REG_BASE_SIZE                              0x00001000
125 #define HOST_SYSPM_SYSPM_REG_BASE_PHYS                              0x01f82000
126 
127 #define HOST_PMU_WLAN_PMU_TOP_BASE                                   0x1f88000
128 #define HOST_PMU_WLAN_PMU_TOP_BASE_SIZE                             0x00000400
129 #define HOST_PMU_WLAN_PMU_TOP_BASE_PHYS                             0x01f88000
130 
131 #define HOST_PMU_NOC_BASE                                            0x1f8a000
132 #define HOST_PMU_NOC_BASE_SIZE                                      0x00000080
133 #define HOST_PMU_NOC_BASE_PHYS                                      0x01f8a000
134 
135 #define HOST_SYSTEM_IRAM                                             0x1400000
136 #define HOST_SYSTEM_IRAM_SIZE                                       0x00025000
137 #define HOST_SYSTEM_IRAM_PHYS                                       0x01400000
138 
139 #define HOST_PCIE_ATU_REGION                                         0x4000000
140 #define HOST_PCIE_ATU_REGION_SIZE                                   0x40000000
141 #define HOST_PCIE_ATU_REGION_PHYS                                   0x04000000
142 
143 #endif
144