xref: /wlan-dirver/fw-api/hw/qcc2072/v1/buffer_addr_info.h (revision e157a886749af4a591d29af2763a38c5f177eda0)
1 /*
2  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _BUFFER_ADDR_INFO_H_
19 #define _BUFFER_ADDR_INFO_H_
20 
21 #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
22 
23 struct buffer_addr_info {
24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
25              uint32_t buffer_addr_31_0                                        : 32;
26              uint32_t buffer_addr_39_32                                       :  8,
27                       return_buffer_manager                                   :  4,
28                       sw_buffer_cookie                                        : 20;
29 #else
30              uint32_t buffer_addr_31_0                                        : 32;
31              uint32_t sw_buffer_cookie                                        : 20,
32                       return_buffer_manager                                   :  4,
33                       buffer_addr_39_32                                       :  8;
34 #endif
35 };
36 
37 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET                                    0x00000000
38 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_LSB                                       0
39 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_MSB                                       31
40 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_MASK                                      0xffffffff
41 
42 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET                                   0x00000004
43 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_LSB                                      0
44 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_MSB                                      7
45 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_MASK                                     0x000000ff
46 
47 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET                               0x00000004
48 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB                                  8
49 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB                                  11
50 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK                                 0x00000f00
51 
52 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET                                    0x00000004
53 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_LSB                                       12
54 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_MSB                                       31
55 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_MASK                                      0xfffff000
56 
57 #endif
58