xref: /wlan-dirver/fw-api/hw/qca5332/reo_get_queue_stats_status.h (revision 36637cf1775e28c58b692de245b10cbcd02fa7c3)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 
19 
20 
21 
22 
23 
24 
25 
26 #ifndef _REO_GET_QUEUE_STATS_STATUS_H_
27 #define _REO_GET_QUEUE_STATS_STATUS_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #include "uniform_reo_status_header.h"
32 #define NUM_OF_DWORDS_REO_GET_QUEUE_STATS_STATUS 26
33 
34 #define NUM_OF_QWORDS_REO_GET_QUEUE_STATS_STATUS 13
35 
36 
37 struct reo_get_queue_stats_status {
38 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
39              struct   uniform_reo_status_header                                 status_header;
40              uint32_t ssn                                                     : 12, // [11:0]
41                       current_index                                           : 10, // [21:12]
42                       reserved_2                                              : 10; // [31:22]
43              uint32_t pn_31_0                                                 : 32; // [31:0]
44              uint32_t pn_63_32                                                : 32; // [31:0]
45              uint32_t pn_95_64                                                : 32; // [31:0]
46              uint32_t pn_127_96                                               : 32; // [31:0]
47              uint32_t last_rx_enqueue_timestamp                               : 32; // [31:0]
48              uint32_t last_rx_dequeue_timestamp                               : 32; // [31:0]
49              uint32_t rx_bitmap_31_0                                          : 32; // [31:0]
50              uint32_t rx_bitmap_63_32                                         : 32; // [31:0]
51              uint32_t rx_bitmap_95_64                                         : 32; // [31:0]
52              uint32_t rx_bitmap_127_96                                        : 32; // [31:0]
53              uint32_t rx_bitmap_159_128                                       : 32; // [31:0]
54              uint32_t rx_bitmap_191_160                                       : 32; // [31:0]
55              uint32_t rx_bitmap_223_192                                       : 32; // [31:0]
56              uint32_t rx_bitmap_255_224                                       : 32; // [31:0]
57              uint32_t rx_bitmap_287_256                                       : 32; // [31:0]
58              uint32_t current_mpdu_count                                      :  7, // [6:0]
59                       current_msdu_count                                      : 25; // [31:7]
60              uint32_t window_jump_2k                                          :  4, // [3:0]
61                       timeout_count                                           :  6, // [9:4]
62                       forward_due_to_bar_count                                :  6, // [15:10]
63                       duplicate_count                                         : 16; // [31:16]
64              uint32_t frames_in_order_count                                   : 24, // [23:0]
65                       bar_received_count                                      :  8; // [31:24]
66              uint32_t mpdu_frames_processed_count                             : 32; // [31:0]
67              uint32_t msdu_frames_processed_count                             : 32; // [31:0]
68              uint32_t total_processed_byte_count                              : 32; // [31:0]
69              uint32_t late_receive_mpdu_count                                 : 12, // [11:0]
70                       hole_count                                              : 16, // [27:12]
71                       get_queue_1k_stats_status_to_follow                     :  1, // [28:28]
72                       reserved_24a                                            :  3; // [31:29]
73              uint32_t aging_drop_mpdu_count                                   : 16, // [15:0]
74                       aging_drop_interval                                     :  8, // [23:16]
75                       reserved_25a                                            :  4, // [27:24]
76                       looping_count                                           :  4; // [31:28]
77 #else
78              struct   uniform_reo_status_header                                 status_header;
79              uint32_t reserved_2                                              : 10, // [31:22]
80                       current_index                                           : 10, // [21:12]
81                       ssn                                                     : 12; // [11:0]
82              uint32_t pn_31_0                                                 : 32; // [31:0]
83              uint32_t pn_63_32                                                : 32; // [31:0]
84              uint32_t pn_95_64                                                : 32; // [31:0]
85              uint32_t pn_127_96                                               : 32; // [31:0]
86              uint32_t last_rx_enqueue_timestamp                               : 32; // [31:0]
87              uint32_t last_rx_dequeue_timestamp                               : 32; // [31:0]
88              uint32_t rx_bitmap_31_0                                          : 32; // [31:0]
89              uint32_t rx_bitmap_63_32                                         : 32; // [31:0]
90              uint32_t rx_bitmap_95_64                                         : 32; // [31:0]
91              uint32_t rx_bitmap_127_96                                        : 32; // [31:0]
92              uint32_t rx_bitmap_159_128                                       : 32; // [31:0]
93              uint32_t rx_bitmap_191_160                                       : 32; // [31:0]
94              uint32_t rx_bitmap_223_192                                       : 32; // [31:0]
95              uint32_t rx_bitmap_255_224                                       : 32; // [31:0]
96              uint32_t rx_bitmap_287_256                                       : 32; // [31:0]
97              uint32_t current_msdu_count                                      : 25, // [31:7]
98                       current_mpdu_count                                      :  7; // [6:0]
99              uint32_t duplicate_count                                         : 16, // [31:16]
100                       forward_due_to_bar_count                                :  6, // [15:10]
101                       timeout_count                                           :  6, // [9:4]
102                       window_jump_2k                                          :  4; // [3:0]
103              uint32_t bar_received_count                                      :  8, // [31:24]
104                       frames_in_order_count                                   : 24; // [23:0]
105              uint32_t mpdu_frames_processed_count                             : 32; // [31:0]
106              uint32_t msdu_frames_processed_count                             : 32; // [31:0]
107              uint32_t total_processed_byte_count                              : 32; // [31:0]
108              uint32_t reserved_24a                                            :  3, // [31:29]
109                       get_queue_1k_stats_status_to_follow                     :  1, // [28:28]
110                       hole_count                                              : 16, // [27:12]
111                       late_receive_mpdu_count                                 : 12; // [11:0]
112              uint32_t looping_count                                           :  4, // [31:28]
113                       reserved_25a                                            :  4, // [27:24]
114                       aging_drop_interval                                     :  8, // [23:16]
115                       aging_drop_mpdu_count                                   : 16; // [15:0]
116 #endif
117 };
118 
119 
120 /* Description		STATUS_HEADER
121 
122 			Consumer: SW
123 			Producer: REO
124 
125 			Details that can link this status with the original command.
126 			It also contains info on how long REO took to execute this
127 			 command.
128 */
129 
130 
131 /* Description		REO_STATUS_NUMBER
132 
133 			Consumer: SW , DEBUG
134 			Producer: REO
135 
136 			The value in this field is equal to value of the 'REO_CMD_Number'
137 			field the REO command
138 
139 			This field helps to correlate the statuses with the REO
140 			commands.
141 
142 			<legal all>
143 */
144 
145 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET           0x0000000000000000
146 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_LSB              0
147 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MSB              15
148 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MASK             0x000000000000ffff
149 
150 
151 /* Description		CMD_EXECUTION_TIME
152 
153 			Consumer: DEBUG
154 			Producer: REO
155 
156 			The amount of time REO took to excecute the command. Note
157 			 that this time does not include the duration of the command
158 			 waiting in the command ring, before the execution started.
159 
160 
161 			In us.
162 
163 			<legal all>
164 */
165 
166 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET          0x0000000000000000
167 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_LSB             16
168 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MSB             25
169 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MASK            0x0000000003ff0000
170 
171 
172 /* Description		REO_CMD_EXECUTION_STATUS
173 
174 			Consumer: DEBUG
175 			Producer: REO
176 
177 			Execution status of the command.
178 
179 			<enum 0 reo_successful_execution> Command has successfully
180 			 be executed
181 			<enum 1 reo_blocked_execution> Command could not be executed
182 			 as the queue or cache was blocked
183 			<enum 2 reo_failed_execution> Command has encountered problems
184 			 when executing, like the queue descriptor not being valid.
185 			None of the status fields in the entire STATUS TLV are valid.
186 
187 			<enum 3 reo_resource_blocked> Command is NOT  executed because
188 			 one or more descriptors were blocked. This is SW programming
189 			 mistake.
190 			None of the status fields in the entire STATUS TLV are valid.
191 
192 
193 			<legal  0-3>
194 */
195 
196 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET    0x0000000000000000
197 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB       26
198 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MSB       27
199 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK      0x000000000c000000
200 
201 
202 /* Description		RESERVED_0A
203 
204 			<legal 0>
205 */
206 
207 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_RESERVED_0A_OFFSET                 0x0000000000000000
208 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_RESERVED_0A_LSB                    28
209 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_RESERVED_0A_MSB                    31
210 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_RESERVED_0A_MASK                   0x00000000f0000000
211 
212 
213 /* Description		TIMESTAMP
214 
215 			Timestamp at the moment that this status report is written.
216 
217 
218 			<legal all>
219 */
220 
221 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_TIMESTAMP_OFFSET                   0x0000000000000000
222 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_TIMESTAMP_LSB                      32
223 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_TIMESTAMP_MSB                      63
224 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_TIMESTAMP_MASK                     0xffffffff00000000
225 
226 
227 /* Description		SSN
228 
229 			Starting Sequence number of the session, this changes whenever
230 			 window moves. (can be filled by SW then maintained by REO)
231 
232 			<legal all>
233 */
234 
235 #define REO_GET_QUEUE_STATS_STATUS_SSN_OFFSET                                       0x0000000000000008
236 #define REO_GET_QUEUE_STATS_STATUS_SSN_LSB                                          0
237 #define REO_GET_QUEUE_STATS_STATUS_SSN_MSB                                          11
238 #define REO_GET_QUEUE_STATS_STATUS_SSN_MASK                                         0x0000000000000fff
239 
240 
241 /* Description		CURRENT_INDEX
242 
243 			Points to last forwarded packet
244 			<legal all>
245 */
246 
247 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_INDEX_OFFSET                             0x0000000000000008
248 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_INDEX_LSB                                12
249 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_INDEX_MSB                                21
250 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_INDEX_MASK                               0x00000000003ff000
251 
252 
253 /* Description		RESERVED_2
254 
255 			<legal 0>
256 */
257 
258 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_2_OFFSET                                0x0000000000000008
259 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_2_LSB                                   22
260 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_2_MSB                                   31
261 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_2_MASK                                  0x00000000ffc00000
262 
263 
264 /* Description		PN_31_0
265 
266 			Bits [31:0] of the PN number extracted from the IV field
267 
268 			<legal all>
269 */
270 
271 #define REO_GET_QUEUE_STATS_STATUS_PN_31_0_OFFSET                                   0x0000000000000008
272 #define REO_GET_QUEUE_STATS_STATUS_PN_31_0_LSB                                      32
273 #define REO_GET_QUEUE_STATS_STATUS_PN_31_0_MSB                                      63
274 #define REO_GET_QUEUE_STATS_STATUS_PN_31_0_MASK                                     0xffffffff00000000
275 
276 
277 /* Description		PN_63_32
278 
279 			Bits [63:32] of the PN number.
280 			<legal all>
281 */
282 
283 #define REO_GET_QUEUE_STATS_STATUS_PN_63_32_OFFSET                                  0x0000000000000010
284 #define REO_GET_QUEUE_STATS_STATUS_PN_63_32_LSB                                     0
285 #define REO_GET_QUEUE_STATS_STATUS_PN_63_32_MSB                                     31
286 #define REO_GET_QUEUE_STATS_STATUS_PN_63_32_MASK                                    0x00000000ffffffff
287 
288 
289 /* Description		PN_95_64
290 
291 			Bits [95:64] of the PN number.
292 			<legal all>
293 */
294 
295 #define REO_GET_QUEUE_STATS_STATUS_PN_95_64_OFFSET                                  0x0000000000000010
296 #define REO_GET_QUEUE_STATS_STATUS_PN_95_64_LSB                                     32
297 #define REO_GET_QUEUE_STATS_STATUS_PN_95_64_MSB                                     63
298 #define REO_GET_QUEUE_STATS_STATUS_PN_95_64_MASK                                    0xffffffff00000000
299 
300 
301 /* Description		PN_127_96
302 
303 			Bits [127:96] of the PN number.
304 			<legal all>
305 */
306 
307 #define REO_GET_QUEUE_STATS_STATUS_PN_127_96_OFFSET                                 0x0000000000000018
308 #define REO_GET_QUEUE_STATS_STATUS_PN_127_96_LSB                                    0
309 #define REO_GET_QUEUE_STATS_STATUS_PN_127_96_MSB                                    31
310 #define REO_GET_QUEUE_STATS_STATUS_PN_127_96_MASK                                   0x00000000ffffffff
311 
312 
313 /* Description		LAST_RX_ENQUEUE_TIMESTAMP
314 
315 			Timestamp of arrival of the last MPDU for this queue
316 			<legal all>
317 */
318 
319 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_ENQUEUE_TIMESTAMP_OFFSET                 0x0000000000000018
320 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_ENQUEUE_TIMESTAMP_LSB                    32
321 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_ENQUEUE_TIMESTAMP_MSB                    63
322 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_ENQUEUE_TIMESTAMP_MASK                   0xffffffff00000000
323 
324 
325 /* Description		LAST_RX_DEQUEUE_TIMESTAMP
326 
327 			Timestamp of forwarding an MPDU
328 
329 			If the queue is empty when a frame gets received, this time
330 			 shall be initialized to the 'enqueue' timestamp
331 
332 			Used for aging
333 			<legal all>
334 */
335 
336 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_DEQUEUE_TIMESTAMP_OFFSET                 0x0000000000000020
337 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_DEQUEUE_TIMESTAMP_LSB                    0
338 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_DEQUEUE_TIMESTAMP_MSB                    31
339 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_DEQUEUE_TIMESTAMP_MASK                   0x00000000ffffffff
340 
341 
342 /* Description		RX_BITMAP_31_0
343 
344 			When a bit is set, the corresponding frame is currently
345 			held in the re-order queue.
346 			The bitmap  is Fully managed by HW.
347 			SW shall init this to 0, and then never ever change it
348 			<legal all>
349 */
350 
351 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_31_0_OFFSET                            0x0000000000000020
352 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_31_0_LSB                               32
353 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_31_0_MSB                               63
354 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_31_0_MASK                              0xffffffff00000000
355 
356 
357 /* Description		RX_BITMAP_63_32
358 
359 			See Rx_bitmap_31_0 description
360 			<legal all>
361 */
362 
363 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_63_32_OFFSET                           0x0000000000000028
364 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_63_32_LSB                              0
365 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_63_32_MSB                              31
366 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_63_32_MASK                             0x00000000ffffffff
367 
368 
369 /* Description		RX_BITMAP_95_64
370 
371 			See Rx_bitmap_31_0 description
372 			<legal all>
373 */
374 
375 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_95_64_OFFSET                           0x0000000000000028
376 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_95_64_LSB                              32
377 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_95_64_MSB                              63
378 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_95_64_MASK                             0xffffffff00000000
379 
380 
381 /* Description		RX_BITMAP_127_96
382 
383 			See Rx_bitmap_31_0 description
384 			<legal all>
385 */
386 
387 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_127_96_OFFSET                          0x0000000000000030
388 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_127_96_LSB                             0
389 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_127_96_MSB                             31
390 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_127_96_MASK                            0x00000000ffffffff
391 
392 
393 /* Description		RX_BITMAP_159_128
394 
395 			See Rx_bitmap_31_0 description
396 			<legal all>
397 */
398 
399 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_159_128_OFFSET                         0x0000000000000030
400 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_159_128_LSB                            32
401 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_159_128_MSB                            63
402 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_159_128_MASK                           0xffffffff00000000
403 
404 
405 /* Description		RX_BITMAP_191_160
406 
407 			See Rx_bitmap_31_0 description
408 			<legal all>
409 */
410 
411 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_191_160_OFFSET                         0x0000000000000038
412 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_191_160_LSB                            0
413 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_191_160_MSB                            31
414 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_191_160_MASK                           0x00000000ffffffff
415 
416 
417 /* Description		RX_BITMAP_223_192
418 
419 			See Rx_bitmap_31_0 description
420 			<legal all>
421 */
422 
423 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_223_192_OFFSET                         0x0000000000000038
424 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_223_192_LSB                            32
425 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_223_192_MSB                            63
426 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_223_192_MASK                           0xffffffff00000000
427 
428 
429 /* Description		RX_BITMAP_255_224
430 
431 			See Rx_bitmap_31_0 description
432 			<legal all>
433 */
434 
435 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_255_224_OFFSET                         0x0000000000000040
436 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_255_224_LSB                            0
437 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_255_224_MSB                            31
438 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_255_224_MASK                           0x00000000ffffffff
439 
440 
441 /* Description		RX_BITMAP_287_256
442 
443 			See Rx_bitmap_31_0 description
444 			<legal all>
445 */
446 
447 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_287_256_OFFSET                         0x0000000000000040
448 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_287_256_LSB                            32
449 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_287_256_MSB                            63
450 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_287_256_MASK                           0xffffffff00000000
451 
452 
453 /* Description		CURRENT_MPDU_COUNT
454 
455 			The number of MPDUs in the queue.
456 
457 			<legal all>
458 */
459 
460 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MPDU_COUNT_OFFSET                        0x0000000000000048
461 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MPDU_COUNT_LSB                           0
462 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MPDU_COUNT_MSB                           6
463 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MPDU_COUNT_MASK                          0x000000000000007f
464 
465 
466 /* Description		CURRENT_MSDU_COUNT
467 
468 			The number of MSDUs in the queue.
469 			<legal all>
470 */
471 
472 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MSDU_COUNT_OFFSET                        0x0000000000000048
473 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MSDU_COUNT_LSB                           7
474 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MSDU_COUNT_MSB                           31
475 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MSDU_COUNT_MASK                          0x00000000ffffff80
476 
477 
478 /* Description		WINDOW_JUMP_2K
479 
480 			The number of times the window moved more then 2K
481 
482 			The counter saturates and freezes at 0xF
483 
484 			(Note: field name can not start with number: previous 2k_window_jump)
485 
486 
487 			<legal all>
488 */
489 
490 #define REO_GET_QUEUE_STATS_STATUS_WINDOW_JUMP_2K_OFFSET                            0x0000000000000048
491 #define REO_GET_QUEUE_STATS_STATUS_WINDOW_JUMP_2K_LSB                               32
492 #define REO_GET_QUEUE_STATS_STATUS_WINDOW_JUMP_2K_MSB                               35
493 #define REO_GET_QUEUE_STATS_STATUS_WINDOW_JUMP_2K_MASK                              0x0000000f00000000
494 
495 
496 /* Description		TIMEOUT_COUNT
497 
498 			The number of times that REO started forwarding frames even
499 			 though there is a hole in the bitmap. Forwarding reason
500 			 is Timeout
501 
502 			The counter saturates and freezes at 0x3F
503 
504 			<legal all>
505 */
506 
507 #define REO_GET_QUEUE_STATS_STATUS_TIMEOUT_COUNT_OFFSET                             0x0000000000000048
508 #define REO_GET_QUEUE_STATS_STATUS_TIMEOUT_COUNT_LSB                                36
509 #define REO_GET_QUEUE_STATS_STATUS_TIMEOUT_COUNT_MSB                                41
510 #define REO_GET_QUEUE_STATS_STATUS_TIMEOUT_COUNT_MASK                               0x000003f000000000
511 
512 
513 /* Description		FORWARD_DUE_TO_BAR_COUNT
514 
515 			The number of times that REO started forwarding frames even
516 			 though there is a hole in the bitmap. Forwarding reason
517 			 is reception of BAR frame.
518 
519 			The counter saturates and freezes at 0x3F
520 
521 			<legal all>
522 */
523 
524 #define REO_GET_QUEUE_STATS_STATUS_FORWARD_DUE_TO_BAR_COUNT_OFFSET                  0x0000000000000048
525 #define REO_GET_QUEUE_STATS_STATUS_FORWARD_DUE_TO_BAR_COUNT_LSB                     42
526 #define REO_GET_QUEUE_STATS_STATUS_FORWARD_DUE_TO_BAR_COUNT_MSB                     47
527 #define REO_GET_QUEUE_STATS_STATUS_FORWARD_DUE_TO_BAR_COUNT_MASK                    0x0000fc0000000000
528 
529 
530 /* Description		DUPLICATE_COUNT
531 
532 			The number of duplicate frames that have been detected
533 			<legal all>
534 */
535 
536 #define REO_GET_QUEUE_STATS_STATUS_DUPLICATE_COUNT_OFFSET                           0x0000000000000048
537 #define REO_GET_QUEUE_STATS_STATUS_DUPLICATE_COUNT_LSB                              48
538 #define REO_GET_QUEUE_STATS_STATUS_DUPLICATE_COUNT_MSB                              63
539 #define REO_GET_QUEUE_STATS_STATUS_DUPLICATE_COUNT_MASK                             0xffff000000000000
540 
541 
542 /* Description		FRAMES_IN_ORDER_COUNT
543 
544 			The number of frames that have been received in order (without
545 			 a hole that prevented them from being forwarded immediately)
546 
547 
548 			This corresponds to the Reorder opcodes:
549 			'FWDCUR' and 'FWD BUF'
550 
551 			<legal all>
552 */
553 
554 #define REO_GET_QUEUE_STATS_STATUS_FRAMES_IN_ORDER_COUNT_OFFSET                     0x0000000000000050
555 #define REO_GET_QUEUE_STATS_STATUS_FRAMES_IN_ORDER_COUNT_LSB                        0
556 #define REO_GET_QUEUE_STATS_STATUS_FRAMES_IN_ORDER_COUNT_MSB                        23
557 #define REO_GET_QUEUE_STATS_STATUS_FRAMES_IN_ORDER_COUNT_MASK                       0x0000000000ffffff
558 
559 
560 /* Description		BAR_RECEIVED_COUNT
561 
562 			The number of times a BAR frame is received.
563 
564 			This corresponds to the Reorder opcodes with 'DROP'
565 
566 			The counter saturates and freezes at 0xFF
567 			<legal all>
568 */
569 
570 #define REO_GET_QUEUE_STATS_STATUS_BAR_RECEIVED_COUNT_OFFSET                        0x0000000000000050
571 #define REO_GET_QUEUE_STATS_STATUS_BAR_RECEIVED_COUNT_LSB                           24
572 #define REO_GET_QUEUE_STATS_STATUS_BAR_RECEIVED_COUNT_MSB                           31
573 #define REO_GET_QUEUE_STATS_STATUS_BAR_RECEIVED_COUNT_MASK                          0x00000000ff000000
574 
575 
576 /* Description		MPDU_FRAMES_PROCESSED_COUNT
577 
578 			The total number of MPDU frames that have been processed
579 			 by REO. This includes the duplicates.
580 
581 			<legal all>
582 */
583 
584 #define REO_GET_QUEUE_STATS_STATUS_MPDU_FRAMES_PROCESSED_COUNT_OFFSET               0x0000000000000050
585 #define REO_GET_QUEUE_STATS_STATUS_MPDU_FRAMES_PROCESSED_COUNT_LSB                  32
586 #define REO_GET_QUEUE_STATS_STATUS_MPDU_FRAMES_PROCESSED_COUNT_MSB                  63
587 #define REO_GET_QUEUE_STATS_STATUS_MPDU_FRAMES_PROCESSED_COUNT_MASK                 0xffffffff00000000
588 
589 
590 /* Description		MSDU_FRAMES_PROCESSED_COUNT
591 
592 			The total number of MSDU frames that have been processed
593 			 by REO. This includes the duplicates.
594 
595 			<legal all>
596 */
597 
598 #define REO_GET_QUEUE_STATS_STATUS_MSDU_FRAMES_PROCESSED_COUNT_OFFSET               0x0000000000000058
599 #define REO_GET_QUEUE_STATS_STATUS_MSDU_FRAMES_PROCESSED_COUNT_LSB                  0
600 #define REO_GET_QUEUE_STATS_STATUS_MSDU_FRAMES_PROCESSED_COUNT_MSB                  31
601 #define REO_GET_QUEUE_STATS_STATUS_MSDU_FRAMES_PROCESSED_COUNT_MASK                 0x00000000ffffffff
602 
603 
604 /* Description		TOTAL_PROCESSED_BYTE_COUNT
605 
606 			An approximation of the number of bytes received for this
607 			 queue.
608 
609 			In 64 byte units
610 			<legal all>
611 */
612 
613 #define REO_GET_QUEUE_STATS_STATUS_TOTAL_PROCESSED_BYTE_COUNT_OFFSET                0x0000000000000058
614 #define REO_GET_QUEUE_STATS_STATUS_TOTAL_PROCESSED_BYTE_COUNT_LSB                   32
615 #define REO_GET_QUEUE_STATS_STATUS_TOTAL_PROCESSED_BYTE_COUNT_MSB                   63
616 #define REO_GET_QUEUE_STATS_STATUS_TOTAL_PROCESSED_BYTE_COUNT_MASK                  0xffffffff00000000
617 
618 
619 /* Description		LATE_RECEIVE_MPDU_COUNT
620 
621 			The number of MPDUs received after the window had already
622 			 moved on. The 'late' sequence window is defined as (Window
623 			 SSN - 256) - (Window SSN - 1)
624 
625 			This corresponds with Out of order detection in duplicate
626 			 detect FSM
627 
628 			The counter saturates and freezes at 0xFFF
629 
630 			<legal all>
631 */
632 
633 #define REO_GET_QUEUE_STATS_STATUS_LATE_RECEIVE_MPDU_COUNT_OFFSET                   0x0000000000000060
634 #define REO_GET_QUEUE_STATS_STATUS_LATE_RECEIVE_MPDU_COUNT_LSB                      0
635 #define REO_GET_QUEUE_STATS_STATUS_LATE_RECEIVE_MPDU_COUNT_MSB                      11
636 #define REO_GET_QUEUE_STATS_STATUS_LATE_RECEIVE_MPDU_COUNT_MASK                     0x0000000000000fff
637 
638 
639 /* Description		HOLE_COUNT
640 
641 			The number of times a hole was created in the receive bitmap.
642 
643 
644 			This corresponds to the Reorder opcodes with 'QCUR'
645 
646 			<legal all>
647 */
648 
649 #define REO_GET_QUEUE_STATS_STATUS_HOLE_COUNT_OFFSET                                0x0000000000000060
650 #define REO_GET_QUEUE_STATS_STATUS_HOLE_COUNT_LSB                                   12
651 #define REO_GET_QUEUE_STATS_STATUS_HOLE_COUNT_MSB                                   27
652 #define REO_GET_QUEUE_STATS_STATUS_HOLE_COUNT_MASK                                  0x000000000ffff000
653 
654 
655 /* Description		GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW
656 
657 			Indicates that the queue supports a BA window size above
658 			 256, so a 'REO_GET_QUEUE_STATS_1K_STATUS' status TLV will
659 			 immediately follow.
660 
661 			<legal all>
662 */
663 
664 #define REO_GET_QUEUE_STATS_STATUS_GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW_OFFSET       0x0000000000000060
665 #define REO_GET_QUEUE_STATS_STATUS_GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW_LSB          28
666 #define REO_GET_QUEUE_STATS_STATUS_GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW_MSB          28
667 #define REO_GET_QUEUE_STATS_STATUS_GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW_MASK         0x0000000010000000
668 
669 
670 /* Description		RESERVED_24A
671 
672 			<legal 0>
673 */
674 
675 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_24A_OFFSET                              0x0000000000000060
676 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_24A_LSB                                 29
677 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_24A_MSB                                 31
678 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_24A_MASK                                0x00000000e0000000
679 
680 
681 /* Description		AGING_DROP_MPDU_COUNT
682 
683 			The number of holes in the bitmap that moved due to aging
684 			 counter expiry
685 			<legal all>
686 */
687 
688 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_MPDU_COUNT_OFFSET                     0x0000000000000060
689 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_MPDU_COUNT_LSB                        32
690 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_MPDU_COUNT_MSB                        47
691 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_MPDU_COUNT_MASK                       0x0000ffff00000000
692 
693 
694 /* Description		AGING_DROP_INTERVAL
695 
696 			The number of times holes got removed from the bitmap due
697 			 to aging counter expiry
698 			<legal all>
699 */
700 
701 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_INTERVAL_OFFSET                       0x0000000000000060
702 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_INTERVAL_LSB                          48
703 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_INTERVAL_MSB                          55
704 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_INTERVAL_MASK                         0x00ff000000000000
705 
706 
707 /* Description		RESERVED_25A
708 
709 			<legal 0>
710 */
711 
712 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_25A_OFFSET                              0x0000000000000060
713 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_25A_LSB                                 56
714 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_25A_MSB                                 59
715 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_25A_MASK                                0x0f00000000000000
716 
717 
718 /* Description		LOOPING_COUNT
719 
720 			A count value that indicates the number of times the producer
721 			 of entries into this Ring has looped around the ring.
722 			At initialization time, this value is set to 0. On the first
723 			 loop, this value is set to 1. After the max value is reached
724 			 allowed by the number of bits for this field, the count
725 			 value continues with 0 again.
726 
727 			In case SW is the consumer of the ring entries, it can use
728 			 this field to figure out up to where the producer of entries
729 			 has created new entries. This eliminates the need to check
730 			 where the "head pointer' of the ring is located once the
731 			 SW starts processing an interrupt indicating that new entries
732 			 have been put into this ring...
733 
734 			Also note that SW if it wants only needs to look at the
735 			LSB bit of this count value.
736 			<legal all>
737 */
738 
739 #define REO_GET_QUEUE_STATS_STATUS_LOOPING_COUNT_OFFSET                             0x0000000000000060
740 #define REO_GET_QUEUE_STATS_STATUS_LOOPING_COUNT_LSB                                60
741 #define REO_GET_QUEUE_STATS_STATUS_LOOPING_COUNT_MSB                                63
742 #define REO_GET_QUEUE_STATS_STATUS_LOOPING_COUNT_MASK                               0xf000000000000000
743 
744 
745 
746 #endif   // REO_GET_QUEUE_STATS_STATUS
747