1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _CE_SRC_DESC_H_ 27 #define _CE_SRC_DESC_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_CE_SRC_DESC 4 32 33 34 struct ce_src_desc { 35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 36 uint32_t src_buffer_low : 32; // [31:0] 37 uint32_t src_buffer_high : 8, // [7:0] 38 toeplitz_en : 1, // [8:8] 39 src_swap : 1, // [9:9] 40 dest_swap : 1, // [10:10] 41 gather : 1, // [11:11] 42 ce_res_0 : 1, // [12:12] 43 barrier_read : 1, // [13:13] 44 ce_res_1 : 2, // [15:14] 45 length : 16; // [31:16] 46 uint32_t fw_metadata : 16, // [15:0] 47 ce_res_2 : 16; // [31:16] 48 uint32_t ce_res_3 : 20, // [19:0] 49 ring_id : 8, // [27:20] 50 looping_count : 4; // [31:28] 51 #else 52 uint32_t src_buffer_low : 32; // [31:0] 53 uint32_t length : 16, // [31:16] 54 ce_res_1 : 2, // [15:14] 55 barrier_read : 1, // [13:13] 56 ce_res_0 : 1, // [12:12] 57 gather : 1, // [11:11] 58 dest_swap : 1, // [10:10] 59 src_swap : 1, // [9:9] 60 toeplitz_en : 1, // [8:8] 61 src_buffer_high : 8; // [7:0] 62 uint32_t ce_res_2 : 16, // [31:16] 63 fw_metadata : 16; // [15:0] 64 uint32_t looping_count : 4, // [31:28] 65 ring_id : 8, // [27:20] 66 ce_res_3 : 20; // [19:0] 67 #endif 68 }; 69 70 71 /* Description SRC_BUFFER_LOW 72 73 LSB 32 bits of the 40 Bit Pointer to the source buffer 74 <legal all> 75 */ 76 77 #define CE_SRC_DESC_SRC_BUFFER_LOW_OFFSET 0x00000000 78 #define CE_SRC_DESC_SRC_BUFFER_LOW_LSB 0 79 #define CE_SRC_DESC_SRC_BUFFER_LOW_MSB 31 80 #define CE_SRC_DESC_SRC_BUFFER_LOW_MASK 0xffffffff 81 82 83 /* Description SRC_BUFFER_HIGH 84 85 Bits [6:0] for 40 Bit Pointer to the source buffer 86 Bit [7] can be programmed with VC bit. 87 Note: CE Descriptor has 40-bit address. Only 37 bits are 88 routed as address to NoC. Remaining bits are user bits. 89 Bit [7] of SRC_BUFFER_HIGH can be used for VC configuration. 90 0 indicate VC0 and 1 indicate VC1. 91 <legal all> 92 */ 93 94 #define CE_SRC_DESC_SRC_BUFFER_HIGH_OFFSET 0x00000004 95 #define CE_SRC_DESC_SRC_BUFFER_HIGH_LSB 0 96 #define CE_SRC_DESC_SRC_BUFFER_HIGH_MSB 7 97 #define CE_SRC_DESC_SRC_BUFFER_HIGH_MASK 0x000000ff 98 99 100 /* Description TOEPLITZ_EN 101 102 Enable generation of 32-bit Toeplitz-LFSR hash for the data 103 transfer 104 In case of gather field in first source ring entry of the 105 gather copy cycle in taken into account. 106 <legal all> 107 */ 108 109 #define CE_SRC_DESC_TOEPLITZ_EN_OFFSET 0x00000004 110 #define CE_SRC_DESC_TOEPLITZ_EN_LSB 8 111 #define CE_SRC_DESC_TOEPLITZ_EN_MSB 8 112 #define CE_SRC_DESC_TOEPLITZ_EN_MASK 0x00000100 113 114 115 /* Description SRC_SWAP 116 117 Treats source memory organization as big-endian. For each 118 dword read (4 bytes), the byte 0 is swapped with byte 3 119 and byte 1 is swapped with byte 2. 120 In case of gather field in first source ring entry of the 121 gather copy cycle in taken into account. 122 <legal all> 123 */ 124 125 #define CE_SRC_DESC_SRC_SWAP_OFFSET 0x00000004 126 #define CE_SRC_DESC_SRC_SWAP_LSB 9 127 #define CE_SRC_DESC_SRC_SWAP_MSB 9 128 #define CE_SRC_DESC_SRC_SWAP_MASK 0x00000200 129 130 131 /* Description DEST_SWAP 132 133 Treats destination memory organization as big-endian. For 134 each dword write (4 bytes), the byte 0 is swapped with 135 byte 3 and byte 1 is swapped with byte 2. 136 In case of gather field in first source ring entry of the 137 gather copy cycle in taken into account. 138 <legal all> 139 */ 140 141 #define CE_SRC_DESC_DEST_SWAP_OFFSET 0x00000004 142 #define CE_SRC_DESC_DEST_SWAP_LSB 10 143 #define CE_SRC_DESC_DEST_SWAP_MSB 10 144 #define CE_SRC_DESC_DEST_SWAP_MASK 0x00000400 145 146 147 /* Description GATHER 148 149 Enables gather of multiple copy engine source descriptors 150 to one destination. 151 <legal all> 152 */ 153 154 #define CE_SRC_DESC_GATHER_OFFSET 0x00000004 155 #define CE_SRC_DESC_GATHER_LSB 11 156 #define CE_SRC_DESC_GATHER_MSB 11 157 #define CE_SRC_DESC_GATHER_MASK 0x00000800 158 159 160 /* Description CE_RES_0 161 162 Reserved 163 <legal all> 164 */ 165 166 #define CE_SRC_DESC_CE_RES_0_OFFSET 0x00000004 167 #define CE_SRC_DESC_CE_RES_0_LSB 12 168 #define CE_SRC_DESC_CE_RES_0_MSB 12 169 #define CE_SRC_DESC_CE_RES_0_MASK 0x00001000 170 171 172 /* Description BARRIER_READ 173 174 Barrier Read enable 175 <legal all> 176 */ 177 178 #define CE_SRC_DESC_BARRIER_READ_OFFSET 0x00000004 179 #define CE_SRC_DESC_BARRIER_READ_LSB 13 180 #define CE_SRC_DESC_BARRIER_READ_MSB 13 181 #define CE_SRC_DESC_BARRIER_READ_MASK 0x00002000 182 183 184 /* Description CE_RES_1 185 186 Reserved 187 <legal all> 188 */ 189 190 #define CE_SRC_DESC_CE_RES_1_OFFSET 0x00000004 191 #define CE_SRC_DESC_CE_RES_1_LSB 14 192 #define CE_SRC_DESC_CE_RES_1_MSB 15 193 #define CE_SRC_DESC_CE_RES_1_MASK 0x0000c000 194 195 196 /* Description LENGTH 197 198 Length of the buffer in units of octets of the current descriptor 199 200 <legal all> 201 */ 202 203 #define CE_SRC_DESC_LENGTH_OFFSET 0x00000004 204 #define CE_SRC_DESC_LENGTH_LSB 16 205 #define CE_SRC_DESC_LENGTH_MSB 31 206 #define CE_SRC_DESC_LENGTH_MASK 0xffff0000 207 208 209 /* Description FW_METADATA 210 211 Meta data used by FW 212 In case of gather field in first source ring entry of the 213 gather copy cycle in taken into account. 214 <legal all> 215 */ 216 217 #define CE_SRC_DESC_FW_METADATA_OFFSET 0x00000008 218 #define CE_SRC_DESC_FW_METADATA_LSB 0 219 #define CE_SRC_DESC_FW_METADATA_MSB 15 220 #define CE_SRC_DESC_FW_METADATA_MASK 0x0000ffff 221 222 223 /* Description CE_RES_2 224 225 Reserved 226 <legal all> 227 */ 228 229 #define CE_SRC_DESC_CE_RES_2_OFFSET 0x00000008 230 #define CE_SRC_DESC_CE_RES_2_LSB 16 231 #define CE_SRC_DESC_CE_RES_2_MSB 31 232 #define CE_SRC_DESC_CE_RES_2_MASK 0xffff0000 233 234 235 /* Description CE_RES_3 236 237 Reserved 238 <legal all> 239 */ 240 241 #define CE_SRC_DESC_CE_RES_3_OFFSET 0x0000000c 242 #define CE_SRC_DESC_CE_RES_3_LSB 0 243 #define CE_SRC_DESC_CE_RES_3_MSB 19 244 #define CE_SRC_DESC_CE_RES_3_MASK 0x000fffff 245 246 247 /* Description RING_ID 248 249 The buffer pointer ring ID. 250 0 refers to the IDLE ring 251 1 - N refers to other rings 252 253 Helps with debugging when dumping ring contents. 254 <legal all> 255 */ 256 257 #define CE_SRC_DESC_RING_ID_OFFSET 0x0000000c 258 #define CE_SRC_DESC_RING_ID_LSB 20 259 #define CE_SRC_DESC_RING_ID_MSB 27 260 #define CE_SRC_DESC_RING_ID_MASK 0x0ff00000 261 262 263 /* Description LOOPING_COUNT 264 265 A count value that indicates the number of times the producer 266 of entries into the Ring has looped around the ring. 267 At initialization time, this value is set to 0. On the first 268 loop, this value is set to 1. After the max value is reached 269 allowed by the number of bits for this field, the count 270 value continues with 0 again. 271 In case SW is the consumer of the ring entries, it can use 272 this field to figure out up to where the producer of entries 273 has created new entries. This eliminates the need to check 274 where the "head pointer' of the ring is located once the 275 SW starts processing an interrupt indicating that new entries 276 have been put into this ring... 277 Also note that SW if it wants only needs to look at the 278 LSB bit of this count value. 279 <legal all> 280 */ 281 282 #define CE_SRC_DESC_LOOPING_COUNT_OFFSET 0x0000000c 283 #define CE_SRC_DESC_LOOPING_COUNT_LSB 28 284 #define CE_SRC_DESC_LOOPING_COUNT_MSB 31 285 #define CE_SRC_DESC_LOOPING_COUNT_MASK 0xf0000000 286 287 288 289 #endif // CE_SRC_DESC 290