1 /*
2  * Copyright 2014, 2015 O.S. Systems Software LTDA.
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of
12  *     the License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  *     You should have received a copy of the GNU General Public
20  *     License along with this file; if not, write to the Free
21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22  *     MA 02110-1301 USA
23  *
24  * Or, alternatively,
25  *
26  *  b) Permission is hereby granted, free of charge, to any person
27  *     obtaining a copy of this software and associated documentation
28  *     files (the "Software"), to deal in the Software without
29  *     restriction, including without limitation the rights to use,
30  *     copy, modify, merge, publish, distribute, sublicense, and/or
31  *     sell copies of the Software, and to permit persons to whom the
32  *     Software is furnished to do so, subject to the following
33  *     conditions:
34  *
35  *     The above copyright notice and this permission notice shall be
36  *     included in all copies or substantial portions of the Software.
37  *
38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45  *     OTHER DEALINGS IN THE SOFTWARE.
46  */
47 
48 /dts-v1/;
49 
50 #include <dt-bindings/gpio/gpio.h>
51 #include "imx6sl.dtsi"
52 
53 / {
54 	model = "Revotics WaRP Board";
55 	compatible = "revotics,imx6sl-warp", "fsl,imx6sl";
56 
57 	memory@80000000 {
58 		device_type = "memory";
59 		reg = <0x80000000 0x20000000>;
60 	};
61 
62 	usdhc3_pwrseq: usdhc3_pwrseq {
63 		compatible = "mmc-pwrseq-simple";
64 		reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>, 	/* WL_REG_ON */
65 			      <&gpio4 7 GPIO_ACTIVE_LOW>, 	/* WL_HOSTWAKE */
66 			      <&gpio3 25 GPIO_ACTIVE_LOW>, 	/* BT_REG_ON */
67 			      <&gpio3 27 GPIO_ACTIVE_LOW>,	/* BT_HOSTWAKE */
68 			      <&gpio4 4 GPIO_ACTIVE_LOW>, 	/* BT_WAKE */
69 			      <&gpio4 6 GPIO_ACTIVE_LOW>; 	/* BT_RST_N */
70 	};
71 };
72 
73 &uart1 {
74 	pinctrl-names = "default";
75 	pinctrl-0 = <&pinctrl_uart1>;
76 	status = "okay";
77 };
78 
79 &uart3 {
80 	pinctrl-names = "default";
81 	pinctrl-0 = <&pinctrl_uart3>;
82 	status = "okay";
83 };
84 
85 &uart5 {
86 	pinctrl-names = "default";
87 	pinctrl-0 = <&pinctrl_uart5>;
88 	uart-has-rtscts;
89 	status = "okay";
90 };
91 
92 &usbotg1 {
93 	dr_mode = "peripheral";
94 	disable-over-current;
95 	status = "okay";
96 };
97 
98 &usbotg2 {
99 	dr_mode = "host";
100 	disable-over-current;
101 	status = "okay";
102 };
103 
104 &usdhc2 {
105 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
106 	pinctrl-0 = <&pinctrl_usdhc2>;
107 	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
108 	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
109 	bus-width = <8>;
110 	non-removable;
111 	status = "okay";
112 };
113 
114 &usdhc3 {
115 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
116 	pinctrl-0 = <&pinctrl_usdhc3>;
117 	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
118 	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
119 	bus-width = <4>;
120 	non-removable;
121 	keep-power-in-suspend;
122 	wakeup-source;
123 	mmc-pwrseq = <&usdhc3_pwrseq>;
124 	status = "okay";
125 };
126 
127 &iomuxc {
128 	imx6sl-warp {
129 		pinctrl_uart1: uart1grp {
130 			fsl,pins = <
131 				MX6SL_PAD_UART1_RXD__UART1_RX_DATA	0x41b0b1
132 				MX6SL_PAD_UART1_TXD__UART1_TX_DATA	0x41b0b1
133 			>;
134 		};
135 
136 
137 		pinctrl_uart3: uart3grp {
138 			fsl,pins = <
139 				MX6SL_PAD_AUD_RXC__UART3_RX_DATA	0x41b0b1
140 				MX6SL_PAD_AUD_RXC__UART3_TX_DATA	0x41b0b1
141 			>;
142 		};
143 
144 		pinctrl_uart5: uart5grp {
145 			fsl,pins = <
146 				MX6SL_PAD_ECSPI1_SCLK__UART5_RX_DATA	0x41b0b1
147 				MX6SL_PAD_ECSPI1_MOSI__UART5_TX_DATA	0x41b0b1
148 				MX6SL_PAD_ECSPI1_MISO__UART5_RTS_B	0x4130b1
149 				MX6SL_PAD_ECSPI1_SS0__UART5_CTS_B	0x4130b1
150 			>;
151 		};
152 
153 		pinctrl_usdhc2: usdhc2grp {
154 			fsl,pins = <
155 				MX6SL_PAD_SD2_CMD__SD2_CMD		0x417059
156 				MX6SL_PAD_SD2_CLK__SD2_CLK		0x410059
157 				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x417059
158 				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x417059
159 				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x417059
160 				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x417059
161 				MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x417059
162 				MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x417059
163 				MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x417059
164 				MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x417059
165 				MX6SL_PAD_SD2_RST__SD2_RESET		0x417059
166 			>;
167 		};
168 
169 		pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {
170 			fsl,pins = <
171 				MX6SL_PAD_SD2_CMD__SD2_CMD		0x4170b9
172 				MX6SL_PAD_SD2_CLK__SD2_CLK		0x4100b9
173 				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x4170b9
174 				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x4170b9
175 				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x4170b9
176 				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x4170b9
177 				MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x4170b9
178 				MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x4170b9
179 				MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x4170b9
180 				MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x4170b9
181 				MX6SL_PAD_SD2_RST__SD2_RESET		0x4170b9
182 			>;
183 		};
184 
185 		pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {
186 			fsl,pins = <
187 				MX6SL_PAD_SD2_CMD__SD2_CMD		0x4170f9
188 				MX6SL_PAD_SD2_CLK__SD2_CLK		0x4100f9
189 				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x4170f9
190 				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x4170f9
191 				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x4170f9
192 				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x4170f9
193 				MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x4170f9
194 				MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x4170f9
195 				MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x4170f9
196 				MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x4170f9
197 				MX6SL_PAD_SD2_RST__SD2_RESET		0x4170f9
198 			>;
199 		};
200 
201 		pinctrl_usdhc3: usdhc3grp {
202 			fsl,pins = <
203 				MX6SL_PAD_SD3_CMD__SD3_CMD		0x417059
204 				MX6SL_PAD_SD3_CLK__SD3_CLK		0x410059
205 				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x417059
206 				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x417059
207 				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x417059
208 				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x417059
209 			>;
210 		};
211 
212 		pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
213 			fsl,pins = <
214 				MX6SL_PAD_SD3_CMD__SD3_CMD		0x4170b9
215 				MX6SL_PAD_SD3_CLK__SD3_CLK		0x4100b9
216 				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x4170b9
217 				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x4170b9
218 				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x4170b9
219 				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x4170b9
220 			>;
221 		};
222 
223 		pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
224 			fsl,pins = <
225 				MX6SL_PAD_SD3_CMD__SD3_CMD		0x4170f9
226 				MX6SL_PAD_SD3_CLK__SD3_CLK		0x4100f9
227 				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x4170f9
228 				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x4170f9
229 				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x4170f9
230 				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x4170f9
231 			>;
232 		};
233 	};
234 };
235