1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2013 Marek Vasut <marex@denx.de>
4  */
5 
6 /dts-v1/;
7 #include "imx53-m53.dtsi"
8 
9 / {
10 	model = "Aries/DENX M53EVK";
11 	compatible = "aries,imx53-m53evk", "denx,imx53-m53evk", "fsl,imx53";
12 
13 	display1: disp1 {
14 		compatible = "fsl,imx-parallel-display";
15 		interface-pix-fmt = "bgr666";
16 		pinctrl-names = "default";
17 		pinctrl-0 = <&pinctrl_ipu_disp1>;
18 
19 		display-timings {
20 			native-mode = <&timing0>;
21 			timing0: timing-800x480p60 {
22 				clock-frequency = <31500000>;
23 				hactive = <800>;
24 				vactive = <480>;
25 				hfront-porch = <40>;
26 				hback-porch = <88>;
27 				hsync-len = <128>;
28 				vback-porch = <33>;
29 				vfront-porch = <9>;
30 				vsync-len = <3>;
31 				vsync-active = <1>;
32 			};
33 		};
34 
35 		port {
36 			display1_in: endpoint {
37 				remote-endpoint = <&ipu_di1_disp1>;
38 			};
39 		};
40 	};
41 
42 	backlight {
43 		compatible = "pwm-backlight";
44 		pwms = <&pwm1 0 3000 0>;
45 		brightness-levels = <0 4 8 16 32 64 128 255>;
46 		default-brightness-level = <6>;
47 		power-supply = <&reg_backlight>;
48 	};
49 
50 	leds {
51 		compatible = "gpio-leds";
52 		pinctrl-names = "default";
53 		pinctrl-0 = <&led_pin_gpio>;
54 
55 		led-user1 {
56 			label = "user1";
57 			gpios = <&gpio2 8 0>;
58 			linux,default-trigger = "heartbeat";
59 		};
60 
61 		led-user2 {
62 			label = "user2";
63 			gpios = <&gpio2 9 0>;
64 			linux,default-trigger = "heartbeat";
65 		};
66 	};
67 
68 	reg_usbh1_vbus: regulator-usbh1-vbus {
69 		compatible = "regulator-fixed";
70 		regulator-name = "vbus";
71 		regulator-min-microvolt = <5000000>;
72 		regulator-max-microvolt = <5000000>;
73 		gpio = <&gpio1 2 0>;
74 	};
75 
76 	reg_usb_otg_vbus: regulator-usb-otg-vbus {
77 		compatible = "regulator-fixed";
78 		regulator-name = "usb_otg_vbus";
79 		regulator-min-microvolt = <5000000>;
80 		regulator-max-microvolt = <5000000>;
81 		gpio = <&gpio1 4 0>;
82 	};
83 
84 	sound {
85 		compatible = "fsl,imx53-m53evk-sgtl5000",
86 			     "fsl,imx-audio-sgtl5000";
87 		model = "imx53-m53evk-sgtl5000";
88 		ssi-controller = <&ssi2>;
89 		audio-codec = <&sgtl5000>;
90 		audio-routing =
91 			"MIC_IN", "Mic Jack",
92 			"Mic Jack", "Mic Bias",
93 			"LINE_IN", "Line In Jack",
94 			"Headphone Jack", "HP_OUT",
95 			"Ext Spk", "LINE_OUT";
96 		mux-int-port = <2>;
97 		mux-ext-port = <4>;
98 	};
99 };
100 
101 &audmux {
102 	pinctrl-names = "default";
103 	pinctrl-0 = <&pinctrl_audmux>;
104 	status = "okay";
105 };
106 
107 &can1 {
108 	pinctrl-names = "default";
109 	pinctrl-0 = <&pinctrl_can1>;
110 	status = "okay";
111 };
112 
113 &can2 {
114 	pinctrl-names = "default";
115 	pinctrl-0 = <&pinctrl_can2>;
116 	status = "okay";
117 };
118 
119 &esdhc1 {
120 	pinctrl-names = "default";
121 	pinctrl-0 = <&pinctrl_esdhc1>;
122 	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
123 	wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
124 	status = "okay";
125 };
126 
127 &fec {
128 	pinctrl-names = "default";
129 	pinctrl-0 = <&pinctrl_fec>;
130 	phy-mode = "rmii";
131 	status = "okay";
132 };
133 
134 &i2c1 {
135 	pinctrl-names = "default";
136 	pinctrl-0 = <&pinctrl_i2c1>;
137 	status = "okay";
138 
139 	sgtl5000: codec@a {
140 		compatible = "fsl,sgtl5000";
141 		reg = <0x0a>;
142 		#sound-dai-cells = <0>;
143 		VDDA-supply = <&reg_3p2v>;
144 		VDDIO-supply = <&reg_3p2v>;
145 		clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
146 	};
147 };
148 
149 &i2c3 {
150 	pinctrl-names = "default";
151 	pinctrl-0 = <&pinctrl_i2c3>;
152 	status = "okay";
153 };
154 
155 &iomuxc {
156 	pinctrl-names = "default";
157 	pinctrl-0 = <&pinctrl_hog>;
158 
159 	imx53-m53evk {
160 		pinctrl_usb: usbgrp {
161 			fsl,pins = <
162 				MX53_PAD_GPIO_2__GPIO1_2		0x80000000
163 				MX53_PAD_GPIO_3__USBOH3_USBH1_OC	0x80000000
164 			>;
165 		};
166 
167 		pinctrl_usbotg: usbotggrp {
168 			fsl,pins = <
169 				MX53_PAD_GPIO_4__GPIO1_4		0x000b0
170 			>;
171 		};
172 
173 		led_pin_gpio: led_gpio {
174 			fsl,pins = <
175 				MX53_PAD_PATA_DATA8__GPIO2_8		0x80000000
176 				MX53_PAD_PATA_DATA9__GPIO2_9		0x80000000
177 			>;
178 		};
179 
180 		pinctrl_audmux: audmuxgrp {
181 			fsl,pins = <
182 				MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC	0x80000000
183 				MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD	0x80000000
184 				MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS	0x80000000
185 				MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD	0x80000000
186 			>;
187 		};
188 
189 		pinctrl_can1: can1grp {
190 			fsl,pins = <
191 				MX53_PAD_GPIO_7__CAN1_TXCAN		0x80000000
192 				MX53_PAD_GPIO_8__CAN1_RXCAN		0x80000000
193 			>;
194 		};
195 
196 		pinctrl_can2: can2grp {
197 			fsl,pins = <
198 				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000
199 				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000
200 			>;
201 		};
202 
203 		pinctrl_esdhc1: esdhc1grp {
204 			fsl,pins = <
205 				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5
206 				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5
207 				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5
208 				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5
209 				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5
210 				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5
211 			>;
212 		};
213 
214 		pinctrl_fec: fecgrp {
215 			fsl,pins = <
216 				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000
217 				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000
218 				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000
219 				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000
220 				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000
221 				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000
222 				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000
223 				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
224 				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000
225 				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000
226 			>;
227 		};
228 
229 		pinctrl_i2c1: i2c1grp {
230 			fsl,pins = <
231 				MX53_PAD_EIM_D21__I2C1_SCL		0xc0000000
232 				MX53_PAD_EIM_D28__I2C1_SDA		0xc0000000
233 			>;
234 		};
235 
236 		pinctrl_i2c3: i2c3grp {
237 			fsl,pins = <
238 				MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000
239 				MX53_PAD_GPIO_5__I2C3_SCL		0xc0000000
240 			>;
241 		};
242 
243 		pinctrl_ipu_disp1: ipudisp1grp {
244 			fsl,pins = <
245 				MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0	0x5
246 				MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1	0x5
247 				MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2	0x5
248 				MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3	0x5
249 				MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4	0x5
250 				MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5	0x5
251 				MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6	0x5
252 				MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7	0x5
253 				MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8	0x5
254 				MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9	0x5
255 				MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10	0x5
256 				MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11	0x5
257 				MX53_PAD_EIM_A17__IPU_DISP1_DAT_12	0x5
258 				MX53_PAD_EIM_A18__IPU_DISP1_DAT_13	0x5
259 				MX53_PAD_EIM_A19__IPU_DISP1_DAT_14	0x5
260 				MX53_PAD_EIM_A20__IPU_DISP1_DAT_15	0x5
261 				MX53_PAD_EIM_A21__IPU_DISP1_DAT_16	0x5
262 				MX53_PAD_EIM_A22__IPU_DISP1_DAT_17	0x5
263 				MX53_PAD_EIM_A23__IPU_DISP1_DAT_18	0x5
264 				MX53_PAD_EIM_A24__IPU_DISP1_DAT_19	0x5
265 				MX53_PAD_EIM_D31__IPU_DISP1_DAT_20	0x5
266 				MX53_PAD_EIM_D30__IPU_DISP1_DAT_21	0x5
267 				MX53_PAD_EIM_D26__IPU_DISP1_DAT_22	0x5
268 				MX53_PAD_EIM_D27__IPU_DISP1_DAT_23	0x5
269 				MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK	0x5
270 				MX53_PAD_EIM_DA13__IPU_DI1_D0_CS	0x5
271 				MX53_PAD_EIM_DA14__IPU_DI1_D1_CS	0x5
272 				MX53_PAD_EIM_DA15__IPU_DI1_PIN1		0x5
273 				MX53_PAD_EIM_DA11__IPU_DI1_PIN2		0x5
274 				MX53_PAD_EIM_DA12__IPU_DI1_PIN3		0x5
275 				MX53_PAD_EIM_A25__IPU_DI1_PIN12		0x5
276 				MX53_PAD_EIM_DA10__IPU_DI1_PIN15	0x5
277 			>;
278 		};
279 
280 		pinctrl_pwm1: pwm1grp {
281 			fsl,pins = <
282 				MX53_PAD_DISP0_DAT8__PWM1_PWMO		0x5
283 			>;
284 		};
285 
286 		pinctrl_uart1: uart1grp {
287 			fsl,pins = <
288 				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
289 				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
290 			>;
291 		};
292 
293 		pinctrl_uart2: uart2grp {
294 			fsl,pins = <
295 				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4
296 				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4
297 			>;
298 		};
299 
300 		pinctrl_uart3: uart3grp {
301 			fsl,pins = <
302 				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4
303 				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4
304 				MX53_PAD_PATA_DA_1__UART3_CTS		0x1e4
305 				MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4
306 			>;
307 		};
308 	};
309 };
310 
311 &ipu_di1_disp1 {
312 	remote-endpoint = <&display1_in>;
313 };
314 
315 &pwm1 {
316 	pinctrl-names = "default";
317 	pinctrl-0 = <&pinctrl_pwm1>;
318 	status = "okay";
319 };
320 
321 &sata {
322 	status = "okay";
323 };
324 
325 &ssi2 {
326 	status = "okay";
327 };
328 
329 &uart1 {
330 	pinctrl-names = "default";
331 	pinctrl-0 = <&pinctrl_uart1>;
332 	status = "okay";
333 };
334 
335 &uart2 {
336 	pinctrl-names = "default";
337 	pinctrl-0 = <&pinctrl_uart2>;
338 	status = "okay";
339 };
340 
341 &uart3 {
342 	pinctrl-names = "default";
343 	pinctrl-0 = <&pinctrl_uart3>;
344 	status = "okay";
345 };
346 
347 &usbh1 {
348 	pinctrl-names = "default";
349 	pinctrl-0 = <&pinctrl_usb>;
350 	vbus-supply = <&reg_usbh1_vbus>;
351 	phy_type = "utmi";
352 	status = "okay";
353 };
354 
355 &usbotg {
356 	pinctrl-names = "default";
357 	pinctrl-0 = <&pinctrl_usbotg>;
358 	dr_mode = "otg";
359 	vbus-supply = <&reg_usb_otg_vbus>;
360 	disable-over-current;
361 	status = "okay";
362 };
363