1 /* SPDX-License-Identifier: MIT 2 * Copyright (C) 2018 Intel Corp. 3 * 4 * Authors: 5 * Manasi Navare <manasi.d.navare@intel.com> 6 */ 7 8 #ifndef DRM_DSC_H_ 9 #define DRM_DSC_H_ 10 11 #include <drm/display/drm_dp.h> 12 13 /* VESA Display Stream Compression DSC 1.2 constants */ 14 #define DSC_NUM_BUF_RANGES 15 15 #define DSC_MUX_WORD_SIZE_8_10_BPC 48 16 #define DSC_MUX_WORD_SIZE_12_BPC 64 17 #define DSC_RC_PIXELS_PER_GROUP 3 18 #define DSC_SCALE_DECREMENT_INTERVAL_MAX 4095 19 #define DSC_RANGE_BPG_OFFSET_MASK 0x3f 20 21 /* DSC Rate Control Constants */ 22 #define DSC_RC_MODEL_SIZE_CONST 8192 23 #define DSC_RC_EDGE_FACTOR_CONST 6 24 #define DSC_RC_TGT_OFFSET_HI_CONST 3 25 #define DSC_RC_TGT_OFFSET_LO_CONST 3 26 27 /* DSC PPS constants and macros */ 28 #define DSC_PPS_VERSION_MAJOR_SHIFT 4 29 #define DSC_PPS_BPC_SHIFT 4 30 #define DSC_PPS_MSB_SHIFT 8 31 #define DSC_PPS_LSB_MASK (0xFF << 0) 32 #define DSC_PPS_BPP_HIGH_MASK (0x3 << 8) 33 #define DSC_PPS_VBR_EN_SHIFT 2 34 #define DSC_PPS_SIMPLE422_SHIFT 3 35 #define DSC_PPS_CONVERT_RGB_SHIFT 4 36 #define DSC_PPS_BLOCK_PRED_EN_SHIFT 5 37 #define DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK (0x3 << 8) 38 #define DSC_PPS_SCALE_DEC_INT_HIGH_MASK (0xF << 8) 39 #define DSC_PPS_RC_TGT_OFFSET_HI_SHIFT 4 40 #define DSC_PPS_RC_RANGE_MINQP_SHIFT 11 41 #define DSC_PPS_RC_RANGE_MAXQP_SHIFT 6 42 #define DSC_PPS_NATIVE_420_SHIFT 1 43 44 /** 45 * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters 46 * 47 * This defines different rate control parameters used by the DSC engine 48 * to compress the frame. 49 */ 50 struct drm_dsc_rc_range_parameters { 51 /** 52 * @range_min_qp: Min Quantization Parameters allowed for this range 53 */ 54 u8 range_min_qp; 55 /** 56 * @range_max_qp: Max Quantization Parameters allowed for this range 57 */ 58 u8 range_max_qp; 59 /** 60 * @range_bpg_offset: 61 * Bits/group offset to apply to target for this group 62 */ 63 u8 range_bpg_offset; 64 }; 65 66 /** 67 * struct drm_dsc_config - Parameters required to configure DSC 68 * 69 * Driver populates this structure with all the parameters required 70 * to configure the display stream compression on the source. 71 */ 72 struct drm_dsc_config { 73 /** 74 * @line_buf_depth: 75 * Bits per component for previous reconstructed line buffer 76 */ 77 u8 line_buf_depth; 78 /** 79 * @bits_per_component: Bits per component to code (8/10/12) 80 */ 81 u8 bits_per_component; 82 /** 83 * @convert_rgb: 84 * Flag to indicate if RGB - YCoCg conversion is needed 85 * True if RGB input, False if YCoCg input 86 */ 87 bool convert_rgb; 88 /** 89 * @slice_count: Number fo slices per line used by the DSC encoder 90 */ 91 u8 slice_count; 92 /** 93 * @slice_width: Width of each slice in pixels 94 */ 95 u16 slice_width; 96 /** 97 * @slice_height: Slice height in pixels 98 */ 99 u16 slice_height; 100 /** 101 * @simple_422: True if simple 4_2_2 mode is enabled else False 102 */ 103 bool simple_422; 104 /** 105 * @pic_width: Width of the input display frame in pixels 106 */ 107 u16 pic_width; 108 /** 109 * @pic_height: Vertical height of the input display frame 110 */ 111 u16 pic_height; 112 /** 113 * @rc_tgt_offset_high: 114 * Offset to bits/group used by RC to determine QP adjustment 115 */ 116 u8 rc_tgt_offset_high; 117 /** 118 * @rc_tgt_offset_low: 119 * Offset to bits/group used by RC to determine QP adjustment 120 */ 121 u8 rc_tgt_offset_low; 122 /** 123 * @bits_per_pixel: 124 * Target bits per pixel with 4 fractional bits, bits_per_pixel << 4 125 */ 126 u16 bits_per_pixel; 127 /** 128 * @rc_edge_factor: 129 * Factor to determine if an edge is present based on the bits produced 130 */ 131 u8 rc_edge_factor; 132 /** 133 * @rc_quant_incr_limit1: 134 * Slow down incrementing once the range reaches this value 135 */ 136 u8 rc_quant_incr_limit1; 137 /** 138 * @rc_quant_incr_limit0: 139 * Slow down incrementing once the range reaches this value 140 */ 141 u8 rc_quant_incr_limit0; 142 /** 143 * @initial_xmit_delay: 144 * Number of pixels to delay the initial transmission 145 */ 146 u16 initial_xmit_delay; 147 /** 148 * @initial_dec_delay: 149 * Initial decoder delay, number of pixel times that the decoder 150 * accumulates data in its rate buffer before starting to decode 151 * and output pixels. 152 */ 153 u16 initial_dec_delay; 154 /** 155 * @block_pred_enable: 156 * True if block prediction is used to code any groups within the 157 * picture. False if BP not used 158 */ 159 bool block_pred_enable; 160 /** 161 * @first_line_bpg_offset: 162 * Number of additional bits allocated for each group on the first 163 * line of slice. 164 */ 165 u8 first_line_bpg_offset; 166 /** 167 * @initial_offset: Value to use for RC model offset at slice start 168 */ 169 u16 initial_offset; 170 /** 171 * @rc_buf_thresh: Thresholds defining each of the buffer ranges 172 */ 173 u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; 174 /** 175 * @rc_range_params: 176 * Parameters for each of the RC ranges defined in 177 * &struct drm_dsc_rc_range_parameters 178 */ 179 struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; 180 /** 181 * @rc_model_size: Total size of RC model 182 */ 183 u16 rc_model_size; 184 /** 185 * @flatness_min_qp: Minimum QP where flatness information is sent 186 */ 187 u8 flatness_min_qp; 188 /** 189 * @flatness_max_qp: Maximum QP where flatness information is sent 190 */ 191 u8 flatness_max_qp; 192 /** 193 * @initial_scale_value: Initial value for the scale factor 194 */ 195 u8 initial_scale_value; 196 /** 197 * @scale_decrement_interval: 198 * Specifies number of group times between decrementing the scale factor 199 * at beginning of a slice. 200 */ 201 u16 scale_decrement_interval; 202 /** 203 * @scale_increment_interval: 204 * Number of group times between incrementing the scale factor value 205 * used at the beginning of a slice. 206 */ 207 u16 scale_increment_interval; 208 /** 209 * @nfl_bpg_offset: Non first line BPG offset to be used 210 */ 211 u16 nfl_bpg_offset; 212 /** 213 * @slice_bpg_offset: BPG offset used to enforce slice bit 214 */ 215 u16 slice_bpg_offset; 216 /** 217 * @final_offset: Final RC linear transformation offset value 218 */ 219 u16 final_offset; 220 /** 221 * @vbr_enable: True if VBR mode is enabled, false if disabled 222 */ 223 bool vbr_enable; 224 /** 225 * @mux_word_size: Mux word size (in bits) for SSM mode 226 */ 227 u8 mux_word_size; 228 /** 229 * @slice_chunk_size: 230 * The (max) size in bytes of the "chunks" that are used in slice 231 * multiplexing. 232 */ 233 u16 slice_chunk_size; 234 /** 235 * @rc_bits: Rate control buffer size in bits 236 */ 237 u16 rc_bits; 238 /** 239 * @dsc_version_minor: DSC minor version 240 */ 241 u8 dsc_version_minor; 242 /** 243 * @dsc_version_major: DSC major version 244 */ 245 u8 dsc_version_major; 246 /** 247 * @native_422: True if Native 4:2:2 supported, else false 248 */ 249 bool native_422; 250 /** 251 * @native_420: True if Native 4:2:0 supported else false. 252 */ 253 bool native_420; 254 /** 255 * @second_line_bpg_offset: 256 * Additional bits/grp for seconnd line of slice for native 4:2:0 257 */ 258 u8 second_line_bpg_offset; 259 /** 260 * @nsl_bpg_offset: 261 * Num of bits deallocated for each grp that is not in second line of 262 * slice 263 */ 264 u16 nsl_bpg_offset; 265 /** 266 * @second_line_offset_adj: 267 * Offset adjustment for second line in Native 4:2:0 mode 268 */ 269 u16 second_line_offset_adj; 270 }; 271 272 /** 273 * struct drm_dsc_picture_parameter_set - Represents 128 bytes of 274 * Picture Parameter Set 275 * 276 * The VESA DSC standard defines picture parameter set (PPS) which display 277 * stream compression encoders must communicate to decoders. 278 * The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in 279 * this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2. 280 * The PPS fields that span over more than a byte should be stored in Big Endian 281 * format. 282 */ 283 struct drm_dsc_picture_parameter_set { 284 /** 285 * @dsc_version: 286 * PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC 287 * PPS0[7:4] - dsc_version_major: Contains major version of DSC 288 */ 289 u8 dsc_version; 290 /** 291 * @pps_identifier: 292 * PPS1[7:0] - Application specific identifier that can be 293 * used to differentiate between different PPS tables. 294 */ 295 u8 pps_identifier; 296 /** 297 * @pps_reserved: 298 * PPS2[7:0]- RESERVED Byte 299 */ 300 u8 pps_reserved; 301 /** 302 * @pps_3: 303 * PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to 304 * generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 305 * 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 306 * 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. 307 * PPS3[7:4] - bits_per_component: Bits per component for the original 308 * pixels of the encoded picture. 309 * 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 310 * 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also 311 * allowed only when dsc_minor_version = 0x2) 312 */ 313 u8 pps_3; 314 /** 315 * @pps_4: 316 * PPS4[1:0] -These are the most significant 2 bits of 317 * compressed BPP bits_per_pixel[9:0] syntax element. 318 * PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled 319 * PPS4[3] - simple_422: Indicates if decoder drops samples to 320 * reconstruct the 4:2:2 picture. 321 * PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is 322 * active. 323 * PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any 324 * groups in picture 325 * PPS4[7:6] - Reseved bits 326 */ 327 u8 pps_4; 328 /** 329 * @bits_per_pixel_low: 330 * PPS5[7:0] - This indicates the lower significant 8 bits of 331 * the compressed BPP bits_per_pixel[9:0] element. 332 */ 333 u8 bits_per_pixel_low; 334 /** 335 * @pic_height: 336 * PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows 337 * within the raster. 338 */ 339 __be16 pic_height; 340 /** 341 * @pic_width: 342 * PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within 343 * the raster. 344 */ 345 __be16 pic_width; 346 /** 347 * @slice_height: 348 * PPS10[7:0], PPS11[7:0] - Slice height in units of pixels. 349 */ 350 __be16 slice_height; 351 /** 352 * @slice_width: 353 * PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels. 354 */ 355 __be16 slice_width; 356 /** 357 * @chunk_size: 358 * PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks 359 * that are used for slice multiplexing. 360 */ 361 __be16 chunk_size; 362 /** 363 * @initial_xmit_delay_high: 364 * PPS16[1:0] - Most Significant two bits of initial transmission delay. 365 * It specifies the number of pixel times that the encoder waits before 366 * transmitting data from its rate buffer. 367 * PPS16[7:2] - Reserved 368 */ 369 u8 initial_xmit_delay_high; 370 /** 371 * @initial_xmit_delay_low: 372 * PPS17[7:0] - Least significant 8 bits of initial transmission delay. 373 */ 374 u8 initial_xmit_delay_low; 375 /** 376 * @initial_dec_delay: 377 * 378 * PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number 379 * of pixel times that the decoder accumulates data in its rate buffer 380 * before starting to decode and output pixels. 381 */ 382 __be16 initial_dec_delay; 383 /** 384 * @pps20_reserved: 385 * 386 * PPS20[7:0] - Reserved 387 */ 388 u8 pps20_reserved; 389 /** 390 * @initial_scale_value: 391 * PPS21[5:0] - Initial rcXformScale factor used at beginning 392 * of a slice. 393 * PPS21[7:6] - Reserved 394 */ 395 u8 initial_scale_value; 396 /** 397 * @scale_increment_interval: 398 * PPS22[7:0], PPS23[7:0] - Number of group times between incrementing 399 * the rcXformScale factor at end of a slice. 400 */ 401 __be16 scale_increment_interval; 402 /** 403 * @scale_decrement_interval_high: 404 * PPS24[3:0] - Higher 4 bits indicating number of group times between 405 * decrementing the rcXformScale factor at beginning of a slice. 406 * PPS24[7:4] - Reserved 407 */ 408 u8 scale_decrement_interval_high; 409 /** 410 * @scale_decrement_interval_low: 411 * PPS25[7:0] - Lower 8 bits of scale decrement interval 412 */ 413 u8 scale_decrement_interval_low; 414 /** 415 * @pps26_reserved: 416 * PPS26[7:0] 417 */ 418 u8 pps26_reserved; 419 /** 420 * @first_line_bpg_offset: 421 * PPS27[4:0] - Number of additional bits that are allocated 422 * for each group on first line of a slice. 423 * PPS27[7:5] - Reserved 424 */ 425 u8 first_line_bpg_offset; 426 /** 427 * @nfl_bpg_offset: 428 * PPS28[7:0], PPS29[7:0] - Number of bits including frac bits 429 * deallocated for each group for groups after the first line of slice. 430 */ 431 __be16 nfl_bpg_offset; 432 /** 433 * @slice_bpg_offset: 434 * PPS30, PPS31[7:0] - Number of bits that are deallocated for each 435 * group to enforce the slice constraint. 436 */ 437 __be16 slice_bpg_offset; 438 /** 439 * @initial_offset: 440 * PPS32,33[7:0] - Initial value for rcXformOffset 441 */ 442 __be16 initial_offset; 443 /** 444 * @final_offset: 445 * PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset 446 */ 447 __be16 final_offset; 448 /** 449 * @flatness_min_qp: 450 * PPS36[4:0] - Minimum QP at which flatness is signaled and 451 * flatness QP adjustment is made. 452 * PPS36[7:5] - Reserved 453 */ 454 u8 flatness_min_qp; 455 /** 456 * @flatness_max_qp: 457 * PPS37[4:0] - Max QP at which flatness is signalled and 458 * the flatness adjustment is made. 459 * PPS37[7:5] - Reserved 460 */ 461 u8 flatness_max_qp; 462 /** 463 * @rc_model_size: 464 * PPS38,39[7:0] - Number of bits within RC Model. 465 */ 466 __be16 rc_model_size; 467 /** 468 * @rc_edge_factor: 469 * PPS40[3:0] - Ratio of current activity vs, previous 470 * activity to determine presence of edge. 471 * PPS40[7:4] - Reserved 472 */ 473 u8 rc_edge_factor; 474 /** 475 * @rc_quant_incr_limit0: 476 * PPS41[4:0] - QP threshold used in short term RC 477 * PPS41[7:5] - Reserved 478 */ 479 u8 rc_quant_incr_limit0; 480 /** 481 * @rc_quant_incr_limit1: 482 * PPS42[4:0] - QP threshold used in short term RC 483 * PPS42[7:5] - Reserved 484 */ 485 u8 rc_quant_incr_limit1; 486 /** 487 * @rc_tgt_offset: 488 * PPS43[3:0] - Lower end of the variability range around the target 489 * bits per group that is allowed by short term RC. 490 * PPS43[7:4]- Upper end of the variability range around the target 491 * bits per group that i allowed by short term rc. 492 */ 493 u8 rc_tgt_offset; 494 /** 495 * @rc_buf_thresh: 496 * PPS44[7:0] - PPS57[7:0] - Specifies the thresholds in RC model for 497 * the 15 ranges defined by 14 thresholds. 498 */ 499 u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; 500 /** 501 * @rc_range_parameters: 502 * PPS58[7:0] - PPS87[7:0] 503 * Parameters that correspond to each of the 15 ranges. 504 */ 505 __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; 506 /** 507 * @native_422_420: 508 * PPS88[0] - 0 = Native 4:2:2 not used 509 * 1 = Native 4:2:2 used 510 * PPS88[1] - 0 = Native 4:2:0 not use 511 * 1 = Native 4:2:0 used 512 * PPS88[7:2] - Reserved 6 bits 513 */ 514 u8 native_422_420; 515 /** 516 * @second_line_bpg_offset: 517 * PPS89[4:0] - Additional bits/group budget for the 518 * second line of a slice in Native 4:2:0 mode. 519 * Set to 0 if DSC minor version is 1 or native420 is 0. 520 * PPS89[7:5] - Reserved 521 */ 522 u8 second_line_bpg_offset; 523 /** 524 * @nsl_bpg_offset: 525 * PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated 526 * for each group that is not in the second line of a slice. 527 */ 528 __be16 nsl_bpg_offset; 529 /** 530 * @second_line_offset_adj: 531 * PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second 532 * line in Native 4:2:0 mode. 533 */ 534 __be16 second_line_offset_adj; 535 /** 536 * @pps_long_94_reserved: 537 * PPS 94, 95, 96, 97 - Reserved 538 */ 539 u32 pps_long_94_reserved; 540 /** 541 * @pps_long_98_reserved: 542 * PPS 98, 99, 100, 101 - Reserved 543 */ 544 u32 pps_long_98_reserved; 545 /** 546 * @pps_long_102_reserved: 547 * PPS 102, 103, 104, 105 - Reserved 548 */ 549 u32 pps_long_102_reserved; 550 /** 551 * @pps_long_106_reserved: 552 * PPS 106, 107, 108, 109 - reserved 553 */ 554 u32 pps_long_106_reserved; 555 /** 556 * @pps_long_110_reserved: 557 * PPS 110, 111, 112, 113 - reserved 558 */ 559 u32 pps_long_110_reserved; 560 /** 561 * @pps_long_114_reserved: 562 * PPS 114 - 117 - reserved 563 */ 564 u32 pps_long_114_reserved; 565 /** 566 * @pps_long_118_reserved: 567 * PPS 118 - 121 - reserved 568 */ 569 u32 pps_long_118_reserved; 570 /** 571 * @pps_long_122_reserved: 572 * PPS 122- 125 - reserved 573 */ 574 u32 pps_long_122_reserved; 575 /** 576 * @pps_short_126_reserved: 577 * PPS 126, 127 - reserved 578 */ 579 __be16 pps_short_126_reserved; 580 } __packed; 581 582 /** 583 * struct drm_dsc_pps_infoframe - DSC infoframe carrying the Picture Parameter 584 * Set Metadata 585 * 586 * This structure represents the DSC PPS infoframe required to send the Picture 587 * Parameter Set metadata required before enabling VESA Display Stream 588 * Compression. This is based on the DP Secondary Data Packet structure and 589 * comprises of SDP Header as defined &struct dp_sdp_header in drm_dp_helper.h 590 * and PPS payload defined in &struct drm_dsc_picture_parameter_set. 591 * 592 * @pps_header: Header for PPS as per DP SDP header format of type 593 * &struct dp_sdp_header 594 * @pps_payload: PPS payload fields as per DSC specification Table 4-1 595 * as represented in &struct drm_dsc_picture_parameter_set 596 */ 597 struct drm_dsc_pps_infoframe { 598 struct dp_sdp_header pps_header; 599 struct drm_dsc_picture_parameter_set pps_payload; 600 } __packed; 601 602 #endif /* _DRM_DSC_H_ */ 603