1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH12K_WMI_H 8 #define ATH12K_WMI_H 9 10 #include <net/mac80211.h> 11 #include "htc.h" 12 13 /* Naming conventions for structures: 14 * 15 * _cmd means that this is a firmware command sent from host to firmware. 16 * 17 * _event means that this is a firmware event sent from firmware to host 18 * 19 * _params is a structure which is embedded either into _cmd or _event (or 20 * both), it is not sent individually. 21 * 22 * _arg is used inside the host, the firmware does not see that at all. 23 */ 24 25 struct ath12k_base; 26 struct ath12k; 27 struct ath12k_vif; 28 29 /* There is no signed version of __le32, so for a temporary solution come 30 * up with our own version. The idea is from fs/ntfs/endian.h. 31 * 32 * Use a_ prefix so that it doesn't conflict if we get proper support to 33 * linux/types.h. 34 */ 35 typedef __s32 __bitwise a_sle32; 36 a_cpu_to_sle32(s32 val)37 static inline a_sle32 a_cpu_to_sle32(s32 val) 38 { 39 return (__force a_sle32)cpu_to_le32(val); 40 } 41 a_sle32_to_cpu(a_sle32 val)42 static inline s32 a_sle32_to_cpu(a_sle32 val) 43 { 44 return le32_to_cpu((__force __le32)val); 45 } 46 47 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */ 48 #define MAX_HE_NSS 8 49 #define MAX_HE_MODULATION 8 50 #define MAX_HE_RU 4 51 #define HE_MODULATION_NONE 7 52 #define HE_PET_0_USEC 0 53 #define HE_PET_8_USEC 1 54 #define HE_PET_16_USEC 2 55 56 #define WMI_MAX_CHAINS 8 57 58 #define WMI_MAX_NUM_SS MAX_HE_NSS 59 #define WMI_MAX_NUM_RU MAX_HE_RU 60 61 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 62 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 63 #define WMI_TLV_CMD_UNSUPPORTED 0 64 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 65 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 66 67 struct wmi_cmd_hdr { 68 __le32 cmd_id; 69 } __packed; 70 71 struct wmi_tlv { 72 __le32 header; 73 u8 value[]; 74 } __packed; 75 76 #define WMI_TLV_LEN GENMASK(15, 0) 77 #define WMI_TLV_TAG GENMASK(31, 16) 78 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 79 80 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 81 #define WMI_MAX_MEM_REQS 32 82 #define ATH12K_MAX_HW_LISTEN_INTERVAL 5 83 84 #define WMI_HOST_RC_DS_FLAG 0x01 85 #define WMI_HOST_RC_CW40_FLAG 0x02 86 #define WMI_HOST_RC_SGI_FLAG 0x04 87 #define WMI_HOST_RC_HT_FLAG 0x08 88 #define WMI_HOST_RC_RTSCTS_FLAG 0x10 89 #define WMI_HOST_RC_TX_STBC_FLAG 0x20 90 #define WMI_HOST_RC_RX_STBC_FLAG 0xC0 91 #define WMI_HOST_RC_RX_STBC_FLAG_S 6 92 #define WMI_HOST_RC_WEP_TKIP_FLAG 0x100 93 #define WMI_HOST_RC_TS_FLAG 0x200 94 #define WMI_HOST_RC_UAPSD_FLAG 0x400 95 96 #define WMI_HT_CAP_ENABLED 0x0001 97 #define WMI_HT_CAP_HT20_SGI 0x0002 98 #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 99 #define WMI_HT_CAP_TX_STBC 0x0008 100 #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 101 #define WMI_HT_CAP_RX_STBC 0x0030 102 #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 103 #define WMI_HT_CAP_LDPC 0x0040 104 #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 105 #define WMI_HT_CAP_MPDU_DENSITY 0x0700 106 #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 107 #define WMI_HT_CAP_HT40_SGI 0x0800 108 #define WMI_HT_CAP_RX_LDPC 0x1000 109 #define WMI_HT_CAP_TX_LDPC 0x2000 110 #define WMI_HT_CAP_IBF_BFER 0x4000 111 112 /* These macros should be used when we wish to advertise STBC support for 113 * only 1SS or 2SS or 3SS. 114 */ 115 #define WMI_HT_CAP_RX_STBC_1SS 0x0010 116 #define WMI_HT_CAP_RX_STBC_2SS 0x0020 117 #define WMI_HT_CAP_RX_STBC_3SS 0x0030 118 119 #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 120 WMI_HT_CAP_HT20_SGI | \ 121 WMI_HT_CAP_HT40_SGI | \ 122 WMI_HT_CAP_TX_STBC | \ 123 WMI_HT_CAP_RX_STBC | \ 124 WMI_HT_CAP_LDPC) 125 126 #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 127 #define WMI_VHT_CAP_RX_LDPC 0x00000010 128 #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 129 #define WMI_VHT_CAP_SGI_160MHZ 0x00000040 130 #define WMI_VHT_CAP_TX_STBC 0x00000080 131 #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 132 #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 133 #define WMI_VHT_CAP_SU_BFER 0x00000800 134 #define WMI_VHT_CAP_SU_BFEE 0x00001000 135 #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000 136 #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13 137 #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000 138 #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16 139 #define WMI_VHT_CAP_MU_BFER 0x00080000 140 #define WMI_VHT_CAP_MU_BFEE 0x00100000 141 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 142 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 23 143 #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 144 #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 145 146 #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 147 148 /* These macros should be used when we wish to advertise STBC support for 149 * only 1SS or 2SS or 3SS. 150 */ 151 #define WMI_VHT_CAP_RX_STBC_1SS 0x00000100 152 #define WMI_VHT_CAP_RX_STBC_2SS 0x00000200 153 #define WMI_VHT_CAP_RX_STBC_3SS 0x00000300 154 155 #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 156 WMI_VHT_CAP_SGI_80MHZ | \ 157 WMI_VHT_CAP_TX_STBC | \ 158 WMI_VHT_CAP_RX_STBC_MASK | \ 159 WMI_VHT_CAP_RX_LDPC | \ 160 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 161 WMI_VHT_CAP_RX_FIXED_ANT | \ 162 WMI_VHT_CAP_TX_FIXED_ANT) 163 164 #define WLAN_SCAN_MAX_HINT_S_SSID 10 165 #define WLAN_SCAN_MAX_HINT_BSSID 10 166 #define MAX_RNR_BSS 5 167 168 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 169 170 #define WMI_BA_MODE_BUFFER_SIZE_256 3 171 172 /* HW mode config type replicated from FW header 173 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 174 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 175 * one in 2G and another in 5G. 176 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 177 * same band; no tx allowed. 178 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 179 * Support for both PHYs within one band is planned 180 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 181 * but could be extended to other bands in the future. 182 * The separation of the band between the two PHYs needs 183 * to be communicated separately. 184 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 185 * as in WMI_HW_MODE_SBS, and 3rd on the other band 186 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 187 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 188 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 189 */ 190 enum wmi_host_hw_mode_config_type { 191 WMI_HOST_HW_MODE_SINGLE = 0, 192 WMI_HOST_HW_MODE_DBS = 1, 193 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 194 WMI_HOST_HW_MODE_SBS = 3, 195 WMI_HOST_HW_MODE_DBS_SBS = 4, 196 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 197 198 /* keep last */ 199 WMI_HOST_HW_MODE_MAX 200 }; 201 202 /* HW mode priority values used to detect the preferred HW mode 203 * on the available modes. 204 */ 205 enum wmi_host_hw_mode_priority { 206 WMI_HOST_HW_MODE_DBS_SBS_PRI, 207 WMI_HOST_HW_MODE_DBS_PRI, 208 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 209 WMI_HOST_HW_MODE_SBS_PRI, 210 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 211 WMI_HOST_HW_MODE_SINGLE_PRI, 212 213 /* keep last the lowest priority */ 214 WMI_HOST_HW_MODE_MAX_PRI 215 }; 216 217 enum WMI_HOST_WLAN_BAND { 218 WMI_HOST_WLAN_2G_CAP = 1, 219 WMI_HOST_WLAN_5G_CAP = 2, 220 WMI_HOST_WLAN_2G_5G_CAP = 3, 221 }; 222 223 enum wmi_cmd_group { 224 /* 0 to 2 are reserved */ 225 WMI_GRP_START = 0x3, 226 WMI_GRP_SCAN = WMI_GRP_START, 227 WMI_GRP_PDEV = 0x4, 228 WMI_GRP_VDEV = 0x5, 229 WMI_GRP_PEER = 0x6, 230 WMI_GRP_MGMT = 0x7, 231 WMI_GRP_BA_NEG = 0x8, 232 WMI_GRP_STA_PS = 0x9, 233 WMI_GRP_DFS = 0xa, 234 WMI_GRP_ROAM = 0xb, 235 WMI_GRP_OFL_SCAN = 0xc, 236 WMI_GRP_P2P = 0xd, 237 WMI_GRP_AP_PS = 0xe, 238 WMI_GRP_RATE_CTRL = 0xf, 239 WMI_GRP_PROFILE = 0x10, 240 WMI_GRP_SUSPEND = 0x11, 241 WMI_GRP_BCN_FILTER = 0x12, 242 WMI_GRP_WOW = 0x13, 243 WMI_GRP_RTT = 0x14, 244 WMI_GRP_SPECTRAL = 0x15, 245 WMI_GRP_STATS = 0x16, 246 WMI_GRP_ARP_NS_OFL = 0x17, 247 WMI_GRP_NLO_OFL = 0x18, 248 WMI_GRP_GTK_OFL = 0x19, 249 WMI_GRP_CSA_OFL = 0x1a, 250 WMI_GRP_CHATTER = 0x1b, 251 WMI_GRP_TID_ADDBA = 0x1c, 252 WMI_GRP_MISC = 0x1d, 253 WMI_GRP_GPIO = 0x1e, 254 WMI_GRP_FWTEST = 0x1f, 255 WMI_GRP_TDLS = 0x20, 256 WMI_GRP_RESMGR = 0x21, 257 WMI_GRP_STA_SMPS = 0x22, 258 WMI_GRP_WLAN_HB = 0x23, 259 WMI_GRP_RMC = 0x24, 260 WMI_GRP_MHF_OFL = 0x25, 261 WMI_GRP_LOCATION_SCAN = 0x26, 262 WMI_GRP_OEM = 0x27, 263 WMI_GRP_NAN = 0x28, 264 WMI_GRP_COEX = 0x29, 265 WMI_GRP_OBSS_OFL = 0x2a, 266 WMI_GRP_LPI = 0x2b, 267 WMI_GRP_EXTSCAN = 0x2c, 268 WMI_GRP_DHCP_OFL = 0x2d, 269 WMI_GRP_IPA = 0x2e, 270 WMI_GRP_MDNS_OFL = 0x2f, 271 WMI_GRP_SAP_OFL = 0x30, 272 WMI_GRP_OCB = 0x31, 273 WMI_GRP_SOC = 0x32, 274 WMI_GRP_PKT_FILTER = 0x33, 275 WMI_GRP_MAWC = 0x34, 276 WMI_GRP_PMF_OFFLOAD = 0x35, 277 WMI_GRP_BPF_OFFLOAD = 0x36, 278 WMI_GRP_NAN_DATA = 0x37, 279 WMI_GRP_PROTOTYPE = 0x38, 280 WMI_GRP_MONITOR = 0x39, 281 WMI_GRP_REGULATORY = 0x3a, 282 WMI_GRP_HW_DATA_FILTER = 0x3b, 283 WMI_GRP_WLM = 0x3c, 284 WMI_GRP_11K_OFFLOAD = 0x3d, 285 WMI_GRP_TWT = 0x3e, 286 WMI_GRP_MOTION_DET = 0x3f, 287 WMI_GRP_SPATIAL_REUSE = 0x40, 288 }; 289 290 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 291 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 292 293 enum wmi_tlv_cmd_id { 294 WMI_CMD_UNSUPPORTED = 0, 295 WMI_INIT_CMDID = 0x1, 296 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 297 WMI_STOP_SCAN_CMDID, 298 WMI_SCAN_CHAN_LIST_CMDID, 299 WMI_SCAN_SCH_PRIO_TBL_CMDID, 300 WMI_SCAN_UPDATE_REQUEST_CMDID, 301 WMI_SCAN_PROB_REQ_OUI_CMDID, 302 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 303 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 304 WMI_PDEV_SET_CHANNEL_CMDID, 305 WMI_PDEV_SET_PARAM_CMDID, 306 WMI_PDEV_PKTLOG_ENABLE_CMDID, 307 WMI_PDEV_PKTLOG_DISABLE_CMDID, 308 WMI_PDEV_SET_WMM_PARAMS_CMDID, 309 WMI_PDEV_SET_HT_CAP_IE_CMDID, 310 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 311 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 312 WMI_PDEV_SET_QUIET_MODE_CMDID, 313 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 314 WMI_PDEV_GET_TPC_CONFIG_CMDID, 315 WMI_PDEV_SET_BASE_MACADDR_CMDID, 316 WMI_PDEV_DUMP_CMDID, 317 WMI_PDEV_SET_LED_CONFIG_CMDID, 318 WMI_PDEV_GET_TEMPERATURE_CMDID, 319 WMI_PDEV_SET_LED_FLASHING_CMDID, 320 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 321 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 322 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 323 WMI_PDEV_SET_CTL_TABLE_CMDID, 324 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 325 WMI_PDEV_FIPS_CMDID, 326 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 327 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 328 WMI_PDEV_GET_NFCAL_POWER_CMDID, 329 WMI_PDEV_GET_TPC_CMDID, 330 WMI_MIB_STATS_ENABLE_CMDID, 331 WMI_PDEV_SET_PCL_CMDID, 332 WMI_PDEV_SET_HW_MODE_CMDID, 333 WMI_PDEV_SET_MAC_CONFIG_CMDID, 334 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 335 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 336 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 337 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 338 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 339 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 340 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 341 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 342 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 343 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 344 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 345 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 346 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 347 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 348 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 349 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 350 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 351 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 352 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 353 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 354 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 355 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 356 WMI_PDEV_PKTLOG_FILTER_CMDID, 357 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID = 0x4044, 358 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID = 0x4045, 359 WMI_PDEV_SET_BIOS_INTERFACE_CMDID = 0x404A, 360 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 361 WMI_VDEV_DELETE_CMDID, 362 WMI_VDEV_START_REQUEST_CMDID, 363 WMI_VDEV_RESTART_REQUEST_CMDID, 364 WMI_VDEV_UP_CMDID, 365 WMI_VDEV_STOP_CMDID, 366 WMI_VDEV_DOWN_CMDID, 367 WMI_VDEV_SET_PARAM_CMDID, 368 WMI_VDEV_INSTALL_KEY_CMDID, 369 WMI_VDEV_WNM_SLEEPMODE_CMDID, 370 WMI_VDEV_WMM_ADDTS_CMDID, 371 WMI_VDEV_WMM_DELTS_CMDID, 372 WMI_VDEV_SET_WMM_PARAMS_CMDID, 373 WMI_VDEV_SET_GTX_PARAMS_CMDID, 374 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 375 WMI_VDEV_PLMREQ_START_CMDID, 376 WMI_VDEV_PLMREQ_STOP_CMDID, 377 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 378 WMI_VDEV_SET_IE_CMDID, 379 WMI_VDEV_RATEMASK_CMDID, 380 WMI_VDEV_ATF_REQUEST_CMDID, 381 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 382 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 383 WMI_VDEV_SET_QUIET_MODE_CMDID, 384 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 385 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 386 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 387 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 388 WMI_PEER_DELETE_CMDID, 389 WMI_PEER_FLUSH_TIDS_CMDID, 390 WMI_PEER_SET_PARAM_CMDID, 391 WMI_PEER_ASSOC_CMDID, 392 WMI_PEER_ADD_WDS_ENTRY_CMDID, 393 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 394 WMI_PEER_MCAST_GROUP_CMDID, 395 WMI_PEER_INFO_REQ_CMDID, 396 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 397 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 398 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 399 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 400 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 401 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 402 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 403 WMI_PEER_ATF_REQUEST_CMDID, 404 WMI_PEER_BWF_REQUEST_CMDID, 405 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 406 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 407 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 408 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 409 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 410 WMI_PDEV_SEND_BCN_CMDID, 411 WMI_BCN_TMPL_CMDID, 412 WMI_BCN_FILTER_RX_CMDID, 413 WMI_PRB_REQ_FILTER_RX_CMDID, 414 WMI_MGMT_TX_CMDID, 415 WMI_PRB_TMPL_CMDID, 416 WMI_MGMT_TX_SEND_CMDID, 417 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 418 WMI_PDEV_SEND_FD_CMDID, 419 WMI_BCN_OFFLOAD_CTRL_CMDID, 420 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 421 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 422 WMI_FILS_DISCOVERY_TMPL_CMDID, 423 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 424 WMI_ADDBA_SEND_CMDID, 425 WMI_ADDBA_STATUS_CMDID, 426 WMI_DELBA_SEND_CMDID, 427 WMI_ADDBA_SET_RESP_CMDID, 428 WMI_SEND_SINGLEAMSDU_CMDID, 429 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 430 WMI_STA_POWERSAVE_PARAM_CMDID, 431 WMI_STA_MIMO_PS_MODE_CMDID, 432 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 433 WMI_PDEV_DFS_DISABLE_CMDID, 434 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 435 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 436 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 437 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 438 WMI_VDEV_ADFS_CH_CFG_CMDID, 439 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 440 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 441 WMI_ROAM_SCAN_RSSI_THRESHOLD, 442 WMI_ROAM_SCAN_PERIOD, 443 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 444 WMI_ROAM_AP_PROFILE, 445 WMI_ROAM_CHAN_LIST, 446 WMI_ROAM_SCAN_CMD, 447 WMI_ROAM_SYNCH_COMPLETE, 448 WMI_ROAM_SET_RIC_REQUEST_CMDID, 449 WMI_ROAM_INVOKE_CMDID, 450 WMI_ROAM_FILTER_CMDID, 451 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 452 WMI_ROAM_CONFIGURE_MAWC_CMDID, 453 WMI_ROAM_SET_MBO_PARAM_CMDID, 454 WMI_ROAM_PER_CONFIG_CMDID, 455 WMI_ROAM_BTM_CONFIG_CMDID, 456 WMI_ENABLE_FILS_CMDID, 457 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 458 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 459 WMI_OFL_SCAN_PERIOD, 460 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 461 WMI_P2P_DEV_SET_DISCOVERABILITY, 462 WMI_P2P_GO_SET_BEACON_IE, 463 WMI_P2P_GO_SET_PROBE_RESP_IE, 464 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 465 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 466 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 467 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 468 WMI_P2P_SET_OPPPS_PARAM_CMDID, 469 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 470 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 471 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 472 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 473 WMI_AP_PS_EGAP_PARAM_CMDID, 474 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 475 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 476 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 477 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 478 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 479 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 480 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 481 WMI_PDEV_RESUME_CMDID, 482 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 483 WMI_RMV_BCN_FILTER_CMDID, 484 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 485 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 486 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 487 WMI_WOW_ENABLE_CMDID, 488 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 489 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 490 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 491 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 492 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 493 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 494 WMI_EXTWOW_ENABLE_CMDID, 495 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 496 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 497 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 498 WMI_WOW_UDP_SVC_OFLD_CMDID, 499 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 500 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 501 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 502 WMI_RTT_TSF_CMDID, 503 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 504 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 505 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 506 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 507 WMI_REQUEST_STATS_EXT_CMDID, 508 WMI_REQUEST_LINK_STATS_CMDID, 509 WMI_START_LINK_STATS_CMDID, 510 WMI_CLEAR_LINK_STATS_CMDID, 511 WMI_GET_FW_MEM_DUMP_CMDID, 512 WMI_DEBUG_MESG_FLUSH_CMDID, 513 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 514 WMI_REQUEST_WLAN_STATS_CMDID, 515 WMI_REQUEST_RCPI_CMDID, 516 WMI_REQUEST_PEER_STATS_INFO_CMDID, 517 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 518 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 519 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 520 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 521 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 522 WMI_APFIND_CMDID, 523 WMI_PASSPOINT_LIST_CONFIG_CMDID, 524 WMI_NLO_CONFIGURE_MAWC_CMDID, 525 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 526 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 527 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 528 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 529 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 530 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 531 WMI_CHATTER_COALESCING_QUERY_CMDID, 532 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 533 WMI_PEER_TID_DELBA_CMDID, 534 WMI_STA_DTIM_PS_METHOD_CMDID, 535 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 536 WMI_STA_KEEPALIVE_CMDID, 537 WMI_BA_REQ_SSN_CMDID, 538 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 539 WMI_PDEV_UTF_CMDID, 540 WMI_DBGLOG_CFG_CMDID, 541 WMI_PDEV_QVIT_CMDID, 542 WMI_PDEV_FTM_INTG_CMDID, 543 WMI_VDEV_SET_KEEPALIVE_CMDID, 544 WMI_VDEV_GET_KEEPALIVE_CMDID, 545 WMI_FORCE_FW_HANG_CMDID, 546 WMI_SET_MCASTBCAST_FILTER_CMDID, 547 WMI_THERMAL_MGMT_CMDID, 548 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 549 WMI_TPC_CHAINMASK_CONFIG_CMDID, 550 WMI_SET_ANTENNA_DIVERSITY_CMDID, 551 WMI_OCB_SET_SCHED_CMDID, 552 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 553 WMI_LRO_CONFIG_CMDID, 554 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 555 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 556 WMI_VDEV_WISA_CMDID, 557 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 558 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 559 WMI_READ_DATA_FROM_FLASH_CMDID, 560 WMI_THERM_THROT_SET_CONF_CMDID, 561 WMI_RUNTIME_DPD_RECAL_CMDID, 562 WMI_GET_TPC_POWER_CMDID, 563 WMI_IDLE_TRIGGER_MONITOR_CMDID, 564 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 565 WMI_GPIO_OUTPUT_CMDID, 566 WMI_TXBF_CMDID, 567 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 568 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 569 WMI_UNIT_TEST_CMDID, 570 WMI_FWTEST_CMDID, 571 WMI_QBOOST_CFG_CMDID, 572 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 573 WMI_TDLS_PEER_UPDATE_CMDID, 574 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 575 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 576 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 577 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 578 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 579 WMI_STA_SMPS_PARAM_CMDID, 580 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 581 WMI_HB_SET_TCP_PARAMS_CMDID, 582 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 583 WMI_HB_SET_UDP_PARAMS_CMDID, 584 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 585 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 586 WMI_RMC_SET_ACTION_PERIOD_CMDID, 587 WMI_RMC_CONFIG_CMDID, 588 WMI_RMC_SET_MANUAL_LEADER_CMDID, 589 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 590 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 591 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 592 WMI_BATCH_SCAN_DISABLE_CMDID, 593 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 594 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 595 WMI_OEM_REQUEST_CMDID, 596 WMI_LPI_OEM_REQ_CMDID, 597 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 598 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 599 WMI_CHAN_AVOID_UPDATE_CMDID, 600 WMI_COEX_CONFIG_CMDID, 601 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 602 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 603 WMI_SAR_LIMITS_CMDID, 604 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 605 WMI_OBSS_SCAN_DISABLE_CMDID, 606 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 607 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 608 WMI_LPI_START_SCAN_CMDID, 609 WMI_LPI_STOP_SCAN_CMDID, 610 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 611 WMI_EXTSCAN_STOP_CMDID, 612 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 613 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 614 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 615 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 616 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 617 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 618 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 619 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 620 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 621 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 622 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 623 WMI_MDNS_SET_FQDN_CMDID, 624 WMI_MDNS_SET_RESPONSE_CMDID, 625 WMI_MDNS_GET_STATS_CMDID, 626 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 627 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 628 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 629 WMI_OCB_SET_UTC_TIME_CMDID, 630 WMI_OCB_START_TIMING_ADVERT_CMDID, 631 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 632 WMI_OCB_GET_TSF_TIMER_CMDID, 633 WMI_DCC_GET_STATS_CMDID, 634 WMI_DCC_CLEAR_STATS_CMDID, 635 WMI_DCC_UPDATE_NDL_CMDID, 636 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 637 WMI_SOC_SET_HW_MODE_CMDID, 638 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 639 WMI_SOC_SET_ANTENNA_MODE_CMDID, 640 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 641 WMI_PACKET_FILTER_ENABLE_CMDID, 642 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 643 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 644 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 645 WMI_BPF_GET_VDEV_STATS_CMDID, 646 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 647 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 648 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 649 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 650 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 651 WMI_11D_SCAN_START_CMDID, 652 WMI_11D_SCAN_STOP_CMDID, 653 WMI_SET_INIT_COUNTRY_CMDID, 654 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 655 WMI_NDP_INITIATOR_REQ_CMDID, 656 WMI_NDP_RESPONDER_REQ_CMDID, 657 WMI_NDP_END_REQ_CMDID, 658 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 659 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 660 WMI_TWT_DISABLE_CMDID, 661 WMI_TWT_ADD_DIALOG_CMDID, 662 WMI_TWT_DEL_DIALOG_CMDID, 663 WMI_TWT_PAUSE_DIALOG_CMDID, 664 WMI_TWT_RESUME_DIALOG_CMDID, 665 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 666 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 667 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 668 }; 669 670 enum wmi_tlv_event_id { 671 WMI_SERVICE_READY_EVENTID = 0x1, 672 WMI_READY_EVENTID, 673 WMI_SERVICE_AVAILABLE_EVENTID, 674 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 675 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 676 WMI_CHAN_INFO_EVENTID, 677 WMI_PHYERR_EVENTID, 678 WMI_PDEV_DUMP_EVENTID, 679 WMI_TX_PAUSE_EVENTID, 680 WMI_DFS_RADAR_EVENTID, 681 WMI_PDEV_L1SS_TRACK_EVENTID, 682 WMI_PDEV_TEMPERATURE_EVENTID, 683 WMI_SERVICE_READY_EXT_EVENTID, 684 WMI_PDEV_FIPS_EVENTID, 685 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 686 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 687 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 688 WMI_PDEV_TPC_EVENTID, 689 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 690 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 691 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 692 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 693 WMI_PDEV_ANTDIV_STATUS_EVENTID, 694 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 695 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 696 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 697 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 698 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 699 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 700 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 701 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 702 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 703 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 704 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 705 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 706 WMI_PDEV_RAP_INFO_EVENTID, 707 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 708 WMI_SERVICE_READY_EXT2_EVENTID, 709 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 710 WMI_VDEV_STOPPED_EVENTID, 711 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 712 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 713 WMI_VDEV_TSF_REPORT_EVENTID, 714 WMI_VDEV_DELETE_RESP_EVENTID, 715 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 716 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 717 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 718 WMI_PEER_INFO_EVENTID, 719 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 720 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 721 WMI_PEER_STATE_EVENTID, 722 WMI_PEER_ASSOC_CONF_EVENTID, 723 WMI_PEER_DELETE_RESP_EVENTID, 724 WMI_PEER_RATECODE_LIST_EVENTID, 725 WMI_WDS_PEER_EVENTID, 726 WMI_PEER_STA_PS_STATECHG_EVENTID, 727 WMI_PEER_ANTDIV_INFO_EVENTID, 728 WMI_PEER_RESERVED0_EVENTID, 729 WMI_PEER_RESERVED1_EVENTID, 730 WMI_PEER_RESERVED2_EVENTID, 731 WMI_PEER_RESERVED3_EVENTID, 732 WMI_PEER_RESERVED4_EVENTID, 733 WMI_PEER_RESERVED5_EVENTID, 734 WMI_PEER_RESERVED6_EVENTID, 735 WMI_PEER_RESERVED7_EVENTID, 736 WMI_PEER_RESERVED8_EVENTID, 737 WMI_PEER_RESERVED9_EVENTID, 738 WMI_PEER_RESERVED10_EVENTID, 739 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 740 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 741 WMI_HOST_SWBA_EVENTID, 742 WMI_TBTTOFFSET_UPDATE_EVENTID, 743 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 744 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 745 WMI_MGMT_TX_COMPLETION_EVENTID, 746 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 747 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 748 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 749 WMI_HOST_FILS_DISCOVERY_EVENTID, 750 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 751 WMI_TX_ADDBA_COMPLETE_EVENTID, 752 WMI_BA_RSP_SSN_EVENTID, 753 WMI_AGGR_STATE_TRIG_EVENTID, 754 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 755 WMI_PROFILE_MATCH, 756 WMI_ROAM_SYNCH_EVENTID, 757 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 758 WMI_P2P_NOA_EVENTID, 759 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 760 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 761 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 762 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 763 WMI_D0_WOW_DISABLE_ACK_EVENTID, 764 WMI_WOW_INITIAL_WAKEUP_EVENTID, 765 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 766 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 767 WMI_RTT_ERROR_REPORT_EVENTID, 768 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 769 WMI_IFACE_LINK_STATS_EVENTID, 770 WMI_PEER_LINK_STATS_EVENTID, 771 WMI_RADIO_LINK_STATS_EVENTID, 772 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 773 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 774 WMI_INST_RSSI_STATS_EVENTID, 775 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 776 WMI_REPORT_STATS_EVENTID, 777 WMI_UPDATE_RCPI_EVENTID, 778 WMI_PEER_STATS_INFO_EVENTID, 779 WMI_RADIO_CHAN_STATS_EVENTID, 780 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 781 WMI_NLO_SCAN_COMPLETE_EVENTID, 782 WMI_APFIND_EVENTID, 783 WMI_PASSPOINT_MATCH_EVENTID, 784 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 785 WMI_GTK_REKEY_FAIL_EVENTID, 786 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 787 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 788 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 789 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 790 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 791 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 792 WMI_PDEV_UTF_EVENTID, 793 WMI_DEBUG_MESG_EVENTID, 794 WMI_UPDATE_STATS_EVENTID, 795 WMI_DEBUG_PRINT_EVENTID, 796 WMI_DCS_INTERFERENCE_EVENTID, 797 WMI_PDEV_QVIT_EVENTID, 798 WMI_WLAN_PROFILE_DATA_EVENTID, 799 WMI_PDEV_FTM_INTG_EVENTID, 800 WMI_WLAN_FREQ_AVOID_EVENTID, 801 WMI_VDEV_GET_KEEPALIVE_EVENTID, 802 WMI_THERMAL_MGMT_EVENTID, 803 WMI_DIAG_DATA_CONTAINER_EVENTID, 804 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 805 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 806 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 807 WMI_DIAG_EVENTID, 808 WMI_OCB_SET_SCHED_EVENTID, 809 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 810 WMI_RSSI_BREACH_EVENTID, 811 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 812 WMI_PDEV_UTF_SCPC_EVENTID, 813 WMI_READ_DATA_FROM_FLASH_EVENTID, 814 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 815 WMI_PKGID_EVENTID, 816 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 817 WMI_UPLOADH_EVENTID, 818 WMI_CAPTUREH_EVENTID, 819 WMI_RFKILL_STATE_CHANGE_EVENTID, 820 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 821 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 822 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 823 WMI_BATCH_SCAN_RESULT_EVENTID, 824 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 825 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 826 WMI_OEM_ERROR_REPORT_EVENTID, 827 WMI_OEM_RESPONSE_EVENTID, 828 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 829 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 830 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 831 WMI_NAN_STARTED_CLUSTER_EVENTID, 832 WMI_NAN_JOINED_CLUSTER_EVENTID, 833 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 834 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 835 WMI_LPI_STATUS_EVENTID, 836 WMI_LPI_HANDOFF_EVENTID, 837 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 838 WMI_EXTSCAN_OPERATION_EVENTID, 839 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 840 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 841 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 842 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 843 WMI_EXTSCAN_CAPABILITIES_EVENTID, 844 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 845 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 846 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 847 WMI_SAP_OFL_DEL_STA_EVENTID, 848 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 849 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 850 WMI_DCC_GET_STATS_RESP_EVENTID, 851 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 852 WMI_DCC_STATS_EVENTID, 853 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 854 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 855 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 856 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 857 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 858 WMI_BPF_VDEV_STATS_INFO_EVENTID, 859 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 860 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 861 WMI_11D_NEW_COUNTRY_EVENTID, 862 WMI_REG_CHAN_LIST_CC_EXT_EVENTID, 863 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 864 WMI_NDP_INITIATOR_RSP_EVENTID, 865 WMI_NDP_RESPONDER_RSP_EVENTID, 866 WMI_NDP_END_RSP_EVENTID, 867 WMI_NDP_INDICATION_EVENTID, 868 WMI_NDP_CONFIRM_EVENTID, 869 WMI_NDP_END_INDICATION_EVENTID, 870 871 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 872 WMI_TWT_DISABLE_EVENTID, 873 WMI_TWT_ADD_DIALOG_EVENTID, 874 WMI_TWT_DEL_DIALOG_EVENTID, 875 WMI_TWT_PAUSE_DIALOG_EVENTID, 876 WMI_TWT_RESUME_DIALOG_EVENTID, 877 }; 878 879 enum wmi_tlv_pdev_param { 880 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 881 WMI_PDEV_PARAM_RX_CHAIN_MASK, 882 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 883 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 884 WMI_PDEV_PARAM_TXPOWER_SCALE, 885 WMI_PDEV_PARAM_BEACON_GEN_MODE, 886 WMI_PDEV_PARAM_BEACON_TX_MODE, 887 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 888 WMI_PDEV_PARAM_PROTECTION_MODE, 889 WMI_PDEV_PARAM_DYNAMIC_BW, 890 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 891 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 892 WMI_PDEV_PARAM_STA_KICKOUT_TH, 893 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 894 WMI_PDEV_PARAM_LTR_ENABLE, 895 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 896 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 897 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 898 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 899 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 900 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 901 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 902 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 903 WMI_PDEV_PARAM_L1SS_ENABLE, 904 WMI_PDEV_PARAM_DSLEEP_ENABLE, 905 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 906 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 907 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 908 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 909 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 910 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 911 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 912 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 913 WMI_PDEV_PARAM_PMF_QOS, 914 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 915 WMI_PDEV_PARAM_DCS, 916 WMI_PDEV_PARAM_ANI_ENABLE, 917 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 918 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 919 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 920 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 921 WMI_PDEV_PARAM_DYNTXCHAIN, 922 WMI_PDEV_PARAM_PROXY_STA, 923 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 924 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 925 WMI_PDEV_PARAM_RFKILL_ENABLE, 926 WMI_PDEV_PARAM_BURST_DUR, 927 WMI_PDEV_PARAM_BURST_ENABLE, 928 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 929 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 930 WMI_PDEV_PARAM_L1SS_TRACK, 931 WMI_PDEV_PARAM_HYST_EN, 932 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 933 WMI_PDEV_PARAM_LED_SYS_STATE, 934 WMI_PDEV_PARAM_LED_ENABLE, 935 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 936 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 937 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 938 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 939 WMI_PDEV_PARAM_CTS_CBW, 940 WMI_PDEV_PARAM_WNTS_CONFIG, 941 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 942 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 943 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 944 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 945 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 946 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 947 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 948 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 949 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 950 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 951 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 952 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 953 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 954 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 955 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 956 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 957 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 958 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 959 WMI_PDEV_PARAM_AGGR_BURST, 960 WMI_PDEV_PARAM_RX_DECAP_MODE, 961 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 962 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 963 WMI_PDEV_PARAM_ANTENNA_GAIN, 964 WMI_PDEV_PARAM_RX_FILTER, 965 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 966 WMI_PDEV_PARAM_PROXY_STA_MODE, 967 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 968 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 969 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 970 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 971 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 972 WMI_PDEV_PARAM_BLOCK_INTERBSS, 973 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 974 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 975 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 976 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 977 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 978 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 979 WMI_PDEV_PARAM_EN_STATS, 980 WMI_PDEV_PARAM_MU_GROUP_POLICY, 981 WMI_PDEV_PARAM_NOISE_DETECTION, 982 WMI_PDEV_PARAM_NOISE_THRESHOLD, 983 WMI_PDEV_PARAM_DPD_ENABLE, 984 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 985 WMI_PDEV_PARAM_ATF_STRICT_SCH, 986 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 987 WMI_PDEV_PARAM_ANT_PLZN, 988 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 989 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 990 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 991 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 992 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 993 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 994 WMI_PDEV_PARAM_CCA_THRESHOLD, 995 WMI_PDEV_PARAM_RTS_FIXED_RATE, 996 WMI_PDEV_PARAM_PDEV_RESET, 997 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 998 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 999 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 1000 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 1001 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 1002 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 1003 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 1004 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 1005 WMI_PDEV_PARAM_PROPAGATION_DELAY, 1006 WMI_PDEV_PARAM_ENA_ANT_DIV, 1007 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 1008 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 1009 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 1010 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 1011 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 1012 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 1013 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 1014 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 1015 WMI_PDEV_PARAM_TX_SCH_DELAY, 1016 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 1017 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 1018 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 1019 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 1020 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 1021 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 1022 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 1023 }; 1024 1025 enum wmi_tlv_vdev_param { 1026 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 1027 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 1028 WMI_VDEV_PARAM_BEACON_INTERVAL, 1029 WMI_VDEV_PARAM_LISTEN_INTERVAL, 1030 WMI_VDEV_PARAM_MULTICAST_RATE, 1031 WMI_VDEV_PARAM_MGMT_TX_RATE, 1032 WMI_VDEV_PARAM_SLOT_TIME, 1033 WMI_VDEV_PARAM_PREAMBLE, 1034 WMI_VDEV_PARAM_SWBA_TIME, 1035 WMI_VDEV_STATS_UPDATE_PERIOD, 1036 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 1037 WMI_VDEV_HOST_SWBA_INTERVAL, 1038 WMI_VDEV_PARAM_DTIM_PERIOD, 1039 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 1040 WMI_VDEV_PARAM_WDS, 1041 WMI_VDEV_PARAM_ATIM_WINDOW, 1042 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 1043 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 1044 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 1045 WMI_VDEV_PARAM_FEATURE_WMM, 1046 WMI_VDEV_PARAM_CHWIDTH, 1047 WMI_VDEV_PARAM_CHEXTOFFSET, 1048 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 1049 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 1050 WMI_VDEV_PARAM_MGMT_RATE, 1051 WMI_VDEV_PARAM_PROTECTION_MODE, 1052 WMI_VDEV_PARAM_FIXED_RATE, 1053 WMI_VDEV_PARAM_SGI, 1054 WMI_VDEV_PARAM_LDPC, 1055 WMI_VDEV_PARAM_TX_STBC, 1056 WMI_VDEV_PARAM_RX_STBC, 1057 WMI_VDEV_PARAM_INTRA_BSS_FWD, 1058 WMI_VDEV_PARAM_DEF_KEYID, 1059 WMI_VDEV_PARAM_NSS, 1060 WMI_VDEV_PARAM_BCAST_DATA_RATE, 1061 WMI_VDEV_PARAM_MCAST_DATA_RATE, 1062 WMI_VDEV_PARAM_MCAST_INDICATE, 1063 WMI_VDEV_PARAM_DHCP_INDICATE, 1064 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 1065 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1066 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1067 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1068 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1069 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1070 WMI_VDEV_PARAM_TXBF, 1071 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1072 WMI_VDEV_PARAM_DROP_UNENCRY, 1073 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1074 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1075 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1076 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1077 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1078 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1079 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1080 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1081 WMI_VDEV_PARAM_TX_PWRLIMIT, 1082 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1083 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1084 WMI_VDEV_PARAM_ENABLE_RMC, 1085 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1086 WMI_VDEV_PARAM_MAX_RATE, 1087 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1088 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1089 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1090 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1091 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1092 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1093 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1094 WMI_VDEV_PARAM_INACTIVITY_CNT, 1095 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1096 WMI_VDEV_PARAM_DTIM_POLICY, 1097 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1098 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1099 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1100 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1101 WMI_VDEV_PARAM_DISCONNECT_TH, 1102 WMI_VDEV_PARAM_RTSCTS_RATE, 1103 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1104 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1105 WMI_VDEV_PARAM_TXPOWER_SCALE, 1106 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1107 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1108 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1109 WMI_VDEV_PARAM_CABQ_MAXDUR, 1110 WMI_VDEV_PARAM_MFPTEST_SET, 1111 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1112 WMI_VDEV_PARAM_VHT_SGIMASK, 1113 WMI_VDEV_PARAM_VHT80_RATEMASK, 1114 WMI_VDEV_PARAM_PROXY_STA, 1115 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1116 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1117 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1118 WMI_VDEV_PARAM_SENSOR_AP, 1119 WMI_VDEV_PARAM_BEACON_RATE, 1120 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1121 WMI_VDEV_PARAM_STA_KICKOUT, 1122 WMI_VDEV_PARAM_CAPABILITIES, 1123 WMI_VDEV_PARAM_TSF_INCREMENT, 1124 WMI_VDEV_PARAM_AMPDU_PER_AC, 1125 WMI_VDEV_PARAM_RX_FILTER, 1126 WMI_VDEV_PARAM_MGMT_TX_POWER, 1127 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1128 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1129 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1130 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1131 WMI_VDEV_PARAM_HE_DCM, 1132 WMI_VDEV_PARAM_HE_RANGE_EXT, 1133 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1134 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1135 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1136 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1137 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1138 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1139 WMI_VDEV_PARAM_BSS_COLOR, 1140 WMI_VDEV_PARAM_SET_HEMU_MODE, 1141 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1142 }; 1143 1144 enum wmi_tlv_peer_flags { 1145 WMI_PEER_AUTH = 0x00000001, 1146 WMI_PEER_QOS = 0x00000002, 1147 WMI_PEER_NEED_PTK_4_WAY = 0x00000004, 1148 WMI_PEER_NEED_GTK_2_WAY = 0x00000010, 1149 WMI_PEER_HE = 0x00000400, 1150 WMI_PEER_APSD = 0x00000800, 1151 WMI_PEER_HT = 0x00001000, 1152 WMI_PEER_40MHZ = 0x00002000, 1153 WMI_PEER_STBC = 0x00008000, 1154 WMI_PEER_LDPC = 0x00010000, 1155 WMI_PEER_DYN_MIMOPS = 0x00020000, 1156 WMI_PEER_STATIC_MIMOPS = 0x00040000, 1157 WMI_PEER_SPATIAL_MUX = 0x00200000, 1158 WMI_PEER_TWT_REQ = 0x00400000, 1159 WMI_PEER_TWT_RESP = 0x00800000, 1160 WMI_PEER_VHT = 0x02000000, 1161 WMI_PEER_80MHZ = 0x04000000, 1162 WMI_PEER_PMF = 0x08000000, 1163 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1164 WMI_PEER_160MHZ = 0x40000000, 1165 WMI_PEER_SAFEMODE_EN = 0x80000000, 1166 }; 1167 1168 enum wmi_tlv_peer_flags_ext { 1169 WMI_PEER_EXT_EHT = BIT(0), 1170 WMI_PEER_EXT_320MHZ = BIT(1), 1171 }; 1172 1173 /** Enum list of TLV Tags for each parameter structure type. */ 1174 enum wmi_tlv_tag { 1175 WMI_TAG_LAST_RESERVED = 15, 1176 WMI_TAG_FIRST_ARRAY_ENUM, 1177 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1178 WMI_TAG_ARRAY_BYTE, 1179 WMI_TAG_ARRAY_STRUCT, 1180 WMI_TAG_ARRAY_FIXED_STRUCT, 1181 WMI_TAG_LAST_ARRAY_ENUM = 31, 1182 WMI_TAG_SERVICE_READY_EVENT, 1183 WMI_TAG_HAL_REG_CAPABILITIES, 1184 WMI_TAG_WLAN_HOST_MEM_REQ, 1185 WMI_TAG_READY_EVENT, 1186 WMI_TAG_SCAN_EVENT, 1187 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1188 WMI_TAG_CHAN_INFO_EVENT, 1189 WMI_TAG_COMB_PHYERR_RX_HDR, 1190 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1191 WMI_TAG_VDEV_STOPPED_EVENT, 1192 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1193 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1194 WMI_TAG_MGMT_RX_HDR, 1195 WMI_TAG_TBTT_OFFSET_EVENT, 1196 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1197 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1198 WMI_TAG_ROAM_EVENT, 1199 WMI_TAG_WOW_EVENT_INFO, 1200 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1201 WMI_TAG_RTT_EVENT_HEADER, 1202 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1203 WMI_TAG_RTT_MEAS_EVENT, 1204 WMI_TAG_ECHO_EVENT, 1205 WMI_TAG_FTM_INTG_EVENT, 1206 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1207 WMI_TAG_GPIO_INPUT_EVENT, 1208 WMI_TAG_CSA_EVENT, 1209 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1210 WMI_TAG_IGTK_INFO, 1211 WMI_TAG_DCS_INTERFERENCE_EVENT, 1212 WMI_TAG_ATH_DCS_CW_INT, 1213 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1214 WMI_TAG_ATH_DCS_CW_INT, 1215 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1216 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1217 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1218 WMI_TAG_WLAN_PROFILE_CTX_T, 1219 WMI_TAG_WLAN_PROFILE_T, 1220 WMI_TAG_PDEV_QVIT_EVENT, 1221 WMI_TAG_HOST_SWBA_EVENT, 1222 WMI_TAG_TIM_INFO, 1223 WMI_TAG_P2P_NOA_INFO, 1224 WMI_TAG_STATS_EVENT, 1225 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1226 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1227 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1228 WMI_TAG_INIT_CMD, 1229 WMI_TAG_RESOURCE_CONFIG, 1230 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1231 WMI_TAG_START_SCAN_CMD, 1232 WMI_TAG_STOP_SCAN_CMD, 1233 WMI_TAG_SCAN_CHAN_LIST_CMD, 1234 WMI_TAG_CHANNEL, 1235 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1236 WMI_TAG_PDEV_SET_PARAM_CMD, 1237 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1238 WMI_TAG_WMM_PARAMS, 1239 WMI_TAG_PDEV_SET_QUIET_CMD, 1240 WMI_TAG_VDEV_CREATE_CMD, 1241 WMI_TAG_VDEV_DELETE_CMD, 1242 WMI_TAG_VDEV_START_REQUEST_CMD, 1243 WMI_TAG_P2P_NOA_DESCRIPTOR, 1244 WMI_TAG_P2P_GO_SET_BEACON_IE, 1245 WMI_TAG_GTK_OFFLOAD_CMD, 1246 WMI_TAG_VDEV_UP_CMD, 1247 WMI_TAG_VDEV_STOP_CMD, 1248 WMI_TAG_VDEV_DOWN_CMD, 1249 WMI_TAG_VDEV_SET_PARAM_CMD, 1250 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1251 WMI_TAG_PEER_CREATE_CMD, 1252 WMI_TAG_PEER_DELETE_CMD, 1253 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1254 WMI_TAG_PEER_SET_PARAM_CMD, 1255 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1256 WMI_TAG_VHT_RATE_SET, 1257 WMI_TAG_BCN_TMPL_CMD, 1258 WMI_TAG_PRB_TMPL_CMD, 1259 WMI_TAG_BCN_PRB_INFO, 1260 WMI_TAG_PEER_TID_ADDBA_CMD, 1261 WMI_TAG_PEER_TID_DELBA_CMD, 1262 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1263 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1264 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1265 WMI_TAG_ROAM_SCAN_MODE, 1266 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1267 WMI_TAG_ROAM_SCAN_PERIOD, 1268 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1269 WMI_TAG_PDEV_SUSPEND_CMD, 1270 WMI_TAG_PDEV_RESUME_CMD, 1271 WMI_TAG_ADD_BCN_FILTER_CMD, 1272 WMI_TAG_RMV_BCN_FILTER_CMD, 1273 WMI_TAG_WOW_ENABLE_CMD, 1274 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1275 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1276 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1277 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1278 WMI_TAG_ARP_OFFLOAD_TUPLE, 1279 WMI_TAG_NS_OFFLOAD_TUPLE, 1280 WMI_TAG_FTM_INTG_CMD, 1281 WMI_TAG_STA_KEEPALIVE_CMD, 1282 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1283 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1284 WMI_TAG_AP_PS_PEER_CMD, 1285 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1286 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1287 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1288 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1289 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1290 WMI_TAG_WOW_DEL_PATTERN_CMD, 1291 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1292 WMI_TAG_RTT_MEASREQ_HEAD, 1293 WMI_TAG_RTT_MEASREQ_BODY, 1294 WMI_TAG_RTT_TSF_CMD, 1295 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1296 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1297 WMI_TAG_REQUEST_STATS_CMD, 1298 WMI_TAG_NLO_CONFIG_CMD, 1299 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1300 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1301 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1302 WMI_TAG_CHATTER_SET_MODE_CMD, 1303 WMI_TAG_ECHO_CMD, 1304 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1305 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1306 WMI_TAG_FORCE_FW_HANG_CMD, 1307 WMI_TAG_GPIO_CONFIG_CMD, 1308 WMI_TAG_GPIO_OUTPUT_CMD, 1309 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1310 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1311 WMI_TAG_BCN_TX_HDR, 1312 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1313 WMI_TAG_MGMT_TX_HDR, 1314 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1315 WMI_TAG_ADDBA_SEND_CMD, 1316 WMI_TAG_DELBA_SEND_CMD, 1317 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1318 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1319 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1320 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1321 WMI_TAG_PDEV_SET_HT_IE_CMD, 1322 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1323 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1324 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1325 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1326 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1327 WMI_TAG_PEER_MCAST_GROUP_CMD, 1328 WMI_TAG_ROAM_AP_PROFILE, 1329 WMI_TAG_AP_PROFILE, 1330 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1331 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1332 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1333 WMI_TAG_WOW_ADD_PATTERN_CMD, 1334 WMI_TAG_WOW_BITMAP_PATTERN_T, 1335 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1336 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1337 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1338 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1339 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1340 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1341 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1342 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1343 WMI_TAG_TXBF_CMD, 1344 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1345 WMI_TAG_NLO_EVENT, 1346 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1347 WMI_TAG_UPLOAD_H_HDR, 1348 WMI_TAG_CAPTURE_H_EVENT_HDR, 1349 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1350 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1351 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1352 WMI_TAG_VDEV_WMM_DELTS_CMD, 1353 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1354 WMI_TAG_TDLS_SET_STATE_CMD, 1355 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1356 WMI_TAG_TDLS_PEER_EVENT, 1357 WMI_TAG_TDLS_PEER_CAPABILITIES, 1358 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1359 WMI_TAG_ROAM_CHAN_LIST, 1360 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1361 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1362 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1363 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1364 WMI_TAG_BA_REQ_SSN_CMD, 1365 WMI_TAG_BA_RSP_SSN_EVENT, 1366 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1367 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1368 WMI_TAG_P2P_SET_OPPPS_CMD, 1369 WMI_TAG_P2P_SET_NOA_CMD, 1370 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1371 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1372 WMI_TAG_STA_SMPS_PARAM_CMD, 1373 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1374 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1375 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1376 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1377 WMI_TAG_P2P_NOA_EVENT, 1378 WMI_TAG_HB_SET_ENABLE_CMD, 1379 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1380 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1381 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1382 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1383 WMI_TAG_HB_IND_EVENT, 1384 WMI_TAG_TX_PAUSE_EVENT, 1385 WMI_TAG_RFKILL_EVENT, 1386 WMI_TAG_DFS_RADAR_EVENT, 1387 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1388 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1389 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1390 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1391 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1392 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1393 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1394 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1395 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1396 WMI_TAG_VDEV_PLMREQ_START_CMD, 1397 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1398 WMI_TAG_THERMAL_MGMT_CMD, 1399 WMI_TAG_THERMAL_MGMT_EVENT, 1400 WMI_TAG_PEER_INFO_REQ_CMD, 1401 WMI_TAG_PEER_INFO_EVENT, 1402 WMI_TAG_PEER_INFO, 1403 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1404 WMI_TAG_RMC_SET_MODE_CMD, 1405 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1406 WMI_TAG_RMC_CONFIG_CMD, 1407 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1408 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1409 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1410 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1411 WMI_TAG_NAN_CMD_PARAM, 1412 WMI_TAG_NAN_EVENT_HDR, 1413 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1414 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1415 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1416 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1417 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1418 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1419 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1420 WMI_TAG_ROAM_SCAN_CMD, 1421 WMI_TAG_REQ_STATS_EXT_CMD, 1422 WMI_TAG_STATS_EXT_EVENT, 1423 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1424 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1425 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1426 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1427 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1428 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1429 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1430 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1431 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1432 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1433 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1434 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1435 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1436 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1437 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1438 WMI_TAG_START_LINK_STATS_CMD, 1439 WMI_TAG_CLEAR_LINK_STATS_CMD, 1440 WMI_TAG_REQUEST_LINK_STATS_CMD, 1441 WMI_TAG_IFACE_LINK_STATS_EVENT, 1442 WMI_TAG_RADIO_LINK_STATS_EVENT, 1443 WMI_TAG_PEER_STATS_EVENT, 1444 WMI_TAG_CHANNEL_STATS, 1445 WMI_TAG_RADIO_LINK_STATS, 1446 WMI_TAG_RATE_STATS, 1447 WMI_TAG_PEER_LINK_STATS, 1448 WMI_TAG_WMM_AC_STATS, 1449 WMI_TAG_IFACE_LINK_STATS, 1450 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1451 WMI_TAG_LPI_START_SCAN_CMD, 1452 WMI_TAG_LPI_STOP_SCAN_CMD, 1453 WMI_TAG_LPI_RESULT_EVENT, 1454 WMI_TAG_PEER_STATE_EVENT, 1455 WMI_TAG_EXTSCAN_BUCKET_CMD, 1456 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1457 WMI_TAG_EXTSCAN_START_CMD, 1458 WMI_TAG_EXTSCAN_STOP_CMD, 1459 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1460 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1461 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1462 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1463 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1464 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1465 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1466 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1467 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1468 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1469 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1470 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1471 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1472 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1473 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1474 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1475 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1476 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1477 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1478 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1479 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1480 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1481 WMI_TAG_UNIT_TEST_CMD, 1482 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1483 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1484 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1485 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1486 WMI_TAG_ROAM_SYNCH_EVENT, 1487 WMI_TAG_ROAM_SYNCH_COMPLETE, 1488 WMI_TAG_EXTWOW_ENABLE_CMD, 1489 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1490 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1491 WMI_TAG_LPI_STATUS_EVENT, 1492 WMI_TAG_LPI_HANDOFF_EVENT, 1493 WMI_TAG_VDEV_RATE_STATS_EVENT, 1494 WMI_TAG_VDEV_RATE_HT_INFO, 1495 WMI_TAG_RIC_REQUEST, 1496 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1497 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1498 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1499 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1500 WMI_TAG_RIC_TSPEC, 1501 WMI_TAG_TPC_CHAINMASK_CONFIG, 1502 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1503 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1504 WMI_TAG_KEY_MATERIAL, 1505 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1506 WMI_TAG_SET_LED_FLASHING_CMD, 1507 WMI_TAG_MDNS_OFFLOAD_CMD, 1508 WMI_TAG_MDNS_SET_FQDN_CMD, 1509 WMI_TAG_MDNS_SET_RESP_CMD, 1510 WMI_TAG_MDNS_GET_STATS_CMD, 1511 WMI_TAG_MDNS_STATS_EVENT, 1512 WMI_TAG_ROAM_INVOKE_CMD, 1513 WMI_TAG_PDEV_RESUME_EVENT, 1514 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1515 WMI_TAG_SAP_OFL_ENABLE_CMD, 1516 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1517 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1518 WMI_TAG_APFIND_CMD_PARAM, 1519 WMI_TAG_APFIND_EVENT_HDR, 1520 WMI_TAG_OCB_SET_SCHED_CMD, 1521 WMI_TAG_OCB_SET_SCHED_EVENT, 1522 WMI_TAG_OCB_SET_CONFIG_CMD, 1523 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1524 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1525 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1526 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1527 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1528 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1529 WMI_TAG_DCC_GET_STATS_CMD, 1530 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1531 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1532 WMI_TAG_DCC_CLEAR_STATS_CMD, 1533 WMI_TAG_DCC_UPDATE_NDL_CMD, 1534 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1535 WMI_TAG_DCC_STATS_EVENT, 1536 WMI_TAG_OCB_CHANNEL, 1537 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1538 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1539 WMI_TAG_DCC_NDL_CHAN, 1540 WMI_TAG_QOS_PARAMETER, 1541 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1542 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1543 WMI_TAG_ROAM_FILTER, 1544 WMI_TAG_PASSPOINT_CONFIG_CMD, 1545 WMI_TAG_PASSPOINT_EVENT_HDR, 1546 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1547 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1548 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1549 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1550 WMI_TAG_GET_FW_MEM_DUMP, 1551 WMI_TAG_UPDATE_FW_MEM_DUMP, 1552 WMI_TAG_FW_MEM_DUMP_PARAMS, 1553 WMI_TAG_DEBUG_MESG_FLUSH, 1554 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1555 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1556 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1557 WMI_TAG_VDEV_SET_IE_CMD, 1558 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1559 WMI_TAG_RSSI_BREACH_EVENT, 1560 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1561 WMI_TAG_SOC_SET_PCL_CMD, 1562 WMI_TAG_SOC_SET_HW_MODE_CMD, 1563 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1564 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1565 WMI_TAG_VDEV_TXRX_STREAMS, 1566 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1567 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1568 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1569 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1570 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1571 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1572 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1573 WMI_TAG_PACKET_FILTER_CONFIG, 1574 WMI_TAG_PACKET_FILTER_ENABLE, 1575 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1576 WMI_TAG_MGMT_TX_SEND_CMD, 1577 WMI_TAG_MGMT_TX_COMPL_EVENT, 1578 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1579 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1580 WMI_TAG_LRO_INFO_CMD, 1581 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1582 WMI_TAG_SERVICE_READY_EXT_EVENT, 1583 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1584 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1585 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1586 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1587 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1588 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1589 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1590 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1591 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1592 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1593 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1594 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1595 WMI_TAG_SCPC_EVENT, 1596 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1597 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1598 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1599 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1600 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1601 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1602 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1603 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1604 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1605 WMI_TAG_PEER_DELETE_RESP_EVENT, 1606 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1607 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1608 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1609 WMI_TAG_VDEV_CONFIG_RATEMASK, 1610 WMI_TAG_PDEV_FIPS_CMD, 1611 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1612 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1613 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1614 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1615 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1616 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1617 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1618 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1619 WMI_TAG_FWTEST_SET_PARAM_CMD, 1620 WMI_TAG_PEER_ATF_REQUEST, 1621 WMI_TAG_VDEV_ATF_REQUEST, 1622 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1623 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1624 WMI_TAG_INST_RSSI_STATS_RESP, 1625 WMI_TAG_MED_UTIL_REPORT_EVENT, 1626 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1627 WMI_TAG_WDS_ADDR_EVENT, 1628 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1629 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1630 WMI_TAG_PDEV_TPC_EVENT, 1631 WMI_TAG_ANI_OFDM_EVENT, 1632 WMI_TAG_ANI_CCK_EVENT, 1633 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1634 WMI_TAG_PDEV_FIPS_EVENT, 1635 WMI_TAG_ATF_PEER_INFO, 1636 WMI_TAG_PDEV_GET_TPC_CMD, 1637 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1638 WMI_TAG_QBOOST_CFG_CMD, 1639 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1640 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1641 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1642 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1643 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1644 WMI_TAG_PEER_MCS_RATE_INFO, 1645 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1646 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1647 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1648 WMI_TAG_MU_REPORT_TOTAL_MU, 1649 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1650 WMI_TAG_ROAM_SET_MBO, 1651 WMI_TAG_MIB_STATS_ENABLE_CMD, 1652 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1653 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1654 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1655 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1656 WMI_TAG_NDI_GET_CAP_REQ, 1657 WMI_TAG_NDP_INITIATOR_REQ, 1658 WMI_TAG_NDP_RESPONDER_REQ, 1659 WMI_TAG_NDP_END_REQ, 1660 WMI_TAG_NDI_CAP_RSP_EVENT, 1661 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1662 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1663 WMI_TAG_NDP_END_RSP_EVENT, 1664 WMI_TAG_NDP_INDICATION_EVENT, 1665 WMI_TAG_NDP_CONFIRM_EVENT, 1666 WMI_TAG_NDP_END_INDICATION_EVENT, 1667 WMI_TAG_VDEV_SET_QUIET_CMD, 1668 WMI_TAG_PDEV_SET_PCL_CMD, 1669 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1670 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1671 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1672 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1673 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1674 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1675 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1676 WMI_TAG_COEX_CONFIG_CMD, 1677 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1678 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1679 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1680 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1681 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1682 WMI_TAG_MAC_PHY_CAPABILITIES, 1683 WMI_TAG_HW_MODE_CAPABILITIES, 1684 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1685 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1686 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1687 WMI_TAG_VDEV_WISA_CMD, 1688 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1689 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1690 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1691 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1692 WMI_TAG_NDP_END_RSP_PER_NDI, 1693 WMI_TAG_PEER_BWF_REQUEST, 1694 WMI_TAG_BWF_PEER_INFO, 1695 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1696 WMI_TAG_RMC_SET_LEADER_CMD, 1697 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1698 WMI_TAG_PER_CHAIN_RSSI_STATS, 1699 WMI_TAG_RSSI_STATS, 1700 WMI_TAG_P2P_LO_START_CMD, 1701 WMI_TAG_P2P_LO_STOP_CMD, 1702 WMI_TAG_P2P_LO_STOPPED_EVENT, 1703 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1704 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1705 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1706 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1707 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1708 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1709 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1710 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1711 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1712 WMI_TAG_TLV_BUF_LEN_PARAM, 1713 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1714 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1715 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1716 WMI_TAG_PEER_ANTDIV_INFO, 1717 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1718 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1719 WMI_TAG_MNT_FILTER_CMD, 1720 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1721 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1722 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1723 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1724 WMI_TAG_CHAN_CCA_STATS, 1725 WMI_TAG_PEER_SIGNAL_STATS, 1726 WMI_TAG_TX_STATS, 1727 WMI_TAG_PEER_AC_TX_STATS, 1728 WMI_TAG_RX_STATS, 1729 WMI_TAG_PEER_AC_RX_STATS, 1730 WMI_TAG_REPORT_STATS_EVENT, 1731 WMI_TAG_CHAN_CCA_STATS_THRESH, 1732 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1733 WMI_TAG_TX_STATS_THRESH, 1734 WMI_TAG_RX_STATS_THRESH, 1735 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1736 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1737 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1738 WMI_TAG_RX_AGGR_FAILURE_INFO, 1739 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1740 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1741 WMI_TAG_PDEV_BAND_TO_MAC, 1742 WMI_TAG_TBTT_OFFSET_INFO, 1743 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1744 WMI_TAG_SAR_LIMITS_CMD, 1745 WMI_TAG_SAR_LIMIT_CMD_ROW, 1746 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1747 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1748 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1749 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1750 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1751 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1752 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1753 WMI_TAG_VENDOR_OUI, 1754 WMI_TAG_REQUEST_RCPI_CMD, 1755 WMI_TAG_UPDATE_RCPI_EVENT, 1756 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1757 WMI_TAG_PEER_STATS_INFO, 1758 WMI_TAG_PEER_STATS_INFO_EVENT, 1759 WMI_TAG_PKGID_EVENT, 1760 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1761 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1762 WMI_TAG_REGULATORY_RULE_STRUCT, 1763 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1764 WMI_TAG_11D_SCAN_START_CMD, 1765 WMI_TAG_11D_SCAN_STOP_CMD, 1766 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1767 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1768 WMI_TAG_RADIO_CHAN_STATS, 1769 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1770 WMI_TAG_ROAM_PER_CONFIG, 1771 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1772 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1773 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1774 WMI_TAG_HW_DATA_FILTER_CMD, 1775 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1776 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1777 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1778 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1779 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1780 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1781 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1782 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1783 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1784 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1785 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1786 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1787 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1788 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1789 WMI_TAG_IFACE_OFFLOAD_STATS, 1790 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1791 WMI_TAG_RSSI_CTL_EXT, 1792 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1793 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1794 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1795 WMI_TAG_VDEV_TX_POWER_EVENT, 1796 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1797 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1798 WMI_TAG_TX_SEND_PARAMS, 1799 WMI_TAG_HE_RATE_SET, 1800 WMI_TAG_CONGESTION_STATS, 1801 WMI_TAG_SET_INIT_COUNTRY_CMD, 1802 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1803 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1804 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1805 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1806 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1807 WMI_TAG_THERM_THROT_STATS_EVENT, 1808 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1809 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1810 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1811 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1812 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1813 WMI_TAG_OEM_INDIRECT_DATA, 1814 WMI_TAG_OEM_DMA_BUF_RELEASE, 1815 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1816 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1817 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1818 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1819 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1820 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1821 WMI_TAG_UNIT_TEST_EVENT, 1822 WMI_TAG_ROAM_FILS_OFFLOAD, 1823 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1824 WMI_TAG_PMK_CACHE, 1825 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1826 WMI_TAG_ROAM_FILS_SYNCH, 1827 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1828 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1829 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1830 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1831 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1832 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1833 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1834 WMI_TAG_BTM_CONFIG, 1835 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1836 WMI_TAG_WLM_CONFIG_CMD, 1837 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1838 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1839 WMI_TAG_ROAM_CND_SCORING_PARAM, 1840 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1841 WMI_TAG_VENDOR_OUI_EXT, 1842 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1843 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1844 WMI_TAG_ENABLE_FILS_CMD, 1845 WMI_TAG_HOST_SWFDA_EVENT, 1846 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1847 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1848 WMI_TAG_STATS_PERIOD, 1849 WMI_TAG_NDL_SCHEDULE_UPDATE, 1850 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1851 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1852 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1853 WMI_TAG_SAR2_RESULT_EVENT, 1854 WMI_TAG_SAR_CAPABILITIES, 1855 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1856 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1857 WMI_TAG_DMA_RING_CAPABILITIES, 1858 WMI_TAG_DMA_RING_CFG_REQ, 1859 WMI_TAG_DMA_RING_CFG_RSP, 1860 WMI_TAG_DMA_BUF_RELEASE, 1861 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1862 WMI_TAG_SAR_GET_LIMITS_CMD, 1863 WMI_TAG_SAR_GET_LIMITS_EVENT, 1864 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1865 WMI_TAG_OFFLOAD_11K_REPORT, 1866 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1867 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1868 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1869 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1870 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1871 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1872 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1873 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1874 WMI_TAG_PDEV_GET_NFCAL_POWER, 1875 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1876 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1877 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1878 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1879 WMI_TAG_TWT_ENABLE_CMD, 1880 WMI_TAG_TWT_DISABLE_CMD, 1881 WMI_TAG_TWT_ADD_DIALOG_CMD, 1882 WMI_TAG_TWT_DEL_DIALOG_CMD, 1883 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1884 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1885 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1886 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1887 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1888 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1889 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1890 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1891 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1892 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1893 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1894 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1895 WMI_TAG_GET_TPC_POWER_CMD, 1896 WMI_TAG_GET_TPC_POWER_EVENT, 1897 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1898 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1899 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1900 WMI_TAG_MOTION_DET_START_STOP_CMD, 1901 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1902 WMI_TAG_MOTION_DET_EVENT, 1903 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1904 WMI_TAG_NDP_TRANSPORT_IP, 1905 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1906 WMI_TAG_ESP_ESTIMATE_EVENT, 1907 WMI_TAG_NAN_HOST_CONFIG, 1908 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1909 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1910 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1911 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1912 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1913 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1914 WMI_TAG_PEER_EXTD2_STATS, 1915 WMI_TAG_HPCS_PULSE_START_CMD, 1916 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1917 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1918 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1919 WMI_TAG_NAN_EVENT_INFO, 1920 WMI_TAG_NDP_CHANNEL_INFO, 1921 WMI_TAG_NDP_CMD, 1922 WMI_TAG_NDP_EVENT, 1923 /* TODO add all the missing cmds */ 1924 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1925 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1926 WMI_TAG_SERVICE_READY_EXT2_EVENT = 0x334, 1927 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1928 WMI_TAG_MAC_PHY_CAPABILITIES_EXT = 0x36F, 1929 WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9, 1930 WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT, 1931 WMI_TAG_EHT_RATE_SET = 0x3C4, 1932 WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8, 1933 WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD = 0x3D9, 1934 WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD = 0x3FB, 1935 WMI_TAG_MAX 1936 }; 1937 1938 enum wmi_tlv_service { 1939 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1940 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1941 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1942 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1943 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1944 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1945 WMI_TLV_SERVICE_AP_UAPSD = 6, 1946 WMI_TLV_SERVICE_AP_DFS = 7, 1947 WMI_TLV_SERVICE_11AC = 8, 1948 WMI_TLV_SERVICE_BLOCKACK = 9, 1949 WMI_TLV_SERVICE_PHYERR = 10, 1950 WMI_TLV_SERVICE_BCN_FILTER = 11, 1951 WMI_TLV_SERVICE_RTT = 12, 1952 WMI_TLV_SERVICE_WOW = 13, 1953 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1954 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1955 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1956 WMI_TLV_SERVICE_NLO = 17, 1957 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1958 WMI_TLV_SERVICE_SCAN_SCH = 19, 1959 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1960 WMI_TLV_SERVICE_CHATTER = 21, 1961 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1962 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1963 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1964 WMI_TLV_SERVICE_GPIO = 25, 1965 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1966 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1967 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1968 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1969 WMI_TLV_SERVICE_TX_ENCAP = 30, 1970 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1971 WMI_TLV_SERVICE_EARLY_RX = 32, 1972 WMI_TLV_SERVICE_STA_SMPS = 33, 1973 WMI_TLV_SERVICE_FWTEST = 34, 1974 WMI_TLV_SERVICE_STA_WMMAC = 35, 1975 WMI_TLV_SERVICE_TDLS = 36, 1976 WMI_TLV_SERVICE_BURST = 37, 1977 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 1978 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 1979 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 1980 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 1981 WMI_TLV_SERVICE_WLAN_HB = 42, 1982 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 1983 WMI_TLV_SERVICE_BATCH_SCAN = 44, 1984 WMI_TLV_SERVICE_QPOWER = 45, 1985 WMI_TLV_SERVICE_PLMREQ = 46, 1986 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 1987 WMI_TLV_SERVICE_RMC = 48, 1988 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 1989 WMI_TLV_SERVICE_COEX_SAR = 50, 1990 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 1991 WMI_TLV_SERVICE_NAN = 52, 1992 WMI_TLV_SERVICE_L1SS_STAT = 53, 1993 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 1994 WMI_TLV_SERVICE_OBSS_SCAN = 55, 1995 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 1996 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 1997 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 1998 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 1999 WMI_TLV_SERVICE_LPASS = 60, 2000 WMI_TLV_SERVICE_EXTSCAN = 61, 2001 WMI_TLV_SERVICE_D0WOW = 62, 2002 WMI_TLV_SERVICE_HSOFFLOAD = 63, 2003 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 2004 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 2005 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 2006 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 2007 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 2008 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 2009 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 2010 WMI_TLV_SERVICE_OCB = 71, 2011 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 2012 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 2013 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 2014 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 2015 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 2016 WMI_TLV_SERVICE_EXT_MSG = 77, 2017 WMI_TLV_SERVICE_MAWC = 78, 2018 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 2019 WMI_TLV_SERVICE_EGAP = 80, 2020 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 2021 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 2022 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 2023 WMI_TLV_SERVICE_ATF = 84, 2024 WMI_TLV_SERVICE_COEX_GPIO = 85, 2025 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 2026 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 2027 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 2028 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 2029 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 2030 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 2031 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 2032 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 2033 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 2034 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 2035 WMI_TLV_SERVICE_NAN_DATA = 96, 2036 WMI_TLV_SERVICE_NAN_RTT = 97, 2037 WMI_TLV_SERVICE_11AX = 98, 2038 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 2039 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 2040 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 2041 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 2042 WMI_TLV_SERVICE_MESH_11S = 103, 2043 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 2044 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 2045 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 2046 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 2047 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 2048 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 2049 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 2050 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 2051 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 2052 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 2053 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 2054 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 2055 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 2056 WMI_TLV_SERVICE_REGULATORY_DB = 117, 2057 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 2058 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 2059 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 2060 WMI_TLV_SERVICE_PKT_ROUTING = 121, 2061 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 2062 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 2063 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 2064 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 2065 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 2066 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 2067 2068 WMI_MAX_SERVICE = 128, 2069 2070 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 2071 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 2072 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 2073 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 2074 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 2075 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 2076 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2077 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2078 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2079 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2080 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2081 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2082 WMI_TLV_SERVICE_THERM_THROT = 140, 2083 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2084 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2085 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2086 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2087 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2088 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2089 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2090 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2091 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2092 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2093 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2094 WMI_TLV_SERVICE_STA_TWT = 152, 2095 WMI_TLV_SERVICE_AP_TWT = 153, 2096 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2097 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2098 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2099 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2100 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2101 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2102 WMI_TLV_SERVICE_MOTION_DET = 160, 2103 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2104 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2105 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2106 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2107 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2108 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2109 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2110 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2111 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2112 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2113 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2114 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2115 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2116 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2117 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2118 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2119 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2120 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2121 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2122 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2123 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2124 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2125 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2126 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2127 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2128 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2129 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2130 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2131 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2132 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2133 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2134 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2135 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2136 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2137 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2138 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2139 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2140 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2141 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2142 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2143 WMI_TLV_SERVICE_PS_TDCC = 201, 2144 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2145 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2146 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2147 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2148 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2149 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2150 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2151 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2152 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2153 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2154 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2155 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2156 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2157 WMI_TLV_SERVICE_EXT2_MSG = 220, 2158 WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253, 2159 2160 WMI_MAX_EXT_SERVICE = 256, 2161 2162 WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281, 2163 2164 WMI_TLV_SERVICE_11BE = 289, 2165 2166 WMI_TLV_SERVICE_WMSK_COMPACTION_RX_TLVS = 361, 2167 2168 WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT = 365, 2169 2170 WMI_MAX_EXT2_SERVICE, 2171 }; 2172 2173 enum { 2174 WMI_SMPS_FORCED_MODE_NONE = 0, 2175 WMI_SMPS_FORCED_MODE_DISABLED, 2176 WMI_SMPS_FORCED_MODE_STATIC, 2177 WMI_SMPS_FORCED_MODE_DYNAMIC 2178 }; 2179 2180 enum wmi_tpc_chainmask { 2181 WMI_TPC_CHAINMASK_CONFIG_BAND_2G = 0, 2182 WMI_TPC_CHAINMASK_CONFIG_BAND_5G = 1, 2183 WMI_NUM_SUPPORTED_BAND_MAX = 2, 2184 }; 2185 2186 enum wmi_peer_param { 2187 WMI_PEER_MIMO_PS_STATE = 1, 2188 WMI_PEER_AMPDU = 2, 2189 WMI_PEER_AUTHORIZE = 3, 2190 WMI_PEER_CHWIDTH = 4, 2191 WMI_PEER_NSS = 5, 2192 WMI_PEER_USE_4ADDR = 6, 2193 WMI_PEER_MEMBERSHIP = 7, 2194 WMI_PEER_USERPOS = 8, 2195 WMI_PEER_CRIT_PROTO_HINT_ENABLED = 9, 2196 WMI_PEER_TX_FAIL_CNT_THR = 10, 2197 WMI_PEER_SET_HW_RETRY_CTS2S = 11, 2198 WMI_PEER_IBSS_ATIM_WINDOW_LENGTH = 12, 2199 WMI_PEER_PHYMODE = 13, 2200 WMI_PEER_USE_FIXED_PWR = 14, 2201 WMI_PEER_PARAM_FIXED_RATE = 15, 2202 WMI_PEER_SET_MU_WHITELIST = 16, 2203 WMI_PEER_SET_MAX_TX_RATE = 17, 2204 WMI_PEER_SET_MIN_TX_RATE = 18, 2205 WMI_PEER_SET_DEFAULT_ROUTING = 19, 2206 WMI_PEER_CHWIDTH_PUNCTURE_20MHZ_BITMAP = 39, 2207 }; 2208 2209 #define WMI_PEER_PUNCTURE_BITMAP GENMASK(23, 8) 2210 2211 enum wmi_slot_time { 2212 WMI_VDEV_SLOT_TIME_LONG = 1, 2213 WMI_VDEV_SLOT_TIME_SHORT = 2, 2214 }; 2215 2216 enum wmi_preamble { 2217 WMI_VDEV_PREAMBLE_LONG = 1, 2218 WMI_VDEV_PREAMBLE_SHORT = 2, 2219 }; 2220 2221 enum wmi_peer_smps_state { 2222 WMI_PEER_SMPS_PS_NONE = 0, 2223 WMI_PEER_SMPS_STATIC = 1, 2224 WMI_PEER_SMPS_DYNAMIC = 2 2225 }; 2226 2227 enum wmi_peer_chwidth { 2228 WMI_PEER_CHWIDTH_20MHZ = 0, 2229 WMI_PEER_CHWIDTH_40MHZ = 1, 2230 WMI_PEER_CHWIDTH_80MHZ = 2, 2231 WMI_PEER_CHWIDTH_160MHZ = 3, 2232 WMI_PEER_CHWIDTH_320MHZ = 4, 2233 }; 2234 2235 enum wmi_beacon_gen_mode { 2236 WMI_BEACON_STAGGERED_MODE = 0, 2237 WMI_BEACON_BURST_MODE = 1 2238 }; 2239 2240 enum wmi_direct_buffer_module { 2241 WMI_DIRECT_BUF_SPECTRAL = 0, 2242 WMI_DIRECT_BUF_CFR = 1, 2243 2244 /* keep it last */ 2245 WMI_DIRECT_BUF_MAX 2246 }; 2247 2248 struct ath12k_wmi_pdev_band_arg { 2249 u32 pdev_id; 2250 u32 start_freq; 2251 u32 end_freq; 2252 }; 2253 2254 struct ath12k_wmi_ppe_threshold_arg { 2255 u32 numss_m1; 2256 u32 ru_bit_mask; 2257 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2258 }; 2259 2260 #define PSOC_HOST_MAX_PHY_SIZE (3) 2261 #define ATH12K_11B_SUPPORT BIT(0) 2262 #define ATH12K_11G_SUPPORT BIT(1) 2263 #define ATH12K_11A_SUPPORT BIT(2) 2264 #define ATH12K_11N_SUPPORT BIT(3) 2265 #define ATH12K_11AC_SUPPORT BIT(4) 2266 #define ATH12K_11AX_SUPPORT BIT(5) 2267 2268 struct ath12k_wmi_hal_reg_capabilities_ext_arg { 2269 u32 phy_id; 2270 u32 eeprom_reg_domain; 2271 u32 eeprom_reg_domain_ext; 2272 u32 regcap1; 2273 u32 regcap2; 2274 u32 wireless_modes; 2275 u32 low_2ghz_chan; 2276 u32 high_2ghz_chan; 2277 u32 low_5ghz_chan; 2278 u32 high_5ghz_chan; 2279 }; 2280 2281 #define WMI_HOST_MAX_PDEV 3 2282 2283 struct ath12k_wmi_host_mem_chunk_params { 2284 __le32 tlv_header; 2285 __le32 req_id; 2286 __le32 ptr; 2287 __le32 size; 2288 } __packed; 2289 2290 struct ath12k_wmi_host_mem_chunk_arg { 2291 void *vaddr; 2292 dma_addr_t paddr; 2293 u32 len; 2294 u32 req_id; 2295 }; 2296 2297 enum ath12k_peer_metadata_version { 2298 ATH12K_PEER_METADATA_V0, 2299 ATH12K_PEER_METADATA_V1, 2300 ATH12K_PEER_METADATA_V1A, 2301 ATH12K_PEER_METADATA_V1B 2302 }; 2303 2304 struct ath12k_wmi_resource_config_arg { 2305 u32 num_vdevs; 2306 u32 num_peers; 2307 u32 num_active_peers; 2308 u32 num_offload_peers; 2309 u32 num_offload_reorder_buffs; 2310 u32 num_peer_keys; 2311 u32 num_tids; 2312 u32 ast_skid_limit; 2313 u32 tx_chain_mask; 2314 u32 rx_chain_mask; 2315 u32 rx_timeout_pri[4]; 2316 u32 rx_decap_mode; 2317 u32 scan_max_pending_req; 2318 u32 bmiss_offload_max_vdev; 2319 u32 roam_offload_max_vdev; 2320 u32 roam_offload_max_ap_profiles; 2321 u32 num_mcast_groups; 2322 u32 num_mcast_table_elems; 2323 u32 mcast2ucast_mode; 2324 u32 tx_dbg_log_size; 2325 u32 num_wds_entries; 2326 u32 dma_burst_size; 2327 u32 mac_aggr_delim; 2328 u32 rx_skip_defrag_timeout_dup_detection_check; 2329 u32 vow_config; 2330 u32 gtk_offload_max_vdev; 2331 u32 num_msdu_desc; 2332 u32 max_frag_entries; 2333 u32 max_peer_ext_stats; 2334 u32 smart_ant_cap; 2335 u32 bk_minfree; 2336 u32 be_minfree; 2337 u32 vi_minfree; 2338 u32 vo_minfree; 2339 u32 rx_batchmode; 2340 u32 tt_support; 2341 u32 atf_config; 2342 u32 iphdr_pad_config; 2343 u32 qwrap_config:16, 2344 alloc_frag_desc_for_data_pkt:16; 2345 u32 num_tdls_vdevs; 2346 u32 num_tdls_conn_table_entries; 2347 u32 beacon_tx_offload_max_vdev; 2348 u32 num_multicast_filter_entries; 2349 u32 num_wow_filters; 2350 u32 num_keep_alive_pattern; 2351 u32 keep_alive_pattern_size; 2352 u32 max_tdls_concurrent_sleep_sta; 2353 u32 max_tdls_concurrent_buffer_sta; 2354 u32 wmi_send_separate; 2355 u32 num_ocb_vdevs; 2356 u32 num_ocb_channels; 2357 u32 num_ocb_schedules; 2358 u32 num_ns_ext_tuples_cfg; 2359 u32 bpf_instruction_size; 2360 u32 max_bssid_rx_filters; 2361 u32 use_pdev_id; 2362 u32 peer_map_unmap_version; 2363 u32 sched_params; 2364 u32 twt_ap_pdev_count; 2365 u32 twt_ap_sta_count; 2366 enum ath12k_peer_metadata_version peer_metadata_ver; 2367 u32 ema_max_vap_cnt; 2368 u32 ema_max_profile_period; 2369 bool is_reg_cc_ext_event_supported; 2370 }; 2371 2372 struct ath12k_wmi_init_cmd_arg { 2373 struct ath12k_wmi_resource_config_arg res_cfg; 2374 u8 num_mem_chunks; 2375 struct ath12k_wmi_host_mem_chunk_arg *mem_chunks; 2376 u32 hw_mode_id; 2377 u32 num_band_to_mac; 2378 struct ath12k_wmi_pdev_band_arg band_to_mac[WMI_HOST_MAX_PDEV]; 2379 }; 2380 2381 struct ath12k_wmi_pdev_band_to_mac_params { 2382 __le32 tlv_header; 2383 __le32 pdev_id; 2384 __le32 start_freq; 2385 __le32 end_freq; 2386 } __packed; 2387 2388 /* This is both individual command WMI_PDEV_SET_HW_MODE_CMDID and also part 2389 * of WMI_TAG_INIT_CMD. 2390 */ 2391 struct ath12k_wmi_pdev_set_hw_mode_cmd { 2392 __le32 tlv_header; 2393 __le32 pdev_id; 2394 __le32 hw_mode_index; 2395 __le32 num_band_to_mac; 2396 } __packed; 2397 2398 struct ath12k_wmi_ppe_threshold_params { 2399 __le32 numss_m1; /** NSS - 1*/ 2400 __le32 ru_info; 2401 __le32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2402 } __packed; 2403 2404 #define HW_BD_INFO_SIZE 5 2405 2406 struct ath12k_wmi_abi_version_params { 2407 __le32 abi_version_0; 2408 __le32 abi_version_1; 2409 __le32 abi_version_ns_0; 2410 __le32 abi_version_ns_1; 2411 __le32 abi_version_ns_2; 2412 __le32 abi_version_ns_3; 2413 } __packed; 2414 2415 struct wmi_init_cmd { 2416 __le32 tlv_header; 2417 struct ath12k_wmi_abi_version_params host_abi_vers; 2418 __le32 num_host_mem_chunks; 2419 } __packed; 2420 2421 #define WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT 4 2422 #define WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION GENMASK(5, 4) 2423 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2424 #define WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET BIT(9) 2425 2426 struct ath12k_wmi_resource_config_params { 2427 __le32 tlv_header; 2428 __le32 num_vdevs; 2429 __le32 num_peers; 2430 __le32 num_offload_peers; 2431 __le32 num_offload_reorder_buffs; 2432 __le32 num_peer_keys; 2433 __le32 num_tids; 2434 __le32 ast_skid_limit; 2435 __le32 tx_chain_mask; 2436 __le32 rx_chain_mask; 2437 __le32 rx_timeout_pri[4]; 2438 __le32 rx_decap_mode; 2439 __le32 scan_max_pending_req; 2440 __le32 bmiss_offload_max_vdev; 2441 __le32 roam_offload_max_vdev; 2442 __le32 roam_offload_max_ap_profiles; 2443 __le32 num_mcast_groups; 2444 __le32 num_mcast_table_elems; 2445 __le32 mcast2ucast_mode; 2446 __le32 tx_dbg_log_size; 2447 __le32 num_wds_entries; 2448 __le32 dma_burst_size; 2449 __le32 mac_aggr_delim; 2450 __le32 rx_skip_defrag_timeout_dup_detection_check; 2451 __le32 vow_config; 2452 __le32 gtk_offload_max_vdev; 2453 __le32 num_msdu_desc; 2454 __le32 max_frag_entries; 2455 __le32 num_tdls_vdevs; 2456 __le32 num_tdls_conn_table_entries; 2457 __le32 beacon_tx_offload_max_vdev; 2458 __le32 num_multicast_filter_entries; 2459 __le32 num_wow_filters; 2460 __le32 num_keep_alive_pattern; 2461 __le32 keep_alive_pattern_size; 2462 __le32 max_tdls_concurrent_sleep_sta; 2463 __le32 max_tdls_concurrent_buffer_sta; 2464 __le32 wmi_send_separate; 2465 __le32 num_ocb_vdevs; 2466 __le32 num_ocb_channels; 2467 __le32 num_ocb_schedules; 2468 __le32 flag1; 2469 __le32 smart_ant_cap; 2470 __le32 bk_minfree; 2471 __le32 be_minfree; 2472 __le32 vi_minfree; 2473 __le32 vo_minfree; 2474 __le32 alloc_frag_desc_for_data_pkt; 2475 __le32 num_ns_ext_tuples_cfg; 2476 __le32 bpf_instruction_size; 2477 __le32 max_bssid_rx_filters; 2478 __le32 use_pdev_id; 2479 __le32 max_num_dbs_scan_duty_cycle; 2480 __le32 max_num_group_keys; 2481 __le32 peer_map_unmap_version; 2482 __le32 sched_params; 2483 __le32 twt_ap_pdev_count; 2484 __le32 twt_ap_sta_count; 2485 __le32 max_nlo_ssids; 2486 __le32 num_pkt_filters; 2487 __le32 num_max_sta_vdevs; 2488 __le32 max_bssid_indicator; 2489 __le32 ul_resp_config; 2490 __le32 msdu_flow_override_config0; 2491 __le32 msdu_flow_override_config1; 2492 __le32 flags2; 2493 __le32 host_service_flags; 2494 __le32 max_rnr_neighbours; 2495 __le32 ema_max_vap_cnt; 2496 __le32 ema_max_profile_period; 2497 } __packed; 2498 2499 struct wmi_service_ready_event { 2500 __le32 fw_build_vers; 2501 struct ath12k_wmi_abi_version_params fw_abi_vers; 2502 __le32 phy_capability; 2503 __le32 max_frag_entry; 2504 __le32 num_rf_chains; 2505 __le32 ht_cap_info; 2506 __le32 vht_cap_info; 2507 __le32 vht_supp_mcs; 2508 __le32 hw_min_tx_power; 2509 __le32 hw_max_tx_power; 2510 __le32 sys_cap_info; 2511 __le32 min_pkt_size_enable; 2512 __le32 max_bcn_ie_size; 2513 __le32 num_mem_reqs; 2514 __le32 max_num_scan_channels; 2515 __le32 hw_bd_id; 2516 __le32 hw_bd_info[HW_BD_INFO_SIZE]; 2517 __le32 max_supported_macs; 2518 __le32 wmi_fw_sub_feat_caps; 2519 __le32 num_dbs_hw_modes; 2520 /* txrx_chainmask 2521 * [7:0] - 2G band tx chain mask 2522 * [15:8] - 2G band rx chain mask 2523 * [23:16] - 5G band tx chain mask 2524 * [31:24] - 5G band rx chain mask 2525 */ 2526 __le32 txrx_chainmask; 2527 __le32 default_dbs_hw_mode_index; 2528 __le32 num_msdu_desc; 2529 } __packed; 2530 2531 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2532 2533 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2534 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2535 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2536 #define WMI_SERVICE_BITS_IN_SIZE32 4 2537 2538 struct wmi_service_ready_ext_event { 2539 __le32 default_conc_scan_config_bits; 2540 __le32 default_fw_config_bits; 2541 struct ath12k_wmi_ppe_threshold_params ppet; 2542 __le32 he_cap_info; 2543 __le32 mpdu_density; 2544 __le32 max_bssid_rx_filters; 2545 __le32 fw_build_vers_ext; 2546 __le32 max_nlo_ssids; 2547 __le32 max_bssid_indicator; 2548 __le32 he_cap_info_ext; 2549 } __packed; 2550 2551 struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params { 2552 __le32 num_hw_modes; 2553 __le32 num_chainmask_tables; 2554 } __packed; 2555 2556 struct ath12k_wmi_hw_mode_cap_params { 2557 __le32 tlv_header; 2558 __le32 hw_mode_id; 2559 __le32 phy_id_map; 2560 __le32 hw_mode_config_type; 2561 } __packed; 2562 2563 #define WMI_MAX_HECAP_PHY_SIZE (3) 2564 2565 /* pdev_id is present in lower 16 bits of pdev_and_hw_link_ids in 2566 * ath12k_wmi_mac_phy_caps_params & ath12k_wmi_caps_ext_params. 2567 * 2568 * hw_link_id is present in higher 16 bits of pdev_and_hw_link_ids. 2569 */ 2570 #define WMI_CAPS_PARAMS_PDEV_ID GENMASK(15, 0) 2571 #define WMI_CAPS_PARAMS_HW_LINK_ID GENMASK(31, 16) 2572 2573 struct ath12k_wmi_mac_phy_caps_params { 2574 __le32 hw_mode_id; 2575 __le32 pdev_and_hw_link_ids; 2576 __le32 phy_id; 2577 __le32 supported_flags; 2578 __le32 supported_bands; 2579 __le32 ampdu_density; 2580 __le32 max_bw_supported_2g; 2581 __le32 ht_cap_info_2g; 2582 __le32 vht_cap_info_2g; 2583 __le32 vht_supp_mcs_2g; 2584 __le32 he_cap_info_2g; 2585 __le32 he_supp_mcs_2g; 2586 __le32 tx_chain_mask_2g; 2587 __le32 rx_chain_mask_2g; 2588 __le32 max_bw_supported_5g; 2589 __le32 ht_cap_info_5g; 2590 __le32 vht_cap_info_5g; 2591 __le32 vht_supp_mcs_5g; 2592 __le32 he_cap_info_5g; 2593 __le32 he_supp_mcs_5g; 2594 __le32 tx_chain_mask_5g; 2595 __le32 rx_chain_mask_5g; 2596 __le32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2597 __le32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2598 struct ath12k_wmi_ppe_threshold_params he_ppet2g; 2599 struct ath12k_wmi_ppe_threshold_params he_ppet5g; 2600 __le32 chainmask_table_id; 2601 __le32 lmac_id; 2602 __le32 he_cap_info_2g_ext; 2603 __le32 he_cap_info_5g_ext; 2604 __le32 he_cap_info_internal; 2605 } __packed; 2606 2607 struct ath12k_wmi_hal_reg_caps_ext_params { 2608 __le32 tlv_header; 2609 __le32 phy_id; 2610 __le32 eeprom_reg_domain; 2611 __le32 eeprom_reg_domain_ext; 2612 __le32 regcap1; 2613 __le32 regcap2; 2614 __le32 wireless_modes; 2615 __le32 low_2ghz_chan; 2616 __le32 high_2ghz_chan; 2617 __le32 low_5ghz_chan; 2618 __le32 high_5ghz_chan; 2619 } __packed; 2620 2621 struct ath12k_wmi_soc_hal_reg_caps_params { 2622 __le32 num_phy; 2623 } __packed; 2624 2625 enum wmi_channel_width { 2626 WMI_CHAN_WIDTH_20 = 0, 2627 WMI_CHAN_WIDTH_40 = 1, 2628 WMI_CHAN_WIDTH_80 = 2, 2629 WMI_CHAN_WIDTH_160 = 3, 2630 WMI_CHAN_WIDTH_80P80 = 4, 2631 WMI_CHAN_WIDTH_5 = 5, 2632 WMI_CHAN_WIDTH_10 = 6, 2633 WMI_CHAN_WIDTH_165 = 7, 2634 WMI_CHAN_WIDTH_160P160 = 8, 2635 WMI_CHAN_WIDTH_320 = 9, 2636 }; 2637 2638 #define WMI_MAX_EHTCAP_MAC_SIZE 2 2639 #define WMI_MAX_EHTCAP_PHY_SIZE 3 2640 #define WMI_MAX_EHTCAP_RATE_SET 3 2641 2642 /* Used for EHT MCS-NSS array. Data at each array index follows the format given 2643 * in IEEE P802.11be/D2.0, May 20229.4.2.313.4. 2644 * 2645 * Index interpretation: 2646 * 0 - 20 MHz only sta, all 4 bytes valid 2647 * 1 - index for bandwidths <= 80 MHz except 20 MHz-only, first 3 bytes valid 2648 * 2 - index for 160 MHz, first 3 bytes valid 2649 * 3 - index for 320 MHz, first 3 bytes valid 2650 */ 2651 #define WMI_MAX_EHT_SUPP_MCS_2G_SIZE 2 2652 #define WMI_MAX_EHT_SUPP_MCS_5G_SIZE 4 2653 2654 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_80 0 2655 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_160 1 2656 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_320 2 2657 2658 #define WMI_EHT_MCS_NSS_0_7 GENMASK(3, 0) 2659 #define WMI_EHT_MCS_NSS_8_9 GENMASK(7, 4) 2660 #define WMI_EHT_MCS_NSS_10_11 GENMASK(11, 8) 2661 #define WMI_EHT_MCS_NSS_12_13 GENMASK(15, 12) 2662 2663 struct wmi_service_ready_ext2_event { 2664 __le32 reg_db_version; 2665 __le32 hw_min_max_tx_power_2ghz; 2666 __le32 hw_min_max_tx_power_5ghz; 2667 __le32 chwidth_num_peer_caps; 2668 __le32 preamble_puncture_bw; 2669 __le32 max_user_per_ppdu_ofdma; 2670 __le32 max_user_per_ppdu_mumimo; 2671 __le32 target_cap_flags; 2672 __le32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 2673 __le32 max_num_linkview_peers; 2674 __le32 max_num_msduq_supported_per_tid; 2675 __le32 default_num_msduq_supported_per_tid; 2676 } __packed; 2677 2678 struct ath12k_wmi_caps_ext_params { 2679 __le32 hw_mode_id; 2680 __le32 pdev_and_hw_link_ids; 2681 __le32 phy_id; 2682 __le32 wireless_modes_ext; 2683 __le32 eht_cap_mac_info_2ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2684 __le32 eht_cap_mac_info_5ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2685 __le32 rsvd0[2]; 2686 __le32 eht_cap_phy_info_2ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2687 __le32 eht_cap_phy_info_5ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2688 struct ath12k_wmi_ppe_threshold_params eht_ppet_2ghz; 2689 struct ath12k_wmi_ppe_threshold_params eht_ppet_5ghz; 2690 __le32 eht_cap_info_internal; 2691 __le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2G_SIZE]; 2692 __le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5G_SIZE]; 2693 } __packed; 2694 2695 /* 2 word representation of MAC addr */ 2696 struct ath12k_wmi_mac_addr_params { 2697 u8 addr[ETH_ALEN]; 2698 u8 padding[2]; 2699 } __packed; 2700 2701 struct ath12k_wmi_dma_ring_caps_params { 2702 __le32 tlv_header; 2703 __le32 pdev_id; 2704 __le32 module_id; 2705 __le32 min_elem; 2706 __le32 min_buf_sz; 2707 __le32 min_buf_align; 2708 } __packed; 2709 2710 struct ath12k_wmi_ready_event_min_params { 2711 struct ath12k_wmi_abi_version_params fw_abi_vers; 2712 struct ath12k_wmi_mac_addr_params mac_addr; 2713 __le32 status; 2714 __le32 num_dscp_table; 2715 __le32 num_extra_mac_addr; 2716 __le32 num_total_peers; 2717 __le32 num_extra_peers; 2718 } __packed; 2719 2720 struct wmi_ready_event { 2721 struct ath12k_wmi_ready_event_min_params ready_event_min; 2722 __le32 max_ast_index; 2723 __le32 pktlog_defs_checksum; 2724 } __packed; 2725 2726 struct wmi_service_available_event { 2727 __le32 wmi_service_segment_offset; 2728 __le32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2729 } __packed; 2730 2731 struct ath12k_wmi_vdev_create_arg { 2732 u8 if_id; 2733 u32 type; 2734 u32 subtype; 2735 struct { 2736 u8 tx; 2737 u8 rx; 2738 } chains[NUM_NL80211_BANDS]; 2739 u32 pdev_id; 2740 u8 if_stats_id; 2741 u32 mbssid_flags; 2742 u32 mbssid_tx_vdev_id; 2743 }; 2744 2745 #define ATH12K_MAX_VDEV_STATS_ID 0x30 2746 #define ATH12K_INVAL_VDEV_STATS_ID 0xFF 2747 2748 struct wmi_vdev_create_cmd { 2749 __le32 tlv_header; 2750 __le32 vdev_id; 2751 __le32 vdev_type; 2752 __le32 vdev_subtype; 2753 struct ath12k_wmi_mac_addr_params vdev_macaddr; 2754 __le32 num_cfg_txrx_streams; 2755 __le32 pdev_id; 2756 __le32 mbssid_flags; 2757 __le32 mbssid_tx_vdev_id; 2758 __le32 vdev_stats_id_valid; 2759 __le32 vdev_stats_id; 2760 } __packed; 2761 2762 struct ath12k_wmi_vdev_txrx_streams_params { 2763 __le32 tlv_header; 2764 __le32 band; 2765 __le32 supported_tx_streams; 2766 __le32 supported_rx_streams; 2767 } __packed; 2768 2769 struct wmi_vdev_delete_cmd { 2770 __le32 tlv_header; 2771 __le32 vdev_id; 2772 } __packed; 2773 2774 struct ath12k_wmi_vdev_up_params { 2775 u32 vdev_id; 2776 u32 aid; 2777 const u8 *bssid; 2778 const u8 *tx_bssid; 2779 u32 nontx_profile_idx; 2780 u32 nontx_profile_cnt; 2781 }; 2782 2783 struct wmi_vdev_up_cmd { 2784 __le32 tlv_header; 2785 __le32 vdev_id; 2786 __le32 vdev_assoc_id; 2787 struct ath12k_wmi_mac_addr_params vdev_bssid; 2788 struct ath12k_wmi_mac_addr_params tx_vdev_bssid; 2789 __le32 nontx_profile_idx; 2790 __le32 nontx_profile_cnt; 2791 } __packed; 2792 2793 struct wmi_vdev_stop_cmd { 2794 __le32 tlv_header; 2795 __le32 vdev_id; 2796 } __packed; 2797 2798 struct wmi_vdev_down_cmd { 2799 __le32 tlv_header; 2800 __le32 vdev_id; 2801 } __packed; 2802 2803 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2804 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2805 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2806 2807 #define ATH12K_WMI_SSID_LEN 32 2808 2809 struct ath12k_wmi_ssid_params { 2810 __le32 ssid_len; 2811 u8 ssid[ATH12K_WMI_SSID_LEN]; 2812 } __packed; 2813 2814 #define ATH12K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 2815 2816 enum wmi_vdev_mbssid_flags { 2817 WMI_VDEV_MBSSID_FLAGS_NON_MBSSID_AP = BIT(0), 2818 WMI_VDEV_MBSSID_FLAGS_TRANSMIT_AP = BIT(1), 2819 WMI_VDEV_MBSSID_FLAGS_NON_TRANSMIT_AP = BIT(2), 2820 WMI_VDEV_MBSSID_FLAGS_EMA_MODE = BIT(3), 2821 WMI_VDEV_MBSSID_FLAGS_SCAN_MODE_VAP = BIT(4), 2822 }; 2823 2824 struct wmi_vdev_start_request_cmd { 2825 __le32 tlv_header; 2826 __le32 vdev_id; 2827 __le32 requestor_id; 2828 __le32 beacon_interval; 2829 __le32 dtim_period; 2830 __le32 flags; 2831 struct ath12k_wmi_ssid_params ssid; 2832 __le32 bcn_tx_rate; 2833 __le32 bcn_txpower; 2834 __le32 num_noa_descriptors; 2835 __le32 disable_hw_ack; 2836 __le32 preferred_tx_streams; 2837 __le32 preferred_rx_streams; 2838 __le32 he_ops; 2839 __le32 cac_duration_ms; 2840 __le32 regdomain; 2841 __le32 min_data_rate; 2842 __le32 mbssid_flags; /* uses enum wmi_vdev_mbssid_flags */ 2843 __le32 mbssid_tx_vdev_id; 2844 __le32 eht_ops; 2845 __le32 punct_bitmap; 2846 } __packed; 2847 2848 #define MGMT_TX_DL_FRM_LEN 64 2849 2850 struct ath12k_wmi_channel_arg { 2851 u8 chan_id; 2852 u8 pwr; 2853 u32 mhz; 2854 u32 half_rate:1, 2855 quarter_rate:1, 2856 dfs_set:1, 2857 dfs_set_cfreq2:1, 2858 is_chan_passive:1, 2859 allow_ht:1, 2860 allow_vht:1, 2861 allow_he:1, 2862 set_agile:1, 2863 psc_channel:1; 2864 u32 phy_mode; 2865 u32 cfreq1; 2866 u32 cfreq2; 2867 char maxpower; 2868 char minpower; 2869 char maxregpower; 2870 u8 antennamax; 2871 u8 reg_class_id; 2872 }; 2873 2874 enum wmi_phy_mode { 2875 MODE_11A = 0, 2876 MODE_11G = 1, /* 11b/g Mode */ 2877 MODE_11B = 2, /* 11b Mode */ 2878 MODE_11GONLY = 3, /* 11g only Mode */ 2879 MODE_11NA_HT20 = 4, 2880 MODE_11NG_HT20 = 5, 2881 MODE_11NA_HT40 = 6, 2882 MODE_11NG_HT40 = 7, 2883 MODE_11AC_VHT20 = 8, 2884 MODE_11AC_VHT40 = 9, 2885 MODE_11AC_VHT80 = 10, 2886 MODE_11AC_VHT20_2G = 11, 2887 MODE_11AC_VHT40_2G = 12, 2888 MODE_11AC_VHT80_2G = 13, 2889 MODE_11AC_VHT80_80 = 14, 2890 MODE_11AC_VHT160 = 15, 2891 MODE_11AX_HE20 = 16, 2892 MODE_11AX_HE40 = 17, 2893 MODE_11AX_HE80 = 18, 2894 MODE_11AX_HE80_80 = 19, 2895 MODE_11AX_HE160 = 20, 2896 MODE_11AX_HE20_2G = 21, 2897 MODE_11AX_HE40_2G = 22, 2898 MODE_11AX_HE80_2G = 23, 2899 MODE_11BE_EHT20 = 24, 2900 MODE_11BE_EHT40 = 25, 2901 MODE_11BE_EHT80 = 26, 2902 MODE_11BE_EHT80_80 = 27, 2903 MODE_11BE_EHT160 = 28, 2904 MODE_11BE_EHT160_160 = 29, 2905 MODE_11BE_EHT320 = 30, 2906 MODE_11BE_EHT20_2G = 31, 2907 MODE_11BE_EHT40_2G = 32, 2908 MODE_UNKNOWN = 33, 2909 MODE_MAX = 33, 2910 }; 2911 2912 struct wmi_vdev_start_req_arg { 2913 u32 vdev_id; 2914 u32 freq; 2915 u32 band_center_freq1; 2916 u32 band_center_freq2; 2917 bool passive; 2918 bool allow_ibss; 2919 bool allow_ht; 2920 bool allow_vht; 2921 bool ht40plus; 2922 bool chan_radar; 2923 bool freq2_radar; 2924 bool allow_he; 2925 u32 min_power; 2926 u32 max_power; 2927 u32 max_reg_power; 2928 u32 max_antenna_gain; 2929 enum wmi_phy_mode mode; 2930 u32 bcn_intval; 2931 u32 dtim_period; 2932 u8 *ssid; 2933 u32 ssid_len; 2934 u32 bcn_tx_rate; 2935 u32 bcn_tx_power; 2936 bool disable_hw_ack; 2937 bool hidden_ssid; 2938 bool pmf_enabled; 2939 u32 he_ops; 2940 u32 cac_duration_ms; 2941 u32 regdomain; 2942 u32 pref_rx_streams; 2943 u32 pref_tx_streams; 2944 u32 num_noa_descriptors; 2945 u32 min_data_rate; 2946 u32 mbssid_flags; 2947 u32 mbssid_tx_vdev_id; 2948 u32 punct_bitmap; 2949 }; 2950 2951 struct ath12k_wmi_peer_create_arg { 2952 const u8 *peer_addr; 2953 u32 peer_type; 2954 u32 vdev_id; 2955 }; 2956 2957 struct ath12k_wmi_pdev_set_regdomain_arg { 2958 u16 current_rd_in_use; 2959 u16 current_rd_2g; 2960 u16 current_rd_5g; 2961 u32 ctl_2g; 2962 u32 ctl_5g; 2963 u8 dfs_domain; 2964 u32 pdev_id; 2965 }; 2966 2967 struct ath12k_wmi_rx_reorder_queue_remove_arg { 2968 u8 *peer_macaddr; 2969 u16 vdev_id; 2970 u32 peer_tid_bitmap; 2971 }; 2972 2973 #define WMI_HOST_PDEV_ID_SOC 0xFF 2974 #define WMI_HOST_PDEV_ID_0 0 2975 #define WMI_HOST_PDEV_ID_1 1 2976 #define WMI_HOST_PDEV_ID_2 2 2977 2978 #define WMI_PDEV_ID_SOC 0 2979 #define WMI_PDEV_ID_1ST 1 2980 #define WMI_PDEV_ID_2ND 2 2981 #define WMI_PDEV_ID_3RD 3 2982 2983 /* Freq units in MHz */ 2984 #define REG_RULE_START_FREQ 0x0000ffff 2985 #define REG_RULE_END_FREQ 0xffff0000 2986 #define REG_RULE_FLAGS 0x0000ffff 2987 #define REG_RULE_MAX_BW 0x0000ffff 2988 #define REG_RULE_REG_PWR 0x00ff0000 2989 #define REG_RULE_ANT_GAIN 0xff000000 2990 #define REG_RULE_PSD_INFO BIT(2) 2991 #define REG_RULE_PSD_EIRP 0xffff0000 2992 2993 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 2994 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 2995 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 2996 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 2997 2998 #define HECAP_PHYDWORD_0 0 2999 #define HECAP_PHYDWORD_1 1 3000 #define HECAP_PHYDWORD_2 2 3001 3002 #define HECAP_PHY_SU_BFER BIT(31) 3003 #define HECAP_PHY_SU_BFEE BIT(0) 3004 #define HECAP_PHY_MU_BFER BIT(1) 3005 #define HECAP_PHY_UL_MUMIMO BIT(22) 3006 #define HECAP_PHY_UL_MUOFDMA BIT(23) 3007 3008 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 3009 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_SU_BFER) 3010 3011 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 3012 u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_SU_BFEE) 3013 3014 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 3015 u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_MU_BFER) 3016 3017 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 3018 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUMIMO) 3019 3020 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 3021 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUOFDMA) 3022 3023 #define HE_MODE_SU_TX_BFEE BIT(0) 3024 #define HE_MODE_SU_TX_BFER BIT(1) 3025 #define HE_MODE_MU_TX_BFEE BIT(2) 3026 #define HE_MODE_MU_TX_BFER BIT(3) 3027 #define HE_MODE_DL_OFDMA BIT(4) 3028 #define HE_MODE_UL_OFDMA BIT(5) 3029 #define HE_MODE_UL_MUMIMO BIT(6) 3030 3031 #define HE_DL_MUOFDMA_ENABLE 1 3032 #define HE_UL_MUOFDMA_ENABLE 1 3033 #define HE_DL_MUMIMO_ENABLE 1 3034 #define HE_MU_BFEE_ENABLE 1 3035 #define HE_SU_BFEE_ENABLE 1 3036 3037 #define HE_VHT_SOUNDING_MODE_ENABLE 1 3038 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 3039 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 3040 3041 /* HE or VHT Sounding */ 3042 #define HE_VHT_SOUNDING_MODE BIT(0) 3043 /* SU or MU Sounding */ 3044 #define HE_SU_MU_SOUNDING_MODE BIT(2) 3045 /* Trig or Non-Trig Sounding */ 3046 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 3047 3048 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 3049 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 3050 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 3051 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 3052 3053 enum wmi_peer_type { 3054 WMI_PEER_TYPE_DEFAULT = 0, 3055 WMI_PEER_TYPE_BSS = 1, 3056 WMI_PEER_TYPE_TDLS = 2, 3057 }; 3058 3059 struct wmi_peer_create_cmd { 3060 __le32 tlv_header; 3061 __le32 vdev_id; 3062 struct ath12k_wmi_mac_addr_params peer_macaddr; 3063 __le32 peer_type; 3064 } __packed; 3065 3066 struct wmi_peer_delete_cmd { 3067 __le32 tlv_header; 3068 __le32 vdev_id; 3069 struct ath12k_wmi_mac_addr_params peer_macaddr; 3070 } __packed; 3071 3072 struct wmi_peer_reorder_queue_setup_cmd { 3073 __le32 tlv_header; 3074 __le32 vdev_id; 3075 struct ath12k_wmi_mac_addr_params peer_macaddr; 3076 __le32 tid; 3077 __le32 queue_ptr_lo; 3078 __le32 queue_ptr_hi; 3079 __le32 queue_no; 3080 __le32 ba_window_size_valid; 3081 __le32 ba_window_size; 3082 } __packed; 3083 3084 struct wmi_peer_reorder_queue_remove_cmd { 3085 __le32 tlv_header; 3086 __le32 vdev_id; 3087 struct ath12k_wmi_mac_addr_params peer_macaddr; 3088 __le32 tid_mask; 3089 } __packed; 3090 3091 enum wmi_bss_chan_info_req_type { 3092 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 3093 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 3094 }; 3095 3096 struct wmi_pdev_set_param_cmd { 3097 __le32 tlv_header; 3098 __le32 pdev_id; 3099 __le32 param_id; 3100 __le32 param_value; 3101 } __packed; 3102 3103 struct wmi_pdev_set_ps_mode_cmd { 3104 __le32 tlv_header; 3105 __le32 vdev_id; 3106 __le32 sta_ps_mode; 3107 } __packed; 3108 3109 struct wmi_pdev_suspend_cmd { 3110 __le32 tlv_header; 3111 __le32 pdev_id; 3112 __le32 suspend_opt; 3113 } __packed; 3114 3115 struct wmi_pdev_resume_cmd { 3116 __le32 tlv_header; 3117 __le32 pdev_id; 3118 } __packed; 3119 3120 struct wmi_pdev_bss_chan_info_req_cmd { 3121 __le32 tlv_header; 3122 /* ref wmi_bss_chan_info_req_type */ 3123 __le32 req_type; 3124 __le32 pdev_id; 3125 } __packed; 3126 3127 struct wmi_ap_ps_peer_cmd { 3128 __le32 tlv_header; 3129 __le32 vdev_id; 3130 struct ath12k_wmi_mac_addr_params peer_macaddr; 3131 __le32 param; 3132 __le32 value; 3133 } __packed; 3134 3135 struct wmi_sta_powersave_param_cmd { 3136 __le32 tlv_header; 3137 __le32 vdev_id; 3138 __le32 param; 3139 __le32 value; 3140 } __packed; 3141 3142 struct wmi_pdev_set_regdomain_cmd { 3143 __le32 tlv_header; 3144 __le32 pdev_id; 3145 __le32 reg_domain; 3146 __le32 reg_domain_2g; 3147 __le32 reg_domain_5g; 3148 __le32 conformance_test_limit_2g; 3149 __le32 conformance_test_limit_5g; 3150 __le32 dfs_domain; 3151 } __packed; 3152 3153 struct wmi_peer_set_param_cmd { 3154 __le32 tlv_header; 3155 __le32 vdev_id; 3156 struct ath12k_wmi_mac_addr_params peer_macaddr; 3157 __le32 param_id; 3158 __le32 param_value; 3159 } __packed; 3160 3161 struct wmi_peer_flush_tids_cmd { 3162 __le32 tlv_header; 3163 __le32 vdev_id; 3164 struct ath12k_wmi_mac_addr_params peer_macaddr; 3165 __le32 peer_tid_bitmap; 3166 } __packed; 3167 3168 struct wmi_dfs_phyerr_offload_cmd { 3169 __le32 tlv_header; 3170 __le32 pdev_id; 3171 } __packed; 3172 3173 struct wmi_bcn_offload_ctrl_cmd { 3174 __le32 tlv_header; 3175 __le32 vdev_id; 3176 __le32 bcn_ctrl_op; 3177 } __packed; 3178 3179 enum scan_dwelltime_adaptive_mode { 3180 SCAN_DWELL_MODE_DEFAULT = 0, 3181 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3182 SCAN_DWELL_MODE_MODERATE = 2, 3183 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3184 SCAN_DWELL_MODE_STATIC = 4 3185 }; 3186 3187 #define WLAN_SCAN_MAX_NUM_SSID 10 3188 #define WLAN_SCAN_MAX_NUM_BSSID 10 3189 3190 struct ath12k_wmi_element_info_arg { 3191 u32 len; 3192 u8 *ptr; 3193 }; 3194 3195 #define WMI_IE_BITMAP_SIZE 8 3196 3197 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3198 /* prefix used by scan requestor ids on the host */ 3199 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3200 3201 /* prefix used by scan request ids generated on the host */ 3202 /* host cycles through the lower 12 bits to generate ids */ 3203 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3204 3205 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3206 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3207 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 512 3208 3209 /* Values lower than this may be refused by some firmware revisions with a scan 3210 * completion with a timedout reason. 3211 */ 3212 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3213 3214 /* Scan priority numbers must be sequential, starting with 0 */ 3215 enum wmi_scan_priority { 3216 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3217 WMI_SCAN_PRIORITY_LOW, 3218 WMI_SCAN_PRIORITY_MEDIUM, 3219 WMI_SCAN_PRIORITY_HIGH, 3220 WMI_SCAN_PRIORITY_VERY_HIGH, 3221 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3222 }; 3223 3224 enum wmi_scan_event_type { 3225 WMI_SCAN_EVENT_STARTED = BIT(0), 3226 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3227 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3228 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3229 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3230 /* possibly by high-prio scan */ 3231 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3232 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3233 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3234 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3235 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3236 WMI_SCAN_EVENT_RESUMED = BIT(10), 3237 WMI_SCAN_EVENT_MAX = BIT(15), 3238 }; 3239 3240 enum wmi_scan_completion_reason { 3241 WMI_SCAN_REASON_COMPLETED, 3242 WMI_SCAN_REASON_CANCELLED, 3243 WMI_SCAN_REASON_PREEMPTED, 3244 WMI_SCAN_REASON_TIMEDOUT, 3245 WMI_SCAN_REASON_INTERNAL_FAILURE, 3246 WMI_SCAN_REASON_MAX, 3247 }; 3248 3249 struct wmi_start_scan_cmd { 3250 __le32 tlv_header; 3251 __le32 scan_id; 3252 __le32 scan_req_id; 3253 __le32 vdev_id; 3254 __le32 scan_priority; 3255 __le32 notify_scan_events; 3256 __le32 dwell_time_active; 3257 __le32 dwell_time_passive; 3258 __le32 min_rest_time; 3259 __le32 max_rest_time; 3260 __le32 repeat_probe_time; 3261 __le32 probe_spacing_time; 3262 __le32 idle_time; 3263 __le32 max_scan_time; 3264 __le32 probe_delay; 3265 __le32 scan_ctrl_flags; 3266 __le32 burst_duration; 3267 __le32 num_chan; 3268 __le32 num_bssid; 3269 __le32 num_ssids; 3270 __le32 ie_len; 3271 __le32 n_probes; 3272 struct ath12k_wmi_mac_addr_params mac_addr; 3273 struct ath12k_wmi_mac_addr_params mac_mask; 3274 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3275 __le32 num_vendor_oui; 3276 __le32 scan_ctrl_flags_ext; 3277 __le32 dwell_time_active_2g; 3278 __le32 dwell_time_active_6g; 3279 __le32 dwell_time_passive_6g; 3280 __le32 scan_start_offset; 3281 } __packed; 3282 3283 #define WMI_SCAN_FLAG_PASSIVE 0x1 3284 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3285 #define WMI_SCAN_ADD_CCK_RATES 0x4 3286 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3287 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3288 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3289 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3290 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3291 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3292 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3293 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3294 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3295 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3296 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3297 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3298 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3299 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3300 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3301 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3302 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3303 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3304 3305 #define WMI_SCAN_DWELL_MODE_MASK GENMASK(23, 21) 3306 3307 enum { 3308 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3309 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3310 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3311 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3312 WMI_SCAN_DWELL_MODE_STATIC = 4, 3313 }; 3314 3315 struct ath12k_wmi_hint_short_ssid_arg { 3316 u32 freq_flags; 3317 u32 short_ssid; 3318 }; 3319 3320 struct ath12k_wmi_hint_bssid_arg { 3321 u32 freq_flags; 3322 struct ath12k_wmi_mac_addr_params bssid; 3323 }; 3324 3325 struct ath12k_wmi_scan_req_arg { 3326 u32 scan_id; 3327 u32 scan_req_id; 3328 u32 vdev_id; 3329 u32 pdev_id; 3330 enum wmi_scan_priority scan_priority; 3331 u32 scan_ev_started:1, 3332 scan_ev_completed:1, 3333 scan_ev_bss_chan:1, 3334 scan_ev_foreign_chan:1, 3335 scan_ev_dequeued:1, 3336 scan_ev_preempted:1, 3337 scan_ev_start_failed:1, 3338 scan_ev_restarted:1, 3339 scan_ev_foreign_chn_exit:1, 3340 scan_ev_invalid:1, 3341 scan_ev_gpio_timeout:1, 3342 scan_ev_suspended:1, 3343 scan_ev_resumed:1; 3344 u32 dwell_time_active; 3345 u32 dwell_time_active_2g; 3346 u32 dwell_time_passive; 3347 u32 dwell_time_active_6g; 3348 u32 dwell_time_passive_6g; 3349 u32 min_rest_time; 3350 u32 max_rest_time; 3351 u32 repeat_probe_time; 3352 u32 probe_spacing_time; 3353 u32 idle_time; 3354 u32 max_scan_time; 3355 u32 probe_delay; 3356 u32 scan_f_passive:1, 3357 scan_f_bcast_probe:1, 3358 scan_f_cck_rates:1, 3359 scan_f_ofdm_rates:1, 3360 scan_f_chan_stat_evnt:1, 3361 scan_f_filter_prb_req:1, 3362 scan_f_bypass_dfs_chn:1, 3363 scan_f_continue_on_err:1, 3364 scan_f_offchan_mgmt_tx:1, 3365 scan_f_offchan_data_tx:1, 3366 scan_f_promisc_mode:1, 3367 scan_f_capture_phy_err:1, 3368 scan_f_strict_passive_pch:1, 3369 scan_f_half_rate:1, 3370 scan_f_quarter_rate:1, 3371 scan_f_force_active_dfs_chn:1, 3372 scan_f_add_tpc_ie_in_probe:1, 3373 scan_f_add_ds_ie_in_probe:1, 3374 scan_f_add_spoofed_mac_in_probe:1, 3375 scan_f_add_rand_seq_in_probe:1, 3376 scan_f_en_ie_whitelist_in_probe:1, 3377 scan_f_forced:1, 3378 scan_f_2ghz:1, 3379 scan_f_5ghz:1, 3380 scan_f_80mhz:1; 3381 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3382 u32 burst_duration; 3383 u32 num_chan; 3384 u32 num_bssid; 3385 u32 num_ssids; 3386 u32 n_probes; 3387 u32 *chan_list; 3388 u32 notify_scan_events; 3389 struct cfg80211_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3390 struct ath12k_wmi_mac_addr_params bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3391 struct ath12k_wmi_element_info_arg extraie; 3392 u32 num_hint_s_ssid; 3393 u32 num_hint_bssid; 3394 struct ath12k_wmi_hint_short_ssid_arg hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3395 struct ath12k_wmi_hint_bssid_arg hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3396 }; 3397 3398 struct wmi_ssid_arg { 3399 int len; 3400 const u8 *ssid; 3401 }; 3402 3403 struct wmi_bssid_arg { 3404 const u8 *bssid; 3405 }; 3406 3407 #define WMI_SCAN_STOP_ONE 0x00000000 3408 #define WMI_SCAN_STOP_VAP_ALL 0x01000000 3409 #define WMI_SCAN_STOP_ALL 0x04000000 3410 3411 /* Prefix 0xA000 indicates that the scan request 3412 * is trigger by HOST 3413 */ 3414 #define ATH12K_SCAN_ID 0xA000 3415 3416 enum scan_cancel_req_type { 3417 WLAN_SCAN_CANCEL_SINGLE = 1, 3418 WLAN_SCAN_CANCEL_VDEV_ALL, 3419 WLAN_SCAN_CANCEL_PDEV_ALL, 3420 }; 3421 3422 struct ath12k_wmi_scan_cancel_arg { 3423 u32 requester; 3424 u32 scan_id; 3425 enum scan_cancel_req_type req_type; 3426 u32 vdev_id; 3427 u32 pdev_id; 3428 }; 3429 3430 struct wmi_bcn_send_from_host_cmd { 3431 __le32 tlv_header; 3432 __le32 vdev_id; 3433 __le32 data_len; 3434 union { 3435 __le32 frag_ptr; 3436 __le32 frag_ptr_lo; 3437 }; 3438 __le32 frame_ctrl; 3439 __le32 dtim_flag; 3440 __le32 bcn_antenna; 3441 __le32 frag_ptr_hi; 3442 }; 3443 3444 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3445 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3446 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3447 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3448 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3449 #define WMI_CHAN_INFO_DFS BIT(10) 3450 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3451 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3452 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3453 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3454 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3455 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3456 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3457 #define WMI_CHAN_INFO_PSC BIT(18) 3458 3459 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3460 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3461 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3462 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3463 3464 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3465 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3466 3467 struct ath12k_wmi_channel_params { 3468 __le32 tlv_header; 3469 __le32 mhz; 3470 __le32 band_center_freq1; 3471 __le32 band_center_freq2; 3472 __le32 info; 3473 __le32 reg_info_1; 3474 __le32 reg_info_2; 3475 } __packed; 3476 3477 enum wmi_sta_ps_mode { 3478 WMI_STA_PS_MODE_DISABLED = 0, 3479 WMI_STA_PS_MODE_ENABLED = 1, 3480 }; 3481 3482 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3483 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3484 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3485 3486 #define ATH12K_WMI_FW_HANG_ASSERT_TYPE 1 3487 #define ATH12K_WMI_FW_HANG_DELAY 0 3488 3489 /* type, 0:unused 1: ASSERT 2: not respond detect command 3490 * delay_time_ms, the simulate will delay time 3491 */ 3492 3493 struct wmi_force_fw_hang_cmd { 3494 __le32 tlv_header; 3495 __le32 type; 3496 __le32 delay_time_ms; 3497 } __packed; 3498 3499 struct wmi_vdev_set_param_cmd { 3500 __le32 tlv_header; 3501 __le32 vdev_id; 3502 __le32 param_id; 3503 __le32 param_value; 3504 } __packed; 3505 3506 struct wmi_get_pdev_temperature_cmd { 3507 __le32 tlv_header; 3508 __le32 param; 3509 __le32 pdev_id; 3510 } __packed; 3511 3512 #define WMI_P2P_MAX_NOA_DESCRIPTORS 4 3513 3514 struct wmi_p2p_noa_event { 3515 __le32 vdev_id; 3516 } __packed; 3517 3518 struct ath12k_wmi_p2p_noa_descriptor { 3519 __le32 type_count; /* 255: continuous schedule, 0: reserved */ 3520 __le32 duration; /* Absent period duration in micro seconds */ 3521 __le32 interval; /* Absent period interval in micro seconds */ 3522 __le32 start_time; /* 32 bit tsf time when in starts */ 3523 } __packed; 3524 3525 #define WMI_P2P_NOA_INFO_CHANGED_FLAG BIT(0) 3526 #define WMI_P2P_NOA_INFO_INDEX GENMASK(15, 8) 3527 #define WMI_P2P_NOA_INFO_OPP_PS BIT(16) 3528 #define WMI_P2P_NOA_INFO_CTWIN_TU GENMASK(23, 17) 3529 #define WMI_P2P_NOA_INFO_DESC_NUM GENMASK(31, 24) 3530 3531 struct ath12k_wmi_p2p_noa_info { 3532 /* Bit 0 - Flag to indicate an update in NOA schedule 3533 * Bits 7-1 - Reserved 3534 * Bits 15-8 - Index (identifies the instance of NOA sub element) 3535 * Bit 16 - Opp PS state of the AP 3536 * Bits 23-17 - Ctwindow in TUs 3537 * Bits 31-24 - Number of NOA descriptors 3538 */ 3539 __le32 noa_attr; 3540 struct ath12k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS]; 3541 } __packed; 3542 3543 #define WMI_BEACON_TX_BUFFER_SIZE 512 3544 3545 #define WMI_EMA_BEACON_CNT GENMASK(7, 0) 3546 #define WMI_EMA_BEACON_IDX GENMASK(15, 8) 3547 #define WMI_EMA_BEACON_FIRST GENMASK(23, 16) 3548 #define WMI_EMA_BEACON_LAST GENMASK(31, 24) 3549 3550 struct ath12k_wmi_bcn_tmpl_ema_arg { 3551 u8 bcn_cnt; 3552 u8 bcn_index; 3553 }; 3554 3555 struct wmi_bcn_tmpl_cmd { 3556 __le32 tlv_header; 3557 __le32 vdev_id; 3558 __le32 tim_ie_offset; 3559 __le32 buf_len; 3560 __le32 csa_switch_count_offset; 3561 __le32 ext_csa_switch_count_offset; 3562 __le32 csa_event_bitmap; 3563 __le32 mbssid_ie_offset; 3564 __le32 esp_ie_offset; 3565 __le32 csc_switch_count_offset; 3566 __le32 csc_event_bitmap; 3567 __le32 mu_edca_ie_offset; 3568 __le32 feature_enable_bitmap; 3569 __le32 ema_params; 3570 } __packed; 3571 3572 struct wmi_p2p_go_set_beacon_ie_cmd { 3573 __le32 tlv_header; 3574 __le32 vdev_id; 3575 __le32 ie_buf_len; 3576 } __packed; 3577 3578 struct wmi_vdev_install_key_cmd { 3579 __le32 tlv_header; 3580 __le32 vdev_id; 3581 struct ath12k_wmi_mac_addr_params peer_macaddr; 3582 __le32 key_idx; 3583 __le32 key_flags; 3584 __le32 key_cipher; 3585 __le64 key_rsc_counter; 3586 __le64 key_global_rsc_counter; 3587 __le64 key_tsc_counter; 3588 u8 wpi_key_rsc_counter[16]; 3589 u8 wpi_key_tsc_counter[16]; 3590 __le32 key_len; 3591 __le32 key_txmic_len; 3592 __le32 key_rxmic_len; 3593 __le32 is_group_key_id_valid; 3594 __le32 group_key_id; 3595 3596 /* Followed by key_data containing key followed by 3597 * tx mic and then rx mic 3598 */ 3599 } __packed; 3600 3601 struct wmi_vdev_install_key_arg { 3602 u32 vdev_id; 3603 const u8 *macaddr; 3604 u32 key_idx; 3605 u32 key_flags; 3606 u32 key_cipher; 3607 u32 key_len; 3608 u32 key_txmic_len; 3609 u32 key_rxmic_len; 3610 u64 key_rsc_counter; 3611 const void *key_data; 3612 }; 3613 3614 #define WMI_MAX_SUPPORTED_RATES 128 3615 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3616 #define WMI_HOST_MAX_HE_RATE_SET 3 3617 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3618 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3619 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3620 3621 struct wmi_rate_set_arg { 3622 u32 num_rates; 3623 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3624 }; 3625 3626 struct ath12k_wmi_peer_assoc_arg { 3627 u32 vdev_id; 3628 u32 peer_new_assoc; 3629 u32 peer_associd; 3630 u32 peer_flags; 3631 u32 peer_caps; 3632 u32 peer_listen_intval; 3633 u32 peer_ht_caps; 3634 u32 peer_max_mpdu; 3635 u32 peer_mpdu_density; 3636 u32 peer_rate_caps; 3637 u32 peer_nss; 3638 u32 peer_vht_caps; 3639 u32 peer_phymode; 3640 u32 peer_ht_info[2]; 3641 struct wmi_rate_set_arg peer_legacy_rates; 3642 struct wmi_rate_set_arg peer_ht_rates; 3643 u32 rx_max_rate; 3644 u32 rx_mcs_set; 3645 u32 tx_max_rate; 3646 u32 tx_mcs_set; 3647 u8 vht_capable; 3648 u8 min_data_rate; 3649 u32 tx_max_mcs_nss; 3650 u32 peer_bw_rxnss_override; 3651 bool is_pmf_enabled; 3652 bool is_wme_set; 3653 bool qos_flag; 3654 bool apsd_flag; 3655 bool ht_flag; 3656 bool bw_40; 3657 bool bw_80; 3658 bool bw_160; 3659 bool bw_320; 3660 bool stbc_flag; 3661 bool ldpc_flag; 3662 bool static_mimops_flag; 3663 bool dynamic_mimops_flag; 3664 bool spatial_mux_flag; 3665 bool vht_flag; 3666 bool vht_ng_flag; 3667 bool need_ptk_4_way; 3668 bool need_gtk_2_way; 3669 bool auth_flag; 3670 bool safe_mode_enabled; 3671 bool amsdu_disable; 3672 /* Use common structure */ 3673 u8 peer_mac[ETH_ALEN]; 3674 3675 bool he_flag; 3676 u32 peer_he_cap_macinfo[2]; 3677 u32 peer_he_cap_macinfo_internal; 3678 u32 peer_he_caps_6ghz; 3679 u32 peer_he_ops; 3680 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3681 u32 peer_he_mcs_count; 3682 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3683 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3684 bool twt_responder; 3685 bool twt_requester; 3686 struct ath12k_wmi_ppe_threshold_arg peer_ppet; 3687 bool eht_flag; 3688 u32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3689 u32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3690 u32 peer_eht_mcs_count; 3691 u32 peer_eht_rx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3692 u32 peer_eht_tx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3693 struct ath12k_wmi_ppe_threshold_arg peer_eht_ppet; 3694 u32 punct_bitmap; 3695 }; 3696 3697 struct wmi_peer_assoc_complete_cmd { 3698 __le32 tlv_header; 3699 struct ath12k_wmi_mac_addr_params peer_macaddr; 3700 __le32 vdev_id; 3701 __le32 peer_new_assoc; 3702 __le32 peer_associd; 3703 __le32 peer_flags; 3704 __le32 peer_caps; 3705 __le32 peer_listen_intval; 3706 __le32 peer_ht_caps; 3707 __le32 peer_max_mpdu; 3708 __le32 peer_mpdu_density; 3709 __le32 peer_rate_caps; 3710 __le32 peer_nss; 3711 __le32 peer_vht_caps; 3712 __le32 peer_phymode; 3713 __le32 peer_ht_info[2]; 3714 __le32 num_peer_legacy_rates; 3715 __le32 num_peer_ht_rates; 3716 __le32 peer_bw_rxnss_override; 3717 struct ath12k_wmi_ppe_threshold_params peer_ppet; 3718 __le32 peer_he_cap_info; 3719 __le32 peer_he_ops; 3720 __le32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3721 __le32 peer_he_mcs; 3722 __le32 peer_he_cap_info_ext; 3723 __le32 peer_he_cap_info_internal; 3724 __le32 min_data_rate; 3725 __le32 peer_he_caps_6ghz; 3726 __le32 sta_type; 3727 __le32 bss_max_idle_option; 3728 __le32 auth_mode; 3729 __le32 peer_flags_ext; 3730 __le32 punct_bitmap; 3731 __le32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3732 __le32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3733 __le32 peer_eht_ops; 3734 struct ath12k_wmi_ppe_threshold_params peer_eht_ppet; 3735 } __packed; 3736 3737 struct wmi_stop_scan_cmd { 3738 __le32 tlv_header; 3739 __le32 requestor; 3740 __le32 scan_id; 3741 __le32 req_type; 3742 __le32 vdev_id; 3743 __le32 pdev_id; 3744 } __packed; 3745 3746 struct ath12k_wmi_scan_chan_list_arg { 3747 u32 pdev_id; 3748 u16 nallchans; 3749 struct ath12k_wmi_channel_arg channel[]; 3750 }; 3751 3752 struct wmi_scan_chan_list_cmd { 3753 __le32 tlv_header; 3754 __le32 num_scan_chans; 3755 __le32 flags; 3756 __le32 pdev_id; 3757 } __packed; 3758 3759 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3760 3761 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3762 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3763 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3764 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3765 3766 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3767 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3768 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3769 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3770 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3771 3772 struct wmi_mgmt_send_cmd { 3773 __le32 tlv_header; 3774 __le32 vdev_id; 3775 __le32 desc_id; 3776 __le32 chanfreq; 3777 __le32 paddr_lo; 3778 __le32 paddr_hi; 3779 __le32 frame_len; 3780 __le32 buf_len; 3781 __le32 tx_params_valid; 3782 3783 /* This TLV is followed by struct wmi_mgmt_frame */ 3784 3785 /* Followed by struct wmi_mgmt_send_params */ 3786 } __packed; 3787 3788 struct wmi_sta_powersave_mode_cmd { 3789 __le32 tlv_header; 3790 __le32 vdev_id; 3791 __le32 sta_ps_mode; 3792 } __packed; 3793 3794 struct wmi_sta_smps_force_mode_cmd { 3795 __le32 tlv_header; 3796 __le32 vdev_id; 3797 __le32 forced_mode; 3798 } __packed; 3799 3800 struct wmi_sta_smps_param_cmd { 3801 __le32 tlv_header; 3802 __le32 vdev_id; 3803 __le32 param; 3804 __le32 value; 3805 } __packed; 3806 3807 struct ath12k_wmi_bcn_prb_info_params { 3808 __le32 tlv_header; 3809 __le32 caps; 3810 __le32 erp; 3811 } __packed; 3812 3813 enum { 3814 WMI_PDEV_SUSPEND, 3815 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3816 }; 3817 3818 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3819 __le32 tlv_header; 3820 __le32 pdev_id; 3821 __le32 enable; 3822 } __packed; 3823 3824 struct ath12k_wmi_ap_ps_arg { 3825 u32 vdev_id; 3826 u32 param; 3827 u32 value; 3828 }; 3829 3830 enum set_init_cc_type { 3831 WMI_COUNTRY_INFO_TYPE_ALPHA, 3832 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3833 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3834 }; 3835 3836 enum set_init_cc_flags { 3837 INVALID_CC, 3838 CC_IS_SET, 3839 REGDMN_IS_SET, 3840 ALPHA_IS_SET, 3841 }; 3842 3843 struct ath12k_wmi_init_country_arg { 3844 union { 3845 u16 country_code; 3846 u16 regdom_id; 3847 u8 alpha2[3]; 3848 } cc_info; 3849 enum set_init_cc_flags flags; 3850 }; 3851 3852 struct wmi_init_country_cmd { 3853 __le32 tlv_header; 3854 __le32 pdev_id; 3855 __le32 init_cc_type; 3856 union { 3857 __le32 country_code; 3858 __le32 regdom_id; 3859 __le32 alpha2; 3860 } cc_info; 3861 } __packed; 3862 3863 struct wmi_delba_send_cmd { 3864 __le32 tlv_header; 3865 __le32 vdev_id; 3866 struct ath12k_wmi_mac_addr_params peer_macaddr; 3867 __le32 tid; 3868 __le32 initiator; 3869 __le32 reasoncode; 3870 } __packed; 3871 3872 struct wmi_addba_setresponse_cmd { 3873 __le32 tlv_header; 3874 __le32 vdev_id; 3875 struct ath12k_wmi_mac_addr_params peer_macaddr; 3876 __le32 tid; 3877 __le32 statuscode; 3878 } __packed; 3879 3880 struct wmi_addba_send_cmd { 3881 __le32 tlv_header; 3882 __le32 vdev_id; 3883 struct ath12k_wmi_mac_addr_params peer_macaddr; 3884 __le32 tid; 3885 __le32 buffersize; 3886 } __packed; 3887 3888 struct wmi_addba_clear_resp_cmd { 3889 __le32 tlv_header; 3890 __le32 vdev_id; 3891 struct ath12k_wmi_mac_addr_params peer_macaddr; 3892 } __packed; 3893 3894 #define DFS_PHYERR_UNIT_TEST_CMD 0 3895 #define DFS_UNIT_TEST_MODULE 0x2b 3896 #define DFS_UNIT_TEST_TOKEN 0xAA 3897 3898 enum dfs_test_args_idx { 3899 DFS_TEST_CMDID = 0, 3900 DFS_TEST_PDEV_ID, 3901 DFS_TEST_RADAR_PARAM, 3902 DFS_MAX_TEST_ARGS, 3903 }; 3904 3905 struct wmi_dfs_unit_test_arg { 3906 u32 cmd_id; 3907 u32 pdev_id; 3908 u32 radar_param; 3909 }; 3910 3911 struct wmi_unit_test_cmd { 3912 __le32 tlv_header; 3913 __le32 vdev_id; 3914 __le32 module_id; 3915 __le32 num_args; 3916 __le32 diag_token; 3917 /* Followed by test args*/ 3918 } __packed; 3919 3920 #define MAX_SUPPORTED_RATES 128 3921 3922 struct ath12k_wmi_vht_rate_set_params { 3923 __le32 tlv_header; 3924 __le32 rx_max_rate; 3925 __le32 rx_mcs_set; 3926 __le32 tx_max_rate; 3927 __le32 tx_mcs_set; 3928 __le32 tx_max_mcs_nss; 3929 } __packed; 3930 3931 struct ath12k_wmi_he_rate_set_params { 3932 __le32 tlv_header; 3933 __le32 rx_mcs_set; 3934 __le32 tx_mcs_set; 3935 } __packed; 3936 3937 struct ath12k_wmi_eht_rate_set_params { 3938 __le32 tlv_header; 3939 __le32 rx_mcs_set; 3940 __le32 tx_mcs_set; 3941 } __packed; 3942 3943 #define MAX_REG_RULES 10 3944 #define REG_ALPHA2_LEN 2 3945 #define MAX_6G_REG_RULES 5 3946 #define REG_US_5G_NUM_REG_RULES 4 3947 3948 enum wmi_start_event_param { 3949 WMI_VDEV_START_RESP_EVENT = 0, 3950 WMI_VDEV_RESTART_RESP_EVENT, 3951 }; 3952 3953 struct wmi_vdev_start_resp_event { 3954 __le32 vdev_id; 3955 __le32 requestor_id; 3956 /* enum wmi_start_event_param */ 3957 __le32 resp_type; 3958 __le32 status; 3959 __le32 chain_mask; 3960 __le32 smps_mode; 3961 union { 3962 __le32 mac_id; 3963 __le32 pdev_id; 3964 }; 3965 __le32 cfgd_tx_streams; 3966 __le32 cfgd_rx_streams; 3967 } __packed; 3968 3969 /* VDEV start response status codes */ 3970 enum wmi_vdev_start_resp_status_code { 3971 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 3972 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 3973 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 3974 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 3975 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 3976 }; 3977 3978 enum wmi_reg_6g_ap_type { 3979 WMI_REG_INDOOR_AP = 0, 3980 WMI_REG_STD_POWER_AP = 1, 3981 WMI_REG_VLP_AP = 2, 3982 WMI_REG_CURRENT_MAX_AP_TYPE, 3983 WMI_REG_MAX_SUPP_AP_TYPE = WMI_REG_VLP_AP, 3984 WMI_REG_MAX_AP_TYPE = 7, 3985 }; 3986 3987 enum wmi_reg_6g_client_type { 3988 WMI_REG_DEFAULT_CLIENT = 0, 3989 WMI_REG_SUBORDINATE_CLIENT = 1, 3990 WMI_REG_MAX_CLIENT_TYPE = 2, 3991 }; 3992 3993 /* Regulatory Rule Flags Passed by FW */ 3994 #define REGULATORY_CHAN_DISABLED BIT(0) 3995 #define REGULATORY_CHAN_NO_IR BIT(1) 3996 #define REGULATORY_CHAN_RADAR BIT(3) 3997 #define REGULATORY_CHAN_NO_OFDM BIT(6) 3998 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 3999 4000 #define REGULATORY_CHAN_NO_HT40 BIT(4) 4001 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 4002 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 4003 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 4004 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 4005 4006 enum { 4007 WMI_REG_SET_CC_STATUS_PASS = 0, 4008 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4009 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 4010 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4011 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 4012 WMI_REG_SET_CC_STATUS_FAIL = 5, 4013 }; 4014 4015 #define WMI_REG_CLIENT_MAX 4 4016 4017 struct wmi_reg_chan_list_cc_ext_event { 4018 __le32 status_code; 4019 __le32 phy_id; 4020 __le32 alpha2; 4021 __le32 num_phy; 4022 __le32 country_id; 4023 __le32 domain_code; 4024 __le32 dfs_region; 4025 __le32 phybitmap; 4026 __le32 min_bw_2g; 4027 __le32 max_bw_2g; 4028 __le32 min_bw_5g; 4029 __le32 max_bw_5g; 4030 __le32 num_2g_reg_rules; 4031 __le32 num_5g_reg_rules; 4032 __le32 client_type; 4033 __le32 rnr_tpe_usable; 4034 __le32 unspecified_ap_usable; 4035 __le32 domain_code_6g_ap_lpi; 4036 __le32 domain_code_6g_ap_sp; 4037 __le32 domain_code_6g_ap_vlp; 4038 __le32 domain_code_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4039 __le32 domain_code_6g_client_sp[WMI_REG_CLIENT_MAX]; 4040 __le32 domain_code_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4041 __le32 domain_code_6g_super_id; 4042 __le32 min_bw_6g_ap_sp; 4043 __le32 max_bw_6g_ap_sp; 4044 __le32 min_bw_6g_ap_lpi; 4045 __le32 max_bw_6g_ap_lpi; 4046 __le32 min_bw_6g_ap_vlp; 4047 __le32 max_bw_6g_ap_vlp; 4048 __le32 min_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4049 __le32 max_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4050 __le32 min_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4051 __le32 max_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4052 __le32 min_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4053 __le32 max_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4054 __le32 num_6g_reg_rules_ap_sp; 4055 __le32 num_6g_reg_rules_ap_lpi; 4056 __le32 num_6g_reg_rules_ap_vlp; 4057 __le32 num_6g_reg_rules_cl_sp[WMI_REG_CLIENT_MAX]; 4058 __le32 num_6g_reg_rules_cl_lpi[WMI_REG_CLIENT_MAX]; 4059 __le32 num_6g_reg_rules_cl_vlp[WMI_REG_CLIENT_MAX]; 4060 } __packed; 4061 4062 struct ath12k_wmi_reg_rule_ext_params { 4063 __le32 tlv_header; 4064 __le32 freq_info; 4065 __le32 bw_pwr_info; 4066 __le32 flag_info; 4067 __le32 psd_power_info; 4068 } __packed; 4069 4070 struct wmi_vdev_delete_resp_event { 4071 __le32 vdev_id; 4072 } __packed; 4073 4074 struct wmi_peer_delete_resp_event { 4075 __le32 vdev_id; 4076 struct ath12k_wmi_mac_addr_params peer_macaddr; 4077 } __packed; 4078 4079 struct wmi_bcn_tx_status_event { 4080 __le32 vdev_id; 4081 __le32 tx_status; 4082 } __packed; 4083 4084 struct wmi_vdev_stopped_event { 4085 __le32 vdev_id; 4086 } __packed; 4087 4088 struct wmi_pdev_bss_chan_info_event { 4089 __le32 freq; /* Units in MHz */ 4090 __le32 noise_floor; /* units are dBm */ 4091 /* rx clear - how often the channel was unused */ 4092 __le32 rx_clear_count_low; 4093 __le32 rx_clear_count_high; 4094 /* cycle count - elapsed time during measured period, in clock ticks */ 4095 __le32 cycle_count_low; 4096 __le32 cycle_count_high; 4097 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4098 __le32 tx_cycle_count_low; 4099 __le32 tx_cycle_count_high; 4100 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4101 __le32 rx_cycle_count_low; 4102 __le32 rx_cycle_count_high; 4103 /*rx_cycle cnt for my bss in 64bits format */ 4104 __le32 rx_bss_cycle_count_low; 4105 __le32 rx_bss_cycle_count_high; 4106 __le32 pdev_id; 4107 } __packed; 4108 4109 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4110 4111 struct wmi_vdev_install_key_compl_event { 4112 __le32 vdev_id; 4113 struct ath12k_wmi_mac_addr_params peer_macaddr; 4114 __le32 key_idx; 4115 __le32 key_flags; 4116 __le32 status; 4117 } __packed; 4118 4119 struct wmi_vdev_install_key_complete_arg { 4120 u32 vdev_id; 4121 const u8 *macaddr; 4122 u32 key_idx; 4123 u32 key_flags; 4124 u32 status; 4125 }; 4126 4127 struct wmi_peer_assoc_conf_event { 4128 __le32 vdev_id; 4129 struct ath12k_wmi_mac_addr_params peer_macaddr; 4130 } __packed; 4131 4132 struct wmi_peer_assoc_conf_arg { 4133 u32 vdev_id; 4134 const u8 *macaddr; 4135 }; 4136 4137 struct wmi_fils_discovery_event { 4138 __le32 vdev_id; 4139 __le32 fils_tt; 4140 __le32 tbtt; 4141 } __packed; 4142 4143 struct wmi_probe_resp_tx_status_event { 4144 __le32 vdev_id; 4145 __le32 tx_status; 4146 } __packed; 4147 4148 struct wmi_pdev_ctl_failsafe_chk_event { 4149 __le32 pdev_id; 4150 __le32 ctl_failsafe_status; 4151 } __packed; 4152 4153 struct ath12k_wmi_pdev_csa_event { 4154 __le32 pdev_id; 4155 __le32 current_switch_count; 4156 __le32 num_vdevs; 4157 } __packed; 4158 4159 struct ath12k_wmi_pdev_radar_event { 4160 __le32 pdev_id; 4161 __le32 detection_mode; 4162 __le32 chan_freq; 4163 __le32 chan_width; 4164 __le32 detector_id; 4165 __le32 segment_id; 4166 __le32 timestamp; 4167 __le32 is_chirp; 4168 a_sle32 freq_offset; 4169 a_sle32 sidx; 4170 } __packed; 4171 4172 struct wmi_pdev_temperature_event { 4173 /* temperature value in Celsius degree */ 4174 a_sle32 temp; 4175 __le32 pdev_id; 4176 } __packed; 4177 4178 #define WMI_RX_STATUS_OK 0x00 4179 #define WMI_RX_STATUS_ERR_CRC 0x01 4180 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4181 #define WMI_RX_STATUS_ERR_MIC 0x10 4182 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4183 4184 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4185 4186 struct ath12k_wmi_mgmt_rx_arg { 4187 u32 chan_freq; 4188 u32 channel; 4189 u32 snr; 4190 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4191 u32 rate; 4192 enum wmi_phy_mode phy_mode; 4193 u32 buf_len; 4194 int status; 4195 u32 flags; 4196 int rssi; 4197 u32 tsf_delta; 4198 u8 pdev_id; 4199 }; 4200 4201 #define ATH_MAX_ANTENNA 4 4202 4203 struct ath12k_wmi_mgmt_rx_params { 4204 __le32 channel; 4205 __le32 snr; 4206 __le32 rate; 4207 __le32 phy_mode; 4208 __le32 buf_len; 4209 __le32 status; 4210 __le32 rssi_ctl[ATH_MAX_ANTENNA]; 4211 __le32 flags; 4212 a_sle32 rssi; 4213 __le32 tsf_delta; 4214 __le32 rx_tsf_l32; 4215 __le32 rx_tsf_u32; 4216 __le32 pdev_id; 4217 __le32 chan_freq; 4218 } __packed; 4219 4220 #define MAX_ANTENNA_EIGHT 8 4221 4222 struct wmi_mgmt_tx_compl_event { 4223 __le32 desc_id; 4224 __le32 status; 4225 __le32 pdev_id; 4226 } __packed; 4227 4228 struct wmi_scan_event { 4229 __le32 event_type; /* %WMI_SCAN_EVENT_ */ 4230 __le32 reason; /* %WMI_SCAN_REASON_ */ 4231 __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4232 __le32 scan_req_id; 4233 __le32 scan_id; 4234 __le32 vdev_id; 4235 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4236 * In case of AP it is TSF of the AP vdev 4237 * In case of STA connected state, this is the TSF of the AP 4238 * In case of STA not connected, it will be the free running HW timer 4239 */ 4240 __le32 tsf_timestamp; 4241 } __packed; 4242 4243 struct wmi_peer_sta_kickout_arg { 4244 const u8 *mac_addr; 4245 }; 4246 4247 struct wmi_peer_sta_kickout_event { 4248 struct ath12k_wmi_mac_addr_params peer_macaddr; 4249 } __packed; 4250 4251 #define WMI_ROAM_REASON_MASK GENMASK(3, 0) 4252 #define WMI_ROAM_SUBNET_STATUS_MASK GENMASK(5, 4) 4253 4254 enum wmi_roam_reason { 4255 WMI_ROAM_REASON_BETTER_AP = 1, 4256 WMI_ROAM_REASON_BEACON_MISS = 2, 4257 WMI_ROAM_REASON_LOW_RSSI = 3, 4258 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4259 WMI_ROAM_REASON_HO_FAILED = 5, 4260 4261 /* keep last */ 4262 WMI_ROAM_REASON_MAX, 4263 }; 4264 4265 struct wmi_roam_event { 4266 __le32 vdev_id; 4267 __le32 reason; 4268 __le32 rssi; 4269 } __packed; 4270 4271 #define WMI_CHAN_INFO_START_RESP 0 4272 #define WMI_CHAN_INFO_END_RESP 1 4273 4274 struct wmi_chan_info_event { 4275 __le32 err_code; 4276 __le32 freq; 4277 __le32 cmd_flags; 4278 __le32 noise_floor; 4279 __le32 rx_clear_count; 4280 __le32 cycle_count; 4281 __le32 chan_tx_pwr_range; 4282 __le32 chan_tx_pwr_tp; 4283 __le32 rx_frame_count; 4284 __le32 my_bss_rx_cycle_count; 4285 __le32 rx_11b_mode_data_duration; 4286 __le32 tx_frame_cnt; 4287 __le32 mac_clk_mhz; 4288 __le32 vdev_id; 4289 } __packed; 4290 4291 struct ath12k_wmi_target_cap_arg { 4292 u32 phy_capability; 4293 u32 max_frag_entry; 4294 u32 num_rf_chains; 4295 u32 ht_cap_info; 4296 u32 vht_cap_info; 4297 u32 vht_supp_mcs; 4298 u32 hw_min_tx_power; 4299 u32 hw_max_tx_power; 4300 u32 sys_cap_info; 4301 u32 min_pkt_size_enable; 4302 u32 max_bcn_ie_size; 4303 u32 max_num_scan_channels; 4304 u32 max_supported_macs; 4305 u32 wmi_fw_sub_feat_caps; 4306 u32 txrx_chainmask; 4307 u32 default_dbs_hw_mode_index; 4308 u32 num_msdu_desc; 4309 }; 4310 4311 enum wmi_vdev_type { 4312 WMI_VDEV_TYPE_AP = 1, 4313 WMI_VDEV_TYPE_STA = 2, 4314 WMI_VDEV_TYPE_IBSS = 3, 4315 WMI_VDEV_TYPE_MONITOR = 4, 4316 }; 4317 4318 enum wmi_vdev_subtype { 4319 WMI_VDEV_SUBTYPE_NONE, 4320 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4321 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4322 WMI_VDEV_SUBTYPE_P2P_GO, 4323 WMI_VDEV_SUBTYPE_PROXY_STA, 4324 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4325 WMI_VDEV_SUBTYPE_MESH_11S, 4326 }; 4327 4328 enum wmi_sta_powersave_param { 4329 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4330 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4331 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4332 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4333 WMI_STA_PS_PARAM_UAPSD = 4, 4334 }; 4335 4336 enum wmi_sta_ps_param_uapsd { 4337 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4338 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4339 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4340 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4341 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4342 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4343 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4344 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4345 }; 4346 4347 enum wmi_sta_ps_param_tx_wake_threshold { 4348 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4349 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4350 4351 /* Values greater than one indicate that many TX attempts per beacon 4352 * interval before the STA will wake up 4353 */ 4354 }; 4355 4356 /* The maximum number of PS-Poll frames the FW will send in response to 4357 * traffic advertised in TIM before waking up (by sending a null frame with PS 4358 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4359 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4360 * parameter is used when the RX wake policy is 4361 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4362 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4363 */ 4364 enum wmi_sta_ps_param_pspoll_count { 4365 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4366 /* Values greater than 0 indicate the maximum number of PS-Poll frames 4367 * FW will send before waking up. 4368 */ 4369 }; 4370 4371 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4372 enum wmi_ap_ps_param_uapsd { 4373 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4374 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4375 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4376 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4377 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4378 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4379 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4380 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4381 }; 4382 4383 /* U-APSD maximum service period of peer station */ 4384 enum wmi_ap_ps_peer_param_max_sp { 4385 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4386 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4387 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4388 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4389 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4390 }; 4391 4392 enum wmi_ap_ps_peer_param { 4393 /** Set uapsd configuration for a given peer. 4394 * 4395 * This include the delivery and trigger enabled state for each AC. 4396 * The host MLME needs to set this based on AP capability and stations 4397 * request Set in the association request received from the station. 4398 * 4399 * Lower 8 bits of the value specify the UAPSD configuration. 4400 * 4401 * (see enum wmi_ap_ps_param_uapsd) 4402 * The default value is 0. 4403 */ 4404 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4405 4406 /** 4407 * Set the service period for a UAPSD capable station 4408 * 4409 * The service period from wme ie in the (re)assoc request frame. 4410 * 4411 * (see enum wmi_ap_ps_peer_param_max_sp) 4412 */ 4413 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4414 4415 /** Time in seconds for aging out buffered frames 4416 * for STA in power save 4417 */ 4418 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4419 4420 /** Specify frame types that are considered SIFS 4421 * RESP trigger frame 4422 */ 4423 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4424 4425 /** Specifies the trigger state of TID. 4426 * Valid only for UAPSD frame type 4427 */ 4428 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4429 4430 /* Specifies the WNM sleep state of a STA */ 4431 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4432 }; 4433 4434 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4435 4436 #define WMI_MAX_KEY_INDEX 3 4437 #define WMI_MAX_KEY_LEN 32 4438 4439 enum wmi_key_type { 4440 WMI_KEY_PAIRWISE = 0, 4441 WMI_KEY_GROUP = 1, 4442 }; 4443 4444 enum wmi_cipher_type { 4445 WMI_CIPHER_NONE = 0, /* clear key */ 4446 WMI_CIPHER_WEP = 1, 4447 WMI_CIPHER_TKIP = 2, 4448 WMI_CIPHER_AES_OCB = 3, 4449 WMI_CIPHER_AES_CCM = 4, 4450 WMI_CIPHER_WAPI = 5, 4451 WMI_CIPHER_CKIP = 6, 4452 WMI_CIPHER_AES_CMAC = 7, 4453 WMI_CIPHER_ANY = 8, 4454 WMI_CIPHER_AES_GCM = 9, 4455 WMI_CIPHER_AES_GMAC = 10, 4456 }; 4457 4458 /* Value to disable fixed rate setting */ 4459 #define WMI_FIXED_RATE_NONE (0xffff) 4460 4461 #define ATH12K_RC_VERSION_OFFSET 28 4462 #define ATH12K_RC_PREAMBLE_OFFSET 8 4463 #define ATH12K_RC_NSS_OFFSET 5 4464 4465 #define ATH12K_HW_RATE_CODE(rate, nss, preamble) \ 4466 ((1 << ATH12K_RC_VERSION_OFFSET) | \ 4467 ((nss) << ATH12K_RC_NSS_OFFSET) | \ 4468 ((preamble) << ATH12K_RC_PREAMBLE_OFFSET) | \ 4469 (rate)) 4470 4471 /* Preamble types to be used with VDEV fixed rate configuration */ 4472 enum wmi_rate_preamble { 4473 WMI_RATE_PREAMBLE_OFDM, 4474 WMI_RATE_PREAMBLE_CCK, 4475 WMI_RATE_PREAMBLE_HT, 4476 WMI_RATE_PREAMBLE_VHT, 4477 WMI_RATE_PREAMBLE_HE, 4478 }; 4479 4480 /** 4481 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4482 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled. 4483 * @WMI_USE_RTS_CTS: RTS/CTS Enabled. 4484 * @WMI_USE_CTS2SELF: CTS to self protection Enabled. 4485 */ 4486 enum wmi_rtscts_prot_mode { 4487 WMI_RTS_CTS_DISABLED = 0, 4488 WMI_USE_RTS_CTS = 1, 4489 WMI_USE_CTS2SELF = 2, 4490 }; 4491 4492 /** 4493 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4494 * protection mode. 4495 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS 4496 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS 4497 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS, 4498 * but if there's a sw retry, both the rate 4499 * series will use RTS-CTS. 4500 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU. 4501 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series. 4502 */ 4503 enum wmi_rtscts_profile { 4504 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4505 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4506 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4507 WMI_RTSCTS_ERP = 3, 4508 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4509 }; 4510 4511 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4512 4513 enum wmi_sta_ps_param_rx_wake_policy { 4514 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4515 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4516 }; 4517 4518 /* Do not change existing values! Used by ath12k_frame_mode parameter 4519 * module parameter. 4520 */ 4521 enum ath12k_hw_txrx_mode { 4522 ATH12K_HW_TXRX_RAW = 0, 4523 ATH12K_HW_TXRX_NATIVE_WIFI = 1, 4524 ATH12K_HW_TXRX_ETHERNET = 2, 4525 }; 4526 4527 struct wmi_wmm_params { 4528 __le32 tlv_header; 4529 __le32 cwmin; 4530 __le32 cwmax; 4531 __le32 aifs; 4532 __le32 txoplimit; 4533 __le32 acm; 4534 __le32 no_ack; 4535 } __packed; 4536 4537 struct wmi_wmm_params_arg { 4538 u8 acm; 4539 u8 aifs; 4540 u16 cwmin; 4541 u16 cwmax; 4542 u16 txop; 4543 u8 no_ack; 4544 }; 4545 4546 struct wmi_vdev_set_wmm_params_cmd { 4547 __le32 tlv_header; 4548 __le32 vdev_id; 4549 struct wmi_wmm_params wmm_params[4]; 4550 __le32 wmm_param_type; 4551 } __packed; 4552 4553 struct wmi_wmm_params_all_arg { 4554 struct wmi_wmm_params_arg ac_be; 4555 struct wmi_wmm_params_arg ac_bk; 4556 struct wmi_wmm_params_arg ac_vi; 4557 struct wmi_wmm_params_arg ac_vo; 4558 }; 4559 4560 #define ATH12K_TWT_DEF_STA_CONG_TIMER_MS 5000 4561 #define ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4562 #define ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4563 #define ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4564 #define ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4565 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4566 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4567 #define ATH12K_TWT_DEF_MIN_NO_STA_SETUP 10 4568 #define ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4569 #define ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4570 #define ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4571 #define ATH12K_TWT_DEF_MAX_NO_STA_TWT 500 4572 #define ATH12K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4573 #define ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4574 #define ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4575 4576 struct wmi_twt_enable_params_cmd { 4577 __le32 tlv_header; 4578 __le32 pdev_id; 4579 __le32 sta_cong_timer_ms; 4580 __le32 mbss_support; 4581 __le32 default_slot_size; 4582 __le32 congestion_thresh_setup; 4583 __le32 congestion_thresh_teardown; 4584 __le32 congestion_thresh_critical; 4585 __le32 interference_thresh_teardown; 4586 __le32 interference_thresh_setup; 4587 __le32 min_no_sta_setup; 4588 __le32 min_no_sta_teardown; 4589 __le32 no_of_bcast_mcast_slots; 4590 __le32 min_no_twt_slots; 4591 __le32 max_no_sta_twt; 4592 __le32 mode_check_interval; 4593 __le32 add_sta_slot_interval; 4594 __le32 remove_sta_slot_interval; 4595 } __packed; 4596 4597 struct wmi_twt_disable_params_cmd { 4598 __le32 tlv_header; 4599 __le32 pdev_id; 4600 } __packed; 4601 4602 struct wmi_obss_spatial_reuse_params_cmd { 4603 __le32 tlv_header; 4604 __le32 pdev_id; 4605 __le32 enable; 4606 a_sle32 obss_min; 4607 a_sle32 obss_max; 4608 __le32 vdev_id; 4609 } __packed; 4610 4611 #define ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 4612 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 4613 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION 1 4614 4615 #define ATH12K_BSS_COLOR_STA_PERIODS 10000 4616 #define ATH12K_BSS_COLOR_AP_PERIODS 5000 4617 4618 struct wmi_obss_color_collision_cfg_params_cmd { 4619 __le32 tlv_header; 4620 __le32 vdev_id; 4621 __le32 flags; 4622 __le32 evt_type; 4623 __le32 current_bss_color; 4624 __le32 detection_period_ms; 4625 __le32 scan_period_ms; 4626 __le32 free_slot_expiry_time_ms; 4627 } __packed; 4628 4629 struct wmi_bss_color_change_enable_params_cmd { 4630 __le32 tlv_header; 4631 __le32 vdev_id; 4632 __le32 enable; 4633 } __packed; 4634 4635 #define ATH12K_IPV4_TH_SEED_SIZE 5 4636 #define ATH12K_IPV6_TH_SEED_SIZE 11 4637 4638 struct ath12k_wmi_pdev_lro_config_cmd { 4639 __le32 tlv_header; 4640 __le32 lro_enable; 4641 __le32 res; 4642 u32 th_4[ATH12K_IPV4_TH_SEED_SIZE]; 4643 u32 th_6[ATH12K_IPV6_TH_SEED_SIZE]; 4644 __le32 pdev_id; 4645 } __packed; 4646 4647 #define ATH12K_WMI_SPECTRAL_COUNT_DEFAULT 0 4648 #define ATH12K_WMI_SPECTRAL_PERIOD_DEFAULT 224 4649 #define ATH12K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 4650 #define ATH12K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 4651 #define ATH12K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 4652 #define ATH12K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 4653 #define ATH12K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 4654 #define ATH12K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 4655 #define ATH12K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 4656 #define ATH12K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 4657 #define ATH12K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 4658 #define ATH12K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 4659 #define ATH12K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 4660 #define ATH12K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 4661 #define ATH12K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 4662 #define ATH12K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 4663 #define ATH12K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 4664 #define ATH12K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 4665 4666 struct ath12k_wmi_vdev_spectral_conf_arg { 4667 u32 vdev_id; 4668 u32 scan_count; 4669 u32 scan_period; 4670 u32 scan_priority; 4671 u32 scan_fft_size; 4672 u32 scan_gc_ena; 4673 u32 scan_restart_ena; 4674 u32 scan_noise_floor_ref; 4675 u32 scan_init_delay; 4676 u32 scan_nb_tone_thr; 4677 u32 scan_str_bin_thr; 4678 u32 scan_wb_rpt_mode; 4679 u32 scan_rssi_rpt_mode; 4680 u32 scan_rssi_thr; 4681 u32 scan_pwr_format; 4682 u32 scan_rpt_mode; 4683 u32 scan_bin_scale; 4684 u32 scan_dbm_adj; 4685 u32 scan_chn_mask; 4686 }; 4687 4688 struct ath12k_wmi_vdev_spectral_conf_cmd { 4689 __le32 tlv_header; 4690 __le32 vdev_id; 4691 __le32 scan_count; 4692 __le32 scan_period; 4693 __le32 scan_priority; 4694 __le32 scan_fft_size; 4695 __le32 scan_gc_ena; 4696 __le32 scan_restart_ena; 4697 __le32 scan_noise_floor_ref; 4698 __le32 scan_init_delay; 4699 __le32 scan_nb_tone_thr; 4700 __le32 scan_str_bin_thr; 4701 __le32 scan_wb_rpt_mode; 4702 __le32 scan_rssi_rpt_mode; 4703 __le32 scan_rssi_thr; 4704 __le32 scan_pwr_format; 4705 __le32 scan_rpt_mode; 4706 __le32 scan_bin_scale; 4707 __le32 scan_dbm_adj; 4708 __le32 scan_chn_mask; 4709 } __packed; 4710 4711 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 4712 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 4713 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 4714 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 4715 4716 struct ath12k_wmi_vdev_spectral_enable_cmd { 4717 __le32 tlv_header; 4718 __le32 vdev_id; 4719 __le32 trigger_cmd; 4720 __le32 enable_cmd; 4721 } __packed; 4722 4723 struct ath12k_wmi_pdev_dma_ring_cfg_arg { 4724 u32 tlv_header; 4725 u32 pdev_id; 4726 u32 module_id; 4727 u32 base_paddr_lo; 4728 u32 base_paddr_hi; 4729 u32 head_idx_paddr_lo; 4730 u32 head_idx_paddr_hi; 4731 u32 tail_idx_paddr_lo; 4732 u32 tail_idx_paddr_hi; 4733 u32 num_elems; 4734 u32 buf_size; 4735 u32 num_resp_per_event; 4736 u32 event_timeout_ms; 4737 }; 4738 4739 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd { 4740 __le32 tlv_header; 4741 __le32 pdev_id; 4742 __le32 module_id; /* see enum wmi_direct_buffer_module */ 4743 __le32 base_paddr_lo; 4744 __le32 base_paddr_hi; 4745 __le32 head_idx_paddr_lo; 4746 __le32 head_idx_paddr_hi; 4747 __le32 tail_idx_paddr_lo; 4748 __le32 tail_idx_paddr_hi; 4749 __le32 num_elems; /* Number of elems in the ring */ 4750 __le32 buf_size; /* size of allocated buffer in bytes */ 4751 4752 /* Number of wmi_dma_buf_release_entry packed together */ 4753 __le32 num_resp_per_event; 4754 4755 /* Target should timeout and send whatever resp 4756 * it has if this time expires, units in milliseconds 4757 */ 4758 __le32 event_timeout_ms; 4759 } __packed; 4760 4761 struct ath12k_wmi_dma_buf_release_fixed_params { 4762 __le32 pdev_id; 4763 __le32 module_id; 4764 __le32 num_buf_release_entry; 4765 __le32 num_meta_data_entry; 4766 } __packed; 4767 4768 struct ath12k_wmi_dma_buf_release_entry_params { 4769 __le32 tlv_header; 4770 __le32 paddr_lo; 4771 4772 /* Bits 11:0: address of data 4773 * Bits 31:12: host context data 4774 */ 4775 __le32 paddr_hi; 4776 } __packed; 4777 4778 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 4779 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 4780 4781 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 4782 4783 struct ath12k_wmi_dma_buf_release_meta_data_params { 4784 __le32 tlv_header; 4785 a_sle32 noise_floor[WMI_MAX_CHAINS]; 4786 __le32 reset_delay; 4787 __le32 freq1; 4788 __le32 freq2; 4789 __le32 ch_width; 4790 } __packed; 4791 4792 enum wmi_fils_discovery_cmd_type { 4793 WMI_FILS_DISCOVERY_CMD, 4794 WMI_UNSOL_BCAST_PROBE_RESP, 4795 }; 4796 4797 struct wmi_fils_discovery_cmd { 4798 __le32 tlv_header; 4799 __le32 vdev_id; 4800 __le32 interval; 4801 __le32 config; /* enum wmi_fils_discovery_cmd_type */ 4802 } __packed; 4803 4804 struct wmi_fils_discovery_tmpl_cmd { 4805 __le32 tlv_header; 4806 __le32 vdev_id; 4807 __le32 buf_len; 4808 } __packed; 4809 4810 struct wmi_probe_tmpl_cmd { 4811 __le32 tlv_header; 4812 __le32 vdev_id; 4813 __le32 buf_len; 4814 } __packed; 4815 4816 #define MAX_RADIOS 2 4817 4818 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 4819 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 4820 4821 struct ath12k_wmi_pdev { 4822 struct ath12k_wmi_base *wmi_ab; 4823 enum ath12k_htc_ep_id eid; 4824 u32 rx_decap_mode; 4825 }; 4826 4827 struct ath12k_wmi_base { 4828 struct ath12k_base *ab; 4829 struct ath12k_wmi_pdev wmi[MAX_RADIOS]; 4830 enum ath12k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 4831 u32 max_msg_len[MAX_RADIOS]; 4832 4833 struct completion service_ready; 4834 struct completion unified_ready; 4835 DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE); 4836 wait_queue_head_t tx_credits_wq; 4837 u32 num_mem_chunks; 4838 u32 rx_decap_mode; 4839 struct ath12k_wmi_host_mem_chunk_arg mem_chunks[WMI_MAX_MEM_REQS]; 4840 4841 enum wmi_host_hw_mode_config_type preferred_hw_mode; 4842 4843 struct ath12k_wmi_target_cap_arg *targ_cap; 4844 }; 4845 4846 struct wmi_pdev_set_bios_interface_cmd { 4847 __le32 tlv_header; 4848 __le32 pdev_id; 4849 __le32 param_type_id; 4850 __le32 length; 4851 } __packed; 4852 4853 enum wmi_bios_param_type { 4854 WMI_BIOS_PARAM_CCA_THRESHOLD_TYPE = 0, 4855 WMI_BIOS_PARAM_TAS_CONFIG_TYPE = 1, 4856 WMI_BIOS_PARAM_TAS_DATA_TYPE = 2, 4857 4858 /* bandedge control power */ 4859 WMI_BIOS_PARAM_TYPE_BANDEDGE = 3, 4860 4861 WMI_BIOS_PARAM_TYPE_MAX, 4862 }; 4863 4864 struct wmi_pdev_set_bios_sar_table_cmd { 4865 __le32 tlv_header; 4866 __le32 pdev_id; 4867 __le32 sar_len; 4868 __le32 dbs_backoff_len; 4869 } __packed; 4870 4871 struct wmi_pdev_set_bios_geo_table_cmd { 4872 __le32 tlv_header; 4873 __le32 pdev_id; 4874 __le32 geo_len; 4875 } __packed; 4876 4877 #define ATH12K_FW_STATS_BUF_SIZE (1024 * 1024) 4878 4879 enum wmi_sys_cap_info_flags { 4880 WMI_SYS_CAP_INFO_RXTX_LED = BIT(0), 4881 WMI_SYS_CAP_INFO_RFKILL = BIT(1), 4882 }; 4883 4884 #define WMI_RFKILL_CFG_GPIO_PIN_NUM GENMASK(5, 0) 4885 #define WMI_RFKILL_CFG_RADIO_LEVEL BIT(6) 4886 #define WMI_RFKILL_CFG_PIN_AS_GPIO GENMASK(10, 7) 4887 4888 enum wmi_rfkill_enable_radio { 4889 WMI_RFKILL_ENABLE_RADIO_ON = 0, 4890 WMI_RFKILL_ENABLE_RADIO_OFF = 1, 4891 }; 4892 4893 enum wmi_rfkill_radio_state { 4894 WMI_RFKILL_RADIO_STATE_OFF = 1, 4895 WMI_RFKILL_RADIO_STATE_ON = 2, 4896 }; 4897 4898 struct wmi_rfkill_state_change_event { 4899 __le32 gpio_pin_num; 4900 __le32 int_type; 4901 __le32 radio_state; 4902 } __packed; 4903 4904 struct wmi_twt_enable_event { 4905 __le32 pdev_id; 4906 __le32 status; 4907 } __packed; 4908 4909 struct wmi_twt_disable_event { 4910 __le32 pdev_id; 4911 __le32 status; 4912 } __packed; 4913 4914 /* WOW structures */ 4915 enum wmi_wow_wakeup_event { 4916 WOW_BMISS_EVENT = 0, 4917 WOW_BETTER_AP_EVENT, 4918 WOW_DEAUTH_RECVD_EVENT, 4919 WOW_MAGIC_PKT_RECVD_EVENT, 4920 WOW_GTK_ERR_EVENT, 4921 WOW_FOURWAY_HSHAKE_EVENT, 4922 WOW_EAPOL_RECVD_EVENT, 4923 WOW_NLO_DETECTED_EVENT, 4924 WOW_DISASSOC_RECVD_EVENT, 4925 WOW_PATTERN_MATCH_EVENT, 4926 WOW_CSA_IE_EVENT, 4927 WOW_PROBE_REQ_WPS_IE_EVENT, 4928 WOW_AUTH_REQ_EVENT, 4929 WOW_ASSOC_REQ_EVENT, 4930 WOW_HTT_EVENT, 4931 WOW_RA_MATCH_EVENT, 4932 WOW_HOST_AUTO_SHUTDOWN_EVENT, 4933 WOW_IOAC_MAGIC_EVENT, 4934 WOW_IOAC_SHORT_EVENT, 4935 WOW_IOAC_EXTEND_EVENT, 4936 WOW_IOAC_TIMER_EVENT, 4937 WOW_DFS_PHYERR_RADAR_EVENT, 4938 WOW_BEACON_EVENT, 4939 WOW_CLIENT_KICKOUT_EVENT, 4940 WOW_EVENT_MAX, 4941 }; 4942 4943 enum wmi_wow_interface_cfg { 4944 WOW_IFACE_PAUSE_ENABLED, 4945 WOW_IFACE_PAUSE_DISABLED 4946 }; 4947 4948 #define C2S(x) case x: return #x 4949 wow_wakeup_event(enum wmi_wow_wakeup_event ev)4950 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 4951 { 4952 switch (ev) { 4953 C2S(WOW_BMISS_EVENT); 4954 C2S(WOW_BETTER_AP_EVENT); 4955 C2S(WOW_DEAUTH_RECVD_EVENT); 4956 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 4957 C2S(WOW_GTK_ERR_EVENT); 4958 C2S(WOW_FOURWAY_HSHAKE_EVENT); 4959 C2S(WOW_EAPOL_RECVD_EVENT); 4960 C2S(WOW_NLO_DETECTED_EVENT); 4961 C2S(WOW_DISASSOC_RECVD_EVENT); 4962 C2S(WOW_PATTERN_MATCH_EVENT); 4963 C2S(WOW_CSA_IE_EVENT); 4964 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 4965 C2S(WOW_AUTH_REQ_EVENT); 4966 C2S(WOW_ASSOC_REQ_EVENT); 4967 C2S(WOW_HTT_EVENT); 4968 C2S(WOW_RA_MATCH_EVENT); 4969 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 4970 C2S(WOW_IOAC_MAGIC_EVENT); 4971 C2S(WOW_IOAC_SHORT_EVENT); 4972 C2S(WOW_IOAC_EXTEND_EVENT); 4973 C2S(WOW_IOAC_TIMER_EVENT); 4974 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 4975 C2S(WOW_BEACON_EVENT); 4976 C2S(WOW_CLIENT_KICKOUT_EVENT); 4977 C2S(WOW_EVENT_MAX); 4978 default: 4979 return NULL; 4980 } 4981 } 4982 4983 enum wmi_wow_wake_reason { 4984 WOW_REASON_UNSPECIFIED = -1, 4985 WOW_REASON_NLOD = 0, 4986 WOW_REASON_AP_ASSOC_LOST, 4987 WOW_REASON_LOW_RSSI, 4988 WOW_REASON_DEAUTH_RECVD, 4989 WOW_REASON_DISASSOC_RECVD, 4990 WOW_REASON_GTK_HS_ERR, 4991 WOW_REASON_EAP_REQ, 4992 WOW_REASON_FOURWAY_HS_RECV, 4993 WOW_REASON_TIMER_INTR_RECV, 4994 WOW_REASON_PATTERN_MATCH_FOUND, 4995 WOW_REASON_RECV_MAGIC_PATTERN, 4996 WOW_REASON_P2P_DISC, 4997 WOW_REASON_WLAN_HB, 4998 WOW_REASON_CSA_EVENT, 4999 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5000 WOW_REASON_AUTH_REQ_RECV, 5001 WOW_REASON_ASSOC_REQ_RECV, 5002 WOW_REASON_HTT_EVENT, 5003 WOW_REASON_RA_MATCH, 5004 WOW_REASON_HOST_AUTO_SHUTDOWN, 5005 WOW_REASON_IOAC_MAGIC_EVENT, 5006 WOW_REASON_IOAC_SHORT_EVENT, 5007 WOW_REASON_IOAC_EXTEND_EVENT, 5008 WOW_REASON_IOAC_TIMER_EVENT, 5009 WOW_REASON_ROAM_HO, 5010 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5011 WOW_REASON_BEACON_RECV, 5012 WOW_REASON_CLIENT_KICKOUT_EVENT, 5013 WOW_REASON_PAGE_FAULT = 0x3a, 5014 WOW_REASON_DEBUG_TEST = 0xFF, 5015 }; 5016 wow_reason(enum wmi_wow_wake_reason reason)5017 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5018 { 5019 switch (reason) { 5020 C2S(WOW_REASON_UNSPECIFIED); 5021 C2S(WOW_REASON_NLOD); 5022 C2S(WOW_REASON_AP_ASSOC_LOST); 5023 C2S(WOW_REASON_LOW_RSSI); 5024 C2S(WOW_REASON_DEAUTH_RECVD); 5025 C2S(WOW_REASON_DISASSOC_RECVD); 5026 C2S(WOW_REASON_GTK_HS_ERR); 5027 C2S(WOW_REASON_EAP_REQ); 5028 C2S(WOW_REASON_FOURWAY_HS_RECV); 5029 C2S(WOW_REASON_TIMER_INTR_RECV); 5030 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5031 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5032 C2S(WOW_REASON_P2P_DISC); 5033 C2S(WOW_REASON_WLAN_HB); 5034 C2S(WOW_REASON_CSA_EVENT); 5035 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5036 C2S(WOW_REASON_AUTH_REQ_RECV); 5037 C2S(WOW_REASON_ASSOC_REQ_RECV); 5038 C2S(WOW_REASON_HTT_EVENT); 5039 C2S(WOW_REASON_RA_MATCH); 5040 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5041 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5042 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5043 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5044 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5045 C2S(WOW_REASON_ROAM_HO); 5046 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5047 C2S(WOW_REASON_BEACON_RECV); 5048 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5049 C2S(WOW_REASON_PAGE_FAULT); 5050 C2S(WOW_REASON_DEBUG_TEST); 5051 default: 5052 return NULL; 5053 } 5054 } 5055 5056 #undef C2S 5057 5058 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE 148 5059 #define WOW_DEFAULT_BITMASK_SIZE 148 5060 5061 #define WOW_MIN_PATTERN_SIZE 1 5062 #define WOW_MAX_PATTERN_SIZE 148 5063 #define WOW_MAX_PKT_OFFSET 128 5064 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \ 5065 sizeof(struct rfc1042_hdr)) 5066 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \ 5067 offsetof(struct ieee80211_hdr_3addr, addr1)) 5068 5069 struct wmi_wow_bitmap_pattern_params { 5070 __le32 tlv_header; 5071 u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE]; 5072 u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE]; 5073 __le32 pattern_offset; 5074 __le32 pattern_len; 5075 __le32 bitmask_len; 5076 __le32 pattern_id; 5077 } __packed; 5078 5079 struct wmi_wow_add_pattern_cmd { 5080 __le32 tlv_header; 5081 __le32 vdev_id; 5082 __le32 pattern_id; 5083 __le32 pattern_type; 5084 } __packed; 5085 5086 struct wmi_wow_del_pattern_cmd { 5087 __le32 tlv_header; 5088 __le32 vdev_id; 5089 __le32 pattern_id; 5090 __le32 pattern_type; 5091 } __packed; 5092 5093 enum wmi_tlv_pattern_type { 5094 WOW_PATTERN_MIN = 0, 5095 WOW_BITMAP_PATTERN = WOW_PATTERN_MIN, 5096 WOW_IPV4_SYNC_PATTERN, 5097 WOW_IPV6_SYNC_PATTERN, 5098 WOW_WILD_CARD_PATTERN, 5099 WOW_TIMER_PATTERN, 5100 WOW_MAGIC_PATTERN, 5101 WOW_IPV6_RA_PATTERN, 5102 WOW_IOAC_PKT_PATTERN, 5103 WOW_IOAC_TMR_PATTERN, 5104 WOW_PATTERN_MAX 5105 }; 5106 5107 struct wmi_wow_add_del_event_cmd { 5108 __le32 tlv_header; 5109 __le32 vdev_id; 5110 __le32 is_add; 5111 __le32 event_bitmap; 5112 } __packed; 5113 5114 struct wmi_wow_enable_cmd { 5115 __le32 tlv_header; 5116 __le32 enable; 5117 __le32 pause_iface_config; 5118 __le32 flags; 5119 } __packed; 5120 5121 struct wmi_wow_host_wakeup_cmd { 5122 __le32 tlv_header; 5123 __le32 reserved; 5124 } __packed; 5125 5126 struct wmi_wow_ev_param { 5127 __le32 vdev_id; 5128 __le32 flag; 5129 __le32 wake_reason; 5130 __le32 data_len; 5131 } __packed; 5132 5133 struct wmi_wow_ev_pg_fault_param { 5134 __le32 len; 5135 u8 data[]; 5136 } __packed; 5137 5138 struct wmi_wow_ev_arg { 5139 enum wmi_wow_wake_reason wake_reason; 5140 }; 5141 5142 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2 5143 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200 5144 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100 5145 #define WMI_PNO_MAX_NETW_CHANNELS 26 5146 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60 5147 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID 5148 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN 5149 5150 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */ 5151 #define WMI_PNO_MAX_PB_REQ_SIZE 450 5152 5153 #define WMI_PNO_24GHZ_DEFAULT_CH 1 5154 #define WMI_PNO_5GHZ_DEFAULT_CH 36 5155 5156 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40 5157 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110 5158 5159 /* SSID broadcast type */ 5160 enum wmi_ssid_bcast_type { 5161 BCAST_UNKNOWN = 0, 5162 BCAST_NORMAL = 1, 5163 BCAST_HIDDEN = 2, 5164 }; 5165 5166 #define WMI_NLO_MAX_SSIDS 16 5167 #define WMI_NLO_MAX_CHAN 48 5168 5169 #define WMI_NLO_CONFIG_STOP BIT(0) 5170 #define WMI_NLO_CONFIG_START BIT(1) 5171 #define WMI_NLO_CONFIG_RESET BIT(2) 5172 #define WMI_NLO_CONFIG_SLOW_SCAN BIT(4) 5173 #define WMI_NLO_CONFIG_FAST_SCAN BIT(5) 5174 #define WMI_NLO_CONFIG_SSID_HIDE_EN BIT(6) 5175 5176 /* This bit is used to indicate if EPNO or supplicant PNO is enabled. 5177 * Only one of them can be enabled at a given time 5178 */ 5179 #define WMI_NLO_CONFIG_ENLO BIT(7) 5180 #define WMI_NLO_CONFIG_SCAN_PASSIVE BIT(8) 5181 #define WMI_NLO_CONFIG_ENLO_RESET BIT(9) 5182 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ BIT(10) 5183 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ BIT(11) 5184 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12) 5185 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG BIT(13) 5186 5187 struct wmi_nlo_ssid_params { 5188 __le32 valid; 5189 struct ath12k_wmi_ssid_params ssid; 5190 } __packed; 5191 5192 struct wmi_nlo_enc_params { 5193 __le32 valid; 5194 __le32 enc_type; 5195 } __packed; 5196 5197 struct wmi_nlo_auth_params { 5198 __le32 valid; 5199 __le32 auth_type; 5200 } __packed; 5201 5202 struct wmi_nlo_bcast_nw_params { 5203 __le32 valid; 5204 __le32 bcast_nw_type; 5205 } __packed; 5206 5207 struct wmi_nlo_rssi_params { 5208 __le32 valid; 5209 __le32 rssi; 5210 } __packed; 5211 5212 struct nlo_configured_params { 5213 /* TLV tag and len;*/ 5214 __le32 tlv_header; 5215 struct wmi_nlo_ssid_params ssid; 5216 struct wmi_nlo_enc_params enc_type; 5217 struct wmi_nlo_auth_params auth_type; 5218 struct wmi_nlo_rssi_params rssi_cond; 5219 5220 /* indicates if the SSID is hidden or not */ 5221 struct wmi_nlo_bcast_nw_params bcast_nw_type; 5222 } __packed; 5223 5224 struct wmi_network_type_arg { 5225 struct cfg80211_ssid ssid; 5226 u32 authentication; 5227 u32 encryption; 5228 u32 bcast_nw_type; 5229 u8 channel_count; 5230 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX]; 5231 s32 rssi_threshold; 5232 }; 5233 5234 struct wmi_pno_scan_req_arg { 5235 u8 enable; 5236 u8 vdev_id; 5237 u8 uc_networks_count; 5238 struct wmi_network_type_arg a_networks[WMI_PNO_MAX_SUPP_NETWORKS]; 5239 u32 fast_scan_period; 5240 u32 slow_scan_period; 5241 u8 fast_scan_max_cycles; 5242 5243 bool do_passive_scan; 5244 5245 u32 delay_start_time; 5246 u32 active_min_time; 5247 u32 active_max_time; 5248 u32 passive_min_time; 5249 u32 passive_max_time; 5250 5251 /* mac address randomization attributes */ 5252 u32 enable_pno_scan_randomization; 5253 u8 mac_addr[ETH_ALEN]; 5254 u8 mac_addr_mask[ETH_ALEN]; 5255 }; 5256 5257 struct wmi_wow_nlo_config_cmd { 5258 __le32 tlv_header; 5259 __le32 flags; 5260 __le32 vdev_id; 5261 __le32 fast_scan_max_cycles; 5262 __le32 active_dwell_time; 5263 __le32 passive_dwell_time; 5264 __le32 probe_bundle_size; 5265 5266 /* ART = IRT */ 5267 __le32 rest_time; 5268 5269 /* max value that can be reached after scan_backoff_multiplier */ 5270 __le32 max_rest_time; 5271 5272 __le32 scan_backoff_multiplier; 5273 __le32 fast_scan_period; 5274 5275 /* specific to windows */ 5276 __le32 slow_scan_period; 5277 5278 __le32 no_of_ssids; 5279 5280 __le32 num_of_channels; 5281 5282 /* NLO scan start delay time in milliseconds */ 5283 __le32 delay_start_time; 5284 5285 /* MAC Address to use in Probe Req as SA */ 5286 struct ath12k_wmi_mac_addr_params mac_addr; 5287 5288 /* Mask on which MAC has to be randomized */ 5289 struct ath12k_wmi_mac_addr_params mac_mask; 5290 5291 /* IE bitmap to use in Probe Req */ 5292 __le32 ie_bitmap[8]; 5293 5294 /* Number of vendor OUIs. In the TLV vendor_oui[] */ 5295 __le32 num_vendor_oui; 5296 5297 /* Number of connected NLO band preferences */ 5298 __le32 num_cnlo_band_pref; 5299 5300 /* The TLVs will follow. 5301 * nlo_configured_params nlo_list[]; 5302 * u32 channel_list[num_of_channels]; 5303 */ 5304 } __packed; 5305 5306 /* Definition of HW data filtering */ 5307 enum hw_data_filter_type { 5308 WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0), 5309 WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1), 5310 }; 5311 5312 struct wmi_hw_data_filter_cmd { 5313 __le32 tlv_header; 5314 __le32 vdev_id; 5315 __le32 enable; 5316 __le32 hw_filter_bitmap; 5317 } __packed; 5318 5319 struct wmi_hw_data_filter_arg { 5320 u32 vdev_id; 5321 bool enable; 5322 u32 hw_filter_bitmap; 5323 }; 5324 5325 #define WMI_IPV6_UC_TYPE 0 5326 #define WMI_IPV6_AC_TYPE 1 5327 5328 #define WMI_IPV6_MAX_COUNT 16 5329 #define WMI_IPV4_MAX_COUNT 2 5330 5331 struct wmi_arp_ns_offload_arg { 5332 u8 ipv4_addr[WMI_IPV4_MAX_COUNT][4]; 5333 u32 ipv4_count; 5334 u32 ipv6_count; 5335 u8 ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5336 u8 self_ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5337 u8 ipv6_type[WMI_IPV6_MAX_COUNT]; 5338 bool ipv6_valid[WMI_IPV6_MAX_COUNT]; 5339 u8 mac_addr[ETH_ALEN]; 5340 }; 5341 5342 #define WMI_MAX_NS_OFFLOADS 2 5343 #define WMI_MAX_ARP_OFFLOADS 2 5344 5345 #define WMI_ARPOL_FLAGS_VALID BIT(0) 5346 #define WMI_ARPOL_FLAGS_MAC_VALID BIT(1) 5347 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID BIT(2) 5348 5349 struct wmi_arp_offload_params { 5350 __le32 tlv_header; 5351 __le32 flags; 5352 u8 target_ipaddr[4]; 5353 u8 remote_ipaddr[4]; 5354 struct ath12k_wmi_mac_addr_params target_mac; 5355 } __packed; 5356 5357 #define WMI_NSOL_FLAGS_VALID BIT(0) 5358 #define WMI_NSOL_FLAGS_MAC_VALID BIT(1) 5359 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID BIT(2) 5360 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST BIT(3) 5361 5362 #define WMI_NSOL_MAX_TARGET_IPS 2 5363 5364 struct wmi_ns_offload_params { 5365 __le32 tlv_header; 5366 __le32 flags; 5367 u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16]; 5368 u8 solicitation_ipaddr[16]; 5369 u8 remote_ipaddr[16]; 5370 struct ath12k_wmi_mac_addr_params target_mac; 5371 } __packed; 5372 5373 struct wmi_set_arp_ns_offload_cmd { 5374 __le32 tlv_header; 5375 __le32 flags; 5376 __le32 vdev_id; 5377 __le32 num_ns_ext_tuples; 5378 /* The TLVs follow: 5379 * wmi_ns_offload_params ns[WMI_MAX_NS_OFFLOADS]; 5380 * wmi_arp_offload_params arp[WMI_MAX_ARP_OFFLOADS]; 5381 * wmi_ns_offload_params ns_ext[num_ns_ext_tuples]; 5382 */ 5383 } __packed; 5384 5385 #define GTK_OFFLOAD_OPCODE_MASK 0xFF000000 5386 #define GTK_OFFLOAD_ENABLE_OPCODE 0x01000000 5387 #define GTK_OFFLOAD_DISABLE_OPCODE 0x02000000 5388 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE 0x04000000 5389 5390 #define GTK_OFFLOAD_KEK_BYTES 16 5391 #define GTK_OFFLOAD_KCK_BYTES 16 5392 #define GTK_REPLAY_COUNTER_BYTES 8 5393 #define WMI_MAX_KEY_LEN 32 5394 #define IGTK_PN_SIZE 6 5395 5396 struct wmi_gtk_offload_status_event { 5397 __le32 vdev_id; 5398 __le32 flags; 5399 __le32 refresh_cnt; 5400 __le64 replay_ctr; 5401 u8 igtk_key_index; 5402 u8 igtk_key_length; 5403 u8 igtk_key_rsc[IGTK_PN_SIZE]; 5404 u8 igtk_key[WMI_MAX_KEY_LEN]; 5405 u8 gtk_key_index; 5406 u8 gtk_key_length; 5407 u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES]; 5408 u8 gtk_key[WMI_MAX_KEY_LEN]; 5409 } __packed; 5410 5411 struct wmi_gtk_rekey_offload_cmd { 5412 __le32 tlv_header; 5413 __le32 vdev_id; 5414 __le32 flags; 5415 u8 kek[GTK_OFFLOAD_KEK_BYTES]; 5416 u8 kck[GTK_OFFLOAD_KCK_BYTES]; 5417 u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES]; 5418 } __packed; 5419 5420 struct wmi_sta_keepalive_cmd { 5421 __le32 tlv_header; 5422 __le32 vdev_id; 5423 __le32 enabled; 5424 5425 /* WMI_STA_KEEPALIVE_METHOD_ */ 5426 __le32 method; 5427 5428 /* in seconds */ 5429 __le32 interval; 5430 5431 /* following this structure is the TLV for struct 5432 * wmi_sta_keepalive_arp_resp_params 5433 */ 5434 } __packed; 5435 5436 struct wmi_sta_keepalive_arp_resp_params { 5437 __le32 tlv_header; 5438 __le32 src_ip4_addr; 5439 __le32 dest_ip4_addr; 5440 struct ath12k_wmi_mac_addr_params dest_mac_addr; 5441 } __packed; 5442 5443 struct wmi_sta_keepalive_arg { 5444 u32 vdev_id; 5445 u32 enabled; 5446 u32 method; 5447 u32 interval; 5448 u32 src_ip4_addr; 5449 u32 dest_ip4_addr; 5450 const u8 dest_mac_addr[ETH_ALEN]; 5451 }; 5452 5453 enum wmi_sta_keepalive_method { 5454 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 5455 WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2, 5456 WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3, 5457 WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4, 5458 WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5, 5459 }; 5460 5461 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT 30 5462 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0 5463 5464 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 5465 struct ath12k_wmi_resource_config_arg *config); 5466 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 5467 struct ath12k_wmi_resource_config_arg *config); 5468 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 5469 u32 cmd_id); 5470 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len); 5471 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 5472 struct sk_buff *frame); 5473 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 5474 const u8 *p2p_ie); 5475 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id, 5476 struct ieee80211_mutable_offsets *offs, 5477 struct sk_buff *bcn, 5478 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args); 5479 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id); 5480 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params); 5481 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id); 5482 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 5483 bool restart); 5484 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 5485 u32 vdev_id, u32 param_id, u32 param_val); 5486 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 5487 u32 param_value, u8 pdev_id); 5488 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable); 5489 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab); 5490 int ath12k_wmi_cmd_init(struct ath12k_base *ab); 5491 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab); 5492 int ath12k_wmi_connect(struct ath12k_base *ab); 5493 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 5494 u8 pdev_id); 5495 int ath12k_wmi_attach(struct ath12k_base *ab); 5496 void ath12k_wmi_detach(struct ath12k_base *ab); 5497 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 5498 struct ath12k_wmi_vdev_create_arg *arg); 5499 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 5500 struct ath12k_wmi_peer_create_arg *arg); 5501 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 5502 u32 param_id, u32 param_value); 5503 5504 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 5505 u32 param, u32 param_value); 5506 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms); 5507 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 5508 const u8 *peer_addr, u8 vdev_id); 5509 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id); 5510 void ath12k_wmi_start_scan_init(struct ath12k *ar, 5511 struct ath12k_wmi_scan_req_arg *arg); 5512 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 5513 struct ath12k_wmi_scan_req_arg *arg); 5514 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 5515 struct ath12k_wmi_scan_cancel_arg *arg); 5516 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 5517 struct wmi_wmm_params_all_arg *param); 5518 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 5519 u32 pdev_id); 5520 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id); 5521 5522 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 5523 struct ath12k_wmi_peer_assoc_arg *arg); 5524 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 5525 struct wmi_vdev_install_key_arg *arg); 5526 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 5527 enum wmi_bss_chan_info_req_type type); 5528 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar); 5529 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 5530 u8 peer_addr[ETH_ALEN], 5531 u32 peer_tid_bitmap, 5532 u8 vdev_id); 5533 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 5534 struct ath12k_wmi_ap_ps_arg *arg); 5535 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 5536 struct ath12k_wmi_scan_chan_list_arg *arg); 5537 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 5538 u32 pdev_id); 5539 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac); 5540 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 5541 u32 tid, u32 buf_size); 5542 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 5543 u32 tid, u32 status); 5544 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 5545 u32 tid, u32 initiator, u32 reason); 5546 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 5547 u32 vdev_id, u32 bcn_ctrl_op); 5548 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 5549 struct ath12k_wmi_init_country_arg *arg); 5550 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 5551 int vdev_id, const u8 *addr, 5552 dma_addr_t paddr, u8 tid, 5553 u8 ba_window_size_valid, 5554 u32 ba_window_size); 5555 int 5556 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 5557 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg); 5558 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 5559 struct ath12k_wmi_pdev_set_regdomain_arg *arg); 5560 int ath12k_wmi_simulate_radar(struct ath12k *ar); 5561 int ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id); 5562 int ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id); 5563 int ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 5564 struct ieee80211_he_obss_pd *he_obss_pd); 5565 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 5566 u8 bss_color, u32 period, 5567 bool enable); 5568 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 5569 bool enable); 5570 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, int pdev_id); 5571 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 5572 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg); 5573 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 5574 u32 trigger, u32 enable); 5575 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 5576 struct ath12k_wmi_vdev_spectral_conf_arg *arg); 5577 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 5578 struct sk_buff *tmpl); 5579 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 5580 bool unsol_bcast_probe_resp_enabled); 5581 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 5582 struct sk_buff *tmpl); 5583 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 5584 enum wmi_host_hw_mode_config_type mode); 5585 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 5586 const u8 *buf, size_t buf_len); 5587 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table); 5588 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table); 5589 5590 static inline u32 ath12k_wmi_caps_ext_get_pdev_id(const struct ath12k_wmi_caps_ext_params * param)5591 ath12k_wmi_caps_ext_get_pdev_id(const struct ath12k_wmi_caps_ext_params *param) 5592 { 5593 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_PDEV_ID); 5594 } 5595 5596 static inline u32 ath12k_wmi_caps_ext_get_hw_link_id(const struct ath12k_wmi_caps_ext_params * param)5597 ath12k_wmi_caps_ext_get_hw_link_id(const struct ath12k_wmi_caps_ext_params *param) 5598 { 5599 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_HW_LINK_ID); 5600 } 5601 5602 static inline u32 ath12k_wmi_mac_phy_get_pdev_id(const struct ath12k_wmi_mac_phy_caps_params * param)5603 ath12k_wmi_mac_phy_get_pdev_id(const struct ath12k_wmi_mac_phy_caps_params *param) 5604 { 5605 return le32_get_bits(param->pdev_and_hw_link_ids, 5606 WMI_CAPS_PARAMS_PDEV_ID); 5607 } 5608 5609 static inline u32 ath12k_wmi_mac_phy_get_hw_link_id(const struct ath12k_wmi_mac_phy_caps_params * param)5610 ath12k_wmi_mac_phy_get_hw_link_id(const struct ath12k_wmi_mac_phy_caps_params *param) 5611 { 5612 return le32_get_bits(param->pdev_and_hw_link_ids, 5613 WMI_CAPS_PARAMS_HW_LINK_ID); 5614 } 5615 5616 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar); 5617 int ath12k_wmi_wow_enable(struct ath12k *ar); 5618 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id); 5619 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id, 5620 const u8 *pattern, const u8 *mask, 5621 int pattern_len, int pattern_offset); 5622 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id, 5623 enum wmi_wow_wakeup_event event, 5624 u32 enable); 5625 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id, 5626 struct wmi_pno_scan_req_arg *pno_scan); 5627 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, 5628 struct wmi_hw_data_filter_arg *arg); 5629 int ath12k_wmi_arp_ns_offload(struct ath12k *ar, 5630 struct ath12k_vif *arvif, 5631 struct wmi_arp_ns_offload_arg *offload, 5632 bool enable); 5633 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar, 5634 struct ath12k_vif *arvif, bool enable); 5635 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar, 5636 struct ath12k_vif *arvif); 5637 int ath12k_wmi_sta_keepalive(struct ath12k *ar, 5638 const struct wmi_sta_keepalive_arg *arg); 5639 5640 #endif 5641