1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #ifndef _IONIC_LIF_H_ 5 #define _IONIC_LIF_H_ 6 7 #include <linux/ptp_clock_kernel.h> 8 #include <linux/timecounter.h> 9 #include <uapi/linux/net_tstamp.h> 10 #include <linux/dim.h> 11 #include <linux/pci.h> 12 #include "ionic_rx_filter.h" 13 14 #define IONIC_ADMINQ_LENGTH 16 /* must be a power of two */ 15 #define IONIC_NOTIFYQ_LENGTH 64 /* must be a power of two */ 16 17 #define ADD_ADDR true 18 #define DEL_ADDR false 19 #define CAN_SLEEP true 20 #define CAN_NOT_SLEEP false 21 22 #define IONIC_RX_COPYBREAK_DEFAULT 256 23 #define IONIC_TX_BUDGET_DEFAULT 256 24 25 struct ionic_tx_stats { 26 u64 pkts; 27 u64 bytes; 28 u64 csum_none; 29 u64 csum; 30 u64 tso; 31 u64 tso_bytes; 32 u64 frags; 33 u64 vlan_inserted; 34 u64 clean; 35 u64 linearize; 36 u64 crc32_csum; 37 u64 dma_map_err; 38 u64 hwstamp_valid; 39 u64 hwstamp_invalid; 40 u64 xdp_frames; 41 }; 42 43 struct ionic_rx_stats { 44 u64 pkts; 45 u64 bytes; 46 u64 csum_none; 47 u64 csum_complete; 48 u64 dropped; 49 u64 vlan_stripped; 50 u64 csum_error; 51 u64 dma_map_err; 52 u64 alloc_err; 53 u64 hwstamp_valid; 54 u64 hwstamp_invalid; 55 u64 xdp_drop; 56 u64 xdp_aborted; 57 u64 xdp_pass; 58 u64 xdp_tx; 59 u64 xdp_redirect; 60 }; 61 62 #define IONIC_QCQ_F_INITED BIT(0) 63 #define IONIC_QCQ_F_SG BIT(1) 64 #define IONIC_QCQ_F_INTR BIT(2) 65 #define IONIC_QCQ_F_TX_STATS BIT(3) 66 #define IONIC_QCQ_F_RX_STATS BIT(4) 67 #define IONIC_QCQ_F_NOTIFYQ BIT(5) 68 #define IONIC_QCQ_F_CMB_RINGS BIT(6) 69 70 struct ionic_qcq { 71 void *q_base; 72 dma_addr_t q_base_pa; 73 u32 q_size; 74 u32 cq_size; 75 void *cq_base; 76 dma_addr_t cq_base_pa; 77 void *sg_base; 78 dma_addr_t sg_base_pa; 79 u32 sg_size; 80 unsigned int flags; 81 void __iomem *cmb_q_base; 82 phys_addr_t cmb_q_base_pa; 83 u32 cmb_q_size; 84 u32 cmb_pgid; 85 u32 cmb_order; 86 struct dim dim; 87 struct ionic_queue q; 88 struct ionic_cq cq; 89 struct napi_struct napi; 90 struct ionic_intr_info intr; 91 struct work_struct doorbell_napi_work; 92 struct dentry *dentry; 93 }; 94 95 #define q_to_qcq(q) container_of(q, struct ionic_qcq, q) 96 #define q_to_tx_stats(q) (&(q)->lif->txqstats[(q)->index]) 97 #define q_to_rx_stats(q) (&(q)->lif->rxqstats[(q)->index]) 98 #define napi_to_qcq(napi) container_of(napi, struct ionic_qcq, napi) 99 #define napi_to_cq(napi) (&napi_to_qcq(napi)->cq) 100 101 enum ionic_deferred_work_type { 102 IONIC_DW_TYPE_RX_MODE, 103 IONIC_DW_TYPE_LINK_STATUS, 104 IONIC_DW_TYPE_LIF_RESET, 105 }; 106 107 struct ionic_deferred_work { 108 struct list_head list; 109 enum ionic_deferred_work_type type; 110 union { 111 u8 addr[ETH_ALEN]; 112 u8 fw_status; 113 }; 114 }; 115 116 struct ionic_deferred { 117 spinlock_t lock; /* lock for deferred work list */ 118 struct list_head list; 119 struct work_struct work; 120 }; 121 122 struct ionic_lif_sw_stats { 123 u64 tx_packets; 124 u64 tx_bytes; 125 u64 rx_packets; 126 u64 rx_bytes; 127 u64 tx_tso; 128 u64 tx_tso_bytes; 129 u64 tx_csum_none; 130 u64 tx_csum; 131 u64 rx_csum_none; 132 u64 rx_csum_complete; 133 u64 rx_csum_error; 134 u64 tx_hwstamp_valid; 135 u64 tx_hwstamp_invalid; 136 u64 rx_hwstamp_valid; 137 u64 rx_hwstamp_invalid; 138 u64 hw_tx_dropped; 139 u64 hw_rx_dropped; 140 u64 hw_rx_over_errors; 141 u64 hw_rx_missed_errors; 142 u64 hw_tx_aborted_errors; 143 u64 xdp_drop; 144 u64 xdp_aborted; 145 u64 xdp_pass; 146 u64 xdp_tx; 147 u64 xdp_redirect; 148 u64 xdp_frames; 149 }; 150 151 enum ionic_lif_state_flags { 152 IONIC_LIF_F_INITED, 153 IONIC_LIF_F_UP, 154 IONIC_LIF_F_LINK_CHECK_REQUESTED, 155 IONIC_LIF_F_FILTER_SYNC_NEEDED, 156 IONIC_LIF_F_FW_RESET, 157 IONIC_LIF_F_FW_STOPPING, 158 IONIC_LIF_F_SPLIT_INTR, 159 IONIC_LIF_F_BROKEN, 160 IONIC_LIF_F_TX_DIM_INTR, 161 IONIC_LIF_F_RX_DIM_INTR, 162 IONIC_LIF_F_CMB_TX_RINGS, 163 IONIC_LIF_F_CMB_RX_RINGS, 164 165 /* leave this as last */ 166 IONIC_LIF_F_STATE_SIZE 167 }; 168 169 struct ionic_qtype_info { 170 u8 version; 171 u8 supported; 172 u64 features; 173 u16 desc_sz; 174 u16 comp_sz; 175 u16 sg_desc_sz; 176 u16 max_sg_elems; 177 u16 sg_desc_stride; 178 }; 179 180 struct ionic_phc; 181 182 #define IONIC_LIF_NAME_MAX_SZ 32 183 struct ionic_lif { 184 struct net_device *netdev; 185 DECLARE_BITMAP(state, IONIC_LIF_F_STATE_SIZE); 186 struct ionic *ionic; 187 unsigned int index; 188 unsigned int hw_index; 189 struct mutex queue_lock; /* lock for queue structures */ 190 struct mutex config_lock; /* lock for config actions */ 191 spinlock_t adminq_lock; /* lock for AdminQ operations */ 192 struct ionic_qcq *adminqcq; 193 struct ionic_qcq *notifyqcq; 194 struct ionic_qcq **txqcqs; 195 struct ionic_qcq *hwstamp_txq; 196 struct ionic_tx_stats *txqstats; 197 struct ionic_qcq **rxqcqs; 198 struct ionic_qcq *hwstamp_rxq; 199 struct ionic_rx_stats *rxqstats; 200 struct ionic_deferred deferred; 201 struct work_struct tx_timeout_work; 202 u64 last_eid; 203 unsigned int kern_pid; 204 u64 __iomem *kern_dbpage; 205 unsigned int neqs; 206 unsigned int nxqs; 207 unsigned int ntxq_descs; 208 unsigned int nrxq_descs; 209 u64 rxq_features; 210 u64 hw_features; 211 u16 rx_copybreak; 212 u16 rx_mode; 213 bool registered; 214 bool doorbell_wa; 215 u16 lif_type; 216 unsigned int link_down_count; 217 unsigned int nmcast; 218 unsigned int nucast; 219 unsigned int nvlans; 220 unsigned int max_vlans; 221 char name[IONIC_LIF_NAME_MAX_SZ]; 222 223 union ionic_lif_identity *identity; 224 struct ionic_lif_info *info; 225 dma_addr_t info_pa; 226 u32 info_sz; 227 struct ionic_qtype_info qtype_info[IONIC_QTYPE_MAX]; 228 229 u8 rss_hash_key[IONIC_RSS_HASH_KEY_SIZE]; 230 u8 *rss_ind_tbl; 231 dma_addr_t rss_ind_tbl_pa; 232 u32 rss_ind_tbl_sz; 233 u16 rss_types; 234 235 struct ionic_rx_filters rx_filters; 236 u32 rx_coalesce_usecs; /* what the user asked for */ 237 u32 rx_coalesce_hw; /* what the hw is using */ 238 u32 tx_coalesce_usecs; /* what the user asked for */ 239 u32 tx_coalesce_hw; /* what the hw is using */ 240 unsigned int dbid_count; 241 242 struct ionic_phc *phc; 243 244 struct dentry *dentry; 245 struct bpf_prog *xdp_prog; 246 }; 247 248 struct ionic_phc { 249 spinlock_t lock; /* lock for cc and tc */ 250 struct cyclecounter cc; 251 struct timecounter tc; 252 253 struct mutex config_lock; /* lock for ts_config */ 254 struct hwtstamp_config ts_config; 255 u64 ts_config_rx_filt; 256 u32 ts_config_tx_mode; 257 258 u32 init_cc_mult; 259 long aux_work_delay; 260 261 struct ptp_clock_info ptp_info; 262 struct ptp_clock *ptp; 263 struct ionic_lif *lif; 264 }; 265 266 struct ionic_queue_params { 267 unsigned int nxqs; 268 unsigned int ntxq_descs; 269 unsigned int nrxq_descs; 270 u64 rxq_features; 271 struct bpf_prog *xdp_prog; 272 bool intr_split; 273 bool cmb_tx; 274 bool cmb_rx; 275 }; 276 ionic_init_queue_params(struct ionic_lif * lif,struct ionic_queue_params * qparam)277 static inline void ionic_init_queue_params(struct ionic_lif *lif, 278 struct ionic_queue_params *qparam) 279 { 280 qparam->nxqs = lif->nxqs; 281 qparam->ntxq_descs = lif->ntxq_descs; 282 qparam->nrxq_descs = lif->nrxq_descs; 283 qparam->rxq_features = lif->rxq_features; 284 qparam->xdp_prog = lif->xdp_prog; 285 qparam->intr_split = test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 286 qparam->cmb_tx = test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state); 287 qparam->cmb_rx = test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state); 288 } 289 ionic_set_queue_params(struct ionic_lif * lif,struct ionic_queue_params * qparam)290 static inline void ionic_set_queue_params(struct ionic_lif *lif, 291 struct ionic_queue_params *qparam) 292 { 293 lif->nxqs = qparam->nxqs; 294 lif->ntxq_descs = qparam->ntxq_descs; 295 lif->nrxq_descs = qparam->nrxq_descs; 296 lif->rxq_features = qparam->rxq_features; 297 298 if (qparam->intr_split) 299 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 300 else 301 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 302 303 if (qparam->cmb_tx) 304 set_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state); 305 else 306 clear_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state); 307 308 if (qparam->cmb_rx) 309 set_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state); 310 else 311 clear_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state); 312 } 313 ionic_coal_usec_to_hw(struct ionic * ionic,u32 usecs)314 static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs) 315 { 316 u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult); 317 u32 div = le32_to_cpu(ionic->ident.dev.intr_coal_div); 318 319 /* Div-by-zero should never be an issue, but check anyway */ 320 if (!div || !mult) 321 return 0; 322 323 /* Round up in case usecs is close to the next hw unit */ 324 usecs += (div / mult) >> 1; 325 326 /* Convert from usecs to device units */ 327 return (usecs * mult) / div; 328 } 329 ionic_txq_hwstamp_enabled(struct ionic_queue * q)330 static inline bool ionic_txq_hwstamp_enabled(struct ionic_queue *q) 331 { 332 return q->features & IONIC_TXQ_F_HWSTAMP; 333 } 334 335 void ionic_link_status_check_request(struct ionic_lif *lif, bool can_sleep); 336 void ionic_get_stats64(struct net_device *netdev, 337 struct rtnl_link_stats64 *ns); 338 void ionic_lif_deferred_enqueue(struct ionic_lif *lif, 339 struct ionic_deferred_work *work); 340 int ionic_lif_alloc(struct ionic *ionic); 341 int ionic_lif_init(struct ionic_lif *lif); 342 void ionic_lif_free(struct ionic_lif *lif); 343 void ionic_lif_deinit(struct ionic_lif *lif); 344 345 int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr); 346 int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr); 347 348 void ionic_stop_queues_reconfig(struct ionic_lif *lif); 349 void ionic_txrx_free(struct ionic_lif *lif); 350 void ionic_qcqs_free(struct ionic_lif *lif); 351 int ionic_restart_lif(struct ionic_lif *lif); 352 353 int ionic_lif_register(struct ionic_lif *lif); 354 void ionic_lif_unregister(struct ionic_lif *lif); 355 int ionic_lif_identify(struct ionic *ionic, u8 lif_type, 356 union ionic_lif_identity *lif_ident); 357 int ionic_lif_size(struct ionic *ionic); 358 359 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) 360 void ionic_lif_hwstamp_replay(struct ionic_lif *lif); 361 void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif); 362 int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr); 363 int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr); 364 ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter); 365 void ionic_lif_register_phc(struct ionic_lif *lif); 366 void ionic_lif_unregister_phc(struct ionic_lif *lif); 367 void ionic_lif_alloc_phc(struct ionic_lif *lif); 368 void ionic_lif_free_phc(struct ionic_lif *lif); 369 #else ionic_lif_hwstamp_replay(struct ionic_lif * lif)370 static inline void ionic_lif_hwstamp_replay(struct ionic_lif *lif) {} ionic_lif_hwstamp_recreate_queues(struct ionic_lif * lif)371 static inline void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif) {} 372 ionic_lif_hwstamp_set(struct ionic_lif * lif,struct ifreq * ifr)373 static inline int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr) 374 { 375 return -EOPNOTSUPP; 376 } 377 ionic_lif_hwstamp_get(struct ionic_lif * lif,struct ifreq * ifr)378 static inline int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr) 379 { 380 return -EOPNOTSUPP; 381 } 382 ionic_lif_phc_ktime(struct ionic_lif * lif,u64 counter)383 static inline ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter) 384 { 385 return ns_to_ktime(0); 386 } 387 ionic_lif_register_phc(struct ionic_lif * lif)388 static inline void ionic_lif_register_phc(struct ionic_lif *lif) {} ionic_lif_unregister_phc(struct ionic_lif * lif)389 static inline void ionic_lif_unregister_phc(struct ionic_lif *lif) {} ionic_lif_alloc_phc(struct ionic_lif * lif)390 static inline void ionic_lif_alloc_phc(struct ionic_lif *lif) {} ionic_lif_free_phc(struct ionic_lif * lif)391 static inline void ionic_lif_free_phc(struct ionic_lif *lif) {} 392 #endif 393 394 int ionic_lif_create_hwstamp_txq(struct ionic_lif *lif); 395 int ionic_lif_create_hwstamp_rxq(struct ionic_lif *lif); 396 int ionic_lif_config_hwstamp_rxq_all(struct ionic_lif *lif, bool rx_all); 397 int ionic_lif_set_hwstamp_txmode(struct ionic_lif *lif, u16 txstamp_mode); 398 int ionic_lif_set_hwstamp_rxfilt(struct ionic_lif *lif, u64 pkt_class); 399 400 int ionic_lif_rss_config(struct ionic_lif *lif, u16 types, 401 const u8 *key, const u32 *indir); 402 void ionic_lif_rx_mode(struct ionic_lif *lif); 403 int ionic_reconfigure_queues(struct ionic_lif *lif, 404 struct ionic_queue_params *qparam); 405 #endif /* _IONIC_LIF_H_ */ 406