1 # SPDX-License-Identifier: MIT 2 # Copyright © 2019-2024 Advanced Micro Devices, Inc. All rights reserved. 3 4 menu "Display Engine Configuration" 5 depends on DRM && DRM_AMDGPU 6 7 config DRM_AMD_DC 8 bool "AMD DC - Enable new display engine" 9 default y 10 depends on BROKEN || !CC_IS_CLANG || ARM64 || RISCV || SPARC64 || X86_64 11 select SND_HDA_COMPONENT if SND_HDA_CORE 12 # !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752 13 select DRM_AMD_DC_FP if ARCH_HAS_KERNEL_FPU_SUPPORT && !(CC_IS_CLANG && (ARM64 || RISCV)) 14 help 15 Choose this option if you want to use the new display engine 16 support for AMDGPU. This adds required support for Vega and 17 Raven ASICs. 18 19 calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64) 20 architectures built with Clang (all released versions), whereby the stack 21 frame gets blown up to well over 5k. This would cause an immediate kernel 22 panic on most architectures. We'll revert this when the following bug report 23 has been resolved: https://github.com/llvm/llvm-project/issues/41896. 24 25 config DRM_AMD_DC_FP 26 def_bool n 27 help 28 Floating point support, required for DCN-based SoCs 29 30 config DRM_AMD_DC_SI 31 bool "AMD DC support for Southern Islands ASICs" 32 depends on DRM_AMDGPU_SI 33 depends on DRM_AMD_DC 34 help 35 Choose this option to enable new AMD DC support for SI asics 36 by default. This includes Tahiti, Pitcairn, Cape Verde, Oland. 37 Hainan is not supported by AMD DC and it has no physical DCE6. 38 39 config DEBUG_KERNEL_DC 40 bool "Enable kgdb break in DC" 41 depends on DRM_AMD_DC 42 depends on KGDB 43 help 44 Choose this option if you want to hit kdgb_break in assert. 45 46 config DRM_AMD_SECURE_DISPLAY 47 bool "Enable secure display support" 48 depends on DEBUG_FS 49 depends on DRM_AMD_DC_FP 50 help 51 Choose this option if you want to support secure display 52 53 This option enables the calculation of crc of specific region via 54 debugfs. Cooperate with specific DMCU FW. 55 56 endmenu 57