1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * x86_emulate.h 4 * 5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. 6 * 7 * Copyright (c) 2005 Keir Fraser 8 * 9 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 10 */ 11 12 #ifndef _ASM_X86_KVM_X86_EMULATE_H 13 #define _ASM_X86_KVM_X86_EMULATE_H 14 15 #include <asm/desc_defs.h> 16 #include "fpu.h" 17 18 struct x86_emulate_ctxt; 19 enum x86_intercept; 20 enum x86_intercept_stage; 21 22 struct x86_exception { 23 u8 vector; 24 bool error_code_valid; 25 u16 error_code; 26 bool nested_page_fault; 27 u64 address; /* cr2 or nested page fault gpa */ 28 u8 async_page_fault; 29 unsigned long exit_qualification; 30 }; 31 32 /* 33 * This struct is used to carry enough information from the instruction 34 * decoder to main KVM so that a decision can be made whether the 35 * instruction needs to be intercepted or not. 36 */ 37 struct x86_instruction_info { 38 u8 intercept; /* which intercept */ 39 u8 rep_prefix; /* rep prefix? */ 40 u8 modrm_mod; /* mod part of modrm */ 41 u8 modrm_reg; /* index of register used */ 42 u8 modrm_rm; /* rm part of modrm */ 43 u64 src_val; /* value of source operand */ 44 u64 dst_val; /* value of destination operand */ 45 u8 src_bytes; /* size of source operand */ 46 u8 dst_bytes; /* size of destination operand */ 47 u8 ad_bytes; /* size of src/dst address */ 48 u64 next_rip; /* rip following the instruction */ 49 }; 50 51 /* 52 * x86_emulate_ops: 53 * 54 * These operations represent the instruction emulator's interface to memory. 55 * There are two categories of operation: those that act on ordinary memory 56 * regions (*_std), and those that act on memory regions known to require 57 * special treatment or emulation (*_emulated). 58 * 59 * The emulator assumes that an instruction accesses only one 'emulated memory' 60 * location, that this location is the given linear faulting address (cr2), and 61 * that this is one of the instruction's data operands. Instruction fetches and 62 * stack operations are assumed never to access emulated memory. The emulator 63 * automatically deduces which operand of a string-move operation is accessing 64 * emulated memory, and assumes that the other operand accesses normal memory. 65 * 66 * NOTES: 67 * 1. The emulator isn't very smart about emulated vs. standard memory. 68 * 'Emulated memory' access addresses should be checked for sanity. 69 * 'Normal memory' accesses may fault, and the caller must arrange to 70 * detect and handle reentrancy into the emulator via recursive faults. 71 * Accesses may be unaligned and may cross page boundaries. 72 * 2. If the access fails (cannot emulate, or a standard access faults) then 73 * it is up to the memop to propagate the fault to the guest VM via 74 * some out-of-band mechanism, unknown to the emulator. The memop signals 75 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will 76 * then immediately bail. 77 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only 78 * cmpxchg8b_emulated need support 8-byte accesses. 79 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. 80 */ 81 /* Access completed successfully: continue emulation as normal. */ 82 #define X86EMUL_CONTINUE 0 83 /* Access is unhandleable: bail from emulation and return error to caller. */ 84 #define X86EMUL_UNHANDLEABLE 1 85 /* Terminate emulation but return success to the caller. */ 86 #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ 87 #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */ 88 #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ 89 #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ 90 #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ 91 92 /* x86-specific emulation flags */ 93 #define X86EMUL_F_WRITE BIT(0) 94 #define X86EMUL_F_FETCH BIT(1) 95 #define X86EMUL_F_IMPLICIT BIT(2) 96 #define X86EMUL_F_INVLPG BIT(3) 97 98 struct x86_emulate_ops { 99 void (*vm_bugged)(struct x86_emulate_ctxt *ctxt); 100 /* 101 * read_gpr: read a general purpose register (rax - r15) 102 * 103 * @reg: gpr number. 104 */ 105 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg); 106 /* 107 * write_gpr: write a general purpose register (rax - r15) 108 * 109 * @reg: gpr number. 110 * @val: value to write. 111 */ 112 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val); 113 /* 114 * read_std: Read bytes of standard (non-emulated/special) memory. 115 * Used for descriptor reading. 116 * @addr: [IN ] Linear address from which to read. 117 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 118 * @bytes: [IN ] Number of bytes to read from memory. 119 * @system:[IN ] Whether the access is forced to be at CPL0. 120 */ 121 int (*read_std)(struct x86_emulate_ctxt *ctxt, 122 unsigned long addr, void *val, 123 unsigned int bytes, 124 struct x86_exception *fault, bool system); 125 126 /* 127 * write_std: Write bytes of standard (non-emulated/special) memory. 128 * Used for descriptor writing. 129 * @addr: [IN ] Linear address to which to write. 130 * @val: [OUT] Value write to memory, zero-extended to 'u_long'. 131 * @bytes: [IN ] Number of bytes to write to memory. 132 * @system:[IN ] Whether the access is forced to be at CPL0. 133 */ 134 int (*write_std)(struct x86_emulate_ctxt *ctxt, 135 unsigned long addr, void *val, unsigned int bytes, 136 struct x86_exception *fault, bool system); 137 /* 138 * fetch: Read bytes of standard (non-emulated/special) memory. 139 * Used for instruction fetch. 140 * @addr: [IN ] Linear address from which to read. 141 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 142 * @bytes: [IN ] Number of bytes to read from memory. 143 */ 144 int (*fetch)(struct x86_emulate_ctxt *ctxt, 145 unsigned long addr, void *val, unsigned int bytes, 146 struct x86_exception *fault); 147 148 /* 149 * read_emulated: Read bytes from emulated/special memory area. 150 * @addr: [IN ] Linear address from which to read. 151 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 152 * @bytes: [IN ] Number of bytes to read from memory. 153 */ 154 int (*read_emulated)(struct x86_emulate_ctxt *ctxt, 155 unsigned long addr, void *val, unsigned int bytes, 156 struct x86_exception *fault); 157 158 /* 159 * write_emulated: Write bytes to emulated/special memory area. 160 * @addr: [IN ] Linear address to which to write. 161 * @val: [IN ] Value to write to memory (low-order bytes used as 162 * required). 163 * @bytes: [IN ] Number of bytes to write to memory. 164 */ 165 int (*write_emulated)(struct x86_emulate_ctxt *ctxt, 166 unsigned long addr, const void *val, 167 unsigned int bytes, 168 struct x86_exception *fault); 169 170 /* 171 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an 172 * emulated/special memory area. 173 * @addr: [IN ] Linear address to access. 174 * @old: [IN ] Value expected to be current at @addr. 175 * @new: [IN ] Value to write to @addr. 176 * @bytes: [IN ] Number of bytes to access using CMPXCHG. 177 */ 178 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt, 179 unsigned long addr, 180 const void *old, 181 const void *new, 182 unsigned int bytes, 183 struct x86_exception *fault); 184 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); 185 186 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt, 187 int size, unsigned short port, void *val, 188 unsigned int count); 189 190 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt, 191 int size, unsigned short port, const void *val, 192 unsigned int count); 193 194 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector, 195 struct desc_struct *desc, u32 *base3, int seg); 196 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector, 197 struct desc_struct *desc, u32 base3, int seg); 198 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt, 199 int seg); 200 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 201 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 202 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 203 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 204 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); 205 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); 206 int (*cpl)(struct x86_emulate_ctxt *ctxt); 207 ulong (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr); 208 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); 209 int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data); 210 int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 211 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 212 int (*check_rdpmc_early)(struct x86_emulate_ctxt *ctxt, u32 pmc); 213 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata); 214 void (*halt)(struct x86_emulate_ctxt *ctxt); 215 void (*wbinvd)(struct x86_emulate_ctxt *ctxt); 216 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt); 217 int (*intercept)(struct x86_emulate_ctxt *ctxt, 218 struct x86_instruction_info *info, 219 enum x86_intercept_stage stage); 220 221 bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx, 222 u32 *ecx, u32 *edx, bool exact_only); 223 bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt); 224 bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt); 225 bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt); 226 bool (*guest_cpuid_is_intel_compatible)(struct x86_emulate_ctxt *ctxt); 227 228 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked); 229 230 bool (*is_smm)(struct x86_emulate_ctxt *ctxt); 231 bool (*is_guest_mode)(struct x86_emulate_ctxt *ctxt); 232 int (*leave_smm)(struct x86_emulate_ctxt *ctxt); 233 void (*triple_fault)(struct x86_emulate_ctxt *ctxt); 234 int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr); 235 236 gva_t (*get_untagged_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, 237 unsigned int flags); 238 }; 239 240 /* Type, address-of, and value of an instruction's operand. */ 241 struct operand { 242 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type; 243 unsigned int bytes; 244 unsigned int count; 245 union { 246 unsigned long orig_val; 247 u64 orig_val64; 248 }; 249 union { 250 unsigned long *reg; 251 struct segmented_address { 252 ulong ea; 253 unsigned seg; 254 } mem; 255 unsigned xmm; 256 unsigned mm; 257 } addr; 258 union { 259 unsigned long val; 260 u64 val64; 261 char valptr[sizeof(sse128_t)]; 262 sse128_t vec_val; 263 u64 mm_val; 264 void *data; 265 }; 266 }; 267 268 struct fetch_cache { 269 u8 data[15]; 270 u8 *ptr; 271 u8 *end; 272 }; 273 274 struct read_cache { 275 u8 data[1024]; 276 unsigned long pos; 277 unsigned long end; 278 }; 279 280 /* Execution mode, passed to the emulator. */ 281 enum x86emul_mode { 282 X86EMUL_MODE_REAL, /* Real mode. */ 283 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */ 284 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */ 285 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */ 286 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */ 287 }; 288 289 /* 290 * fastop functions are declared as taking a never-defined fastop parameter, 291 * so they can't be called from C directly. 292 */ 293 struct fastop; 294 295 typedef void (*fastop_t)(struct fastop *); 296 297 /* 298 * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is 299 * tracked/accessed via _eip, and except for RIP relative addressing, which 300 * also uses _eip, RIP cannot be a register operand nor can it be an operand in 301 * a ModRM or SIB byte. 302 */ 303 #ifdef CONFIG_X86_64 304 #define NR_EMULATOR_GPRS 16 305 #else 306 #define NR_EMULATOR_GPRS 8 307 #endif 308 309 struct x86_emulate_ctxt { 310 void *vcpu; 311 const struct x86_emulate_ops *ops; 312 313 /* Register state before/after emulation. */ 314 unsigned long eflags; 315 unsigned long eip; /* eip before instruction emulation */ 316 /* Emulated execution mode, represented by an X86EMUL_MODE value. */ 317 enum x86emul_mode mode; 318 319 /* interruptibility state, as a result of execution of STI or MOV SS */ 320 int interruptibility; 321 322 bool perm_ok; /* do not check permissions if true */ 323 bool tf; /* TF value before instruction (after for syscall/sysret) */ 324 325 bool have_exception; 326 struct x86_exception exception; 327 328 /* GPA available */ 329 bool gpa_available; 330 gpa_t gpa_val; 331 332 /* 333 * decode cache 334 */ 335 336 /* current opcode length in bytes */ 337 u8 opcode_len; 338 u8 b; 339 u8 intercept; 340 u8 op_bytes; 341 u8 ad_bytes; 342 union { 343 int (*execute)(struct x86_emulate_ctxt *ctxt); 344 fastop_t fop; 345 }; 346 int (*check_perm)(struct x86_emulate_ctxt *ctxt); 347 348 bool rip_relative; 349 u8 rex_prefix; 350 u8 lock_prefix; 351 u8 rep_prefix; 352 /* bitmaps of registers in _regs[] that can be read */ 353 u16 regs_valid; 354 /* bitmaps of registers in _regs[] that have been written */ 355 u16 regs_dirty; 356 /* modrm */ 357 u8 modrm; 358 u8 modrm_mod; 359 u8 modrm_reg; 360 u8 modrm_rm; 361 u8 modrm_seg; 362 u8 seg_override; 363 u64 d; 364 unsigned long _eip; 365 366 /* Here begins the usercopy section. */ 367 struct operand src; 368 struct operand src2; 369 struct operand dst; 370 struct operand memop; 371 unsigned long _regs[NR_EMULATOR_GPRS]; 372 struct operand *memopp; 373 struct fetch_cache fetch; 374 struct read_cache io_read; 375 struct read_cache mem_read; 376 bool is_branch; 377 }; 378 379 #define KVM_EMULATOR_BUG_ON(cond, ctxt) \ 380 ({ \ 381 int __ret = (cond); \ 382 \ 383 if (WARN_ON_ONCE(__ret)) \ 384 ctxt->ops->vm_bugged(ctxt); \ 385 unlikely(__ret); \ 386 }) 387 388 /* Repeat String Operation Prefix */ 389 #define REPE_PREFIX 0xf3 390 #define REPNE_PREFIX 0xf2 391 392 /* CPUID vendors */ 393 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 394 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 395 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 396 397 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 398 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 399 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 400 401 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948 402 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975 403 #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e 404 405 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 406 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e 407 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 408 409 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543 410 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561 411 #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561 412 is_guest_vendor_intel(u32 ebx,u32 ecx,u32 edx)413 static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx) 414 { 415 return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx && 416 ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx && 417 edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx; 418 } 419 is_guest_vendor_amd(u32 ebx,u32 ecx,u32 edx)420 static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx) 421 { 422 return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx && 423 ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx && 424 edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) || 425 (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx && 426 ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx && 427 edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx); 428 } 429 is_guest_vendor_hygon(u32 ebx,u32 ecx,u32 edx)430 static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx) 431 { 432 return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx && 433 ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx && 434 edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx; 435 } 436 437 enum x86_intercept_stage { 438 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ 439 X86_ICPT_PRE_EXCEPT, 440 X86_ICPT_POST_EXCEPT, 441 X86_ICPT_POST_MEMACCESS, 442 }; 443 444 enum x86_intercept { 445 x86_intercept_none, 446 x86_intercept_cr_read, 447 x86_intercept_cr_write, 448 x86_intercept_clts, 449 x86_intercept_lmsw, 450 x86_intercept_smsw, 451 x86_intercept_dr_read, 452 x86_intercept_dr_write, 453 x86_intercept_lidt, 454 x86_intercept_sidt, 455 x86_intercept_lgdt, 456 x86_intercept_sgdt, 457 x86_intercept_lldt, 458 x86_intercept_sldt, 459 x86_intercept_ltr, 460 x86_intercept_str, 461 x86_intercept_rdtsc, 462 x86_intercept_rdpmc, 463 x86_intercept_pushf, 464 x86_intercept_popf, 465 x86_intercept_cpuid, 466 x86_intercept_rsm, 467 x86_intercept_iret, 468 x86_intercept_intn, 469 x86_intercept_invd, 470 x86_intercept_pause, 471 x86_intercept_hlt, 472 x86_intercept_invlpg, 473 x86_intercept_invlpga, 474 x86_intercept_vmrun, 475 x86_intercept_vmload, 476 x86_intercept_vmsave, 477 x86_intercept_vmmcall, 478 x86_intercept_stgi, 479 x86_intercept_clgi, 480 x86_intercept_skinit, 481 x86_intercept_rdtscp, 482 x86_intercept_rdpid, 483 x86_intercept_icebp, 484 x86_intercept_wbinvd, 485 x86_intercept_monitor, 486 x86_intercept_mwait, 487 x86_intercept_rdmsr, 488 x86_intercept_wrmsr, 489 x86_intercept_in, 490 x86_intercept_ins, 491 x86_intercept_out, 492 x86_intercept_outs, 493 x86_intercept_xsetbv, 494 495 nr_x86_intercepts 496 }; 497 498 /* Host execution mode. */ 499 #if defined(CONFIG_X86_32) 500 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32 501 #elif defined(CONFIG_X86_64) 502 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64 503 #endif 504 505 int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type); 506 bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt); 507 #define EMULATION_FAILED -1 508 #define EMULATION_OK 0 509 #define EMULATION_RESTART 1 510 #define EMULATION_INTERCEPTED 2 511 void init_decode_cache(struct x86_emulate_ctxt *ctxt); 512 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt); 513 int emulator_task_switch(struct x86_emulate_ctxt *ctxt, 514 u16 tss_selector, int idt_index, int reason, 515 bool has_error_code, u32 error_code); 516 int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq); 517 void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt); 518 void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt); 519 bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt); 520 reg_read(struct x86_emulate_ctxt * ctxt,unsigned nr)521 static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr) 522 { 523 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 524 nr &= NR_EMULATOR_GPRS - 1; 525 526 if (!(ctxt->regs_valid & (1 << nr))) { 527 ctxt->regs_valid |= 1 << nr; 528 ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr); 529 } 530 return ctxt->_regs[nr]; 531 } 532 reg_write(struct x86_emulate_ctxt * ctxt,unsigned nr)533 static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr) 534 { 535 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 536 nr &= NR_EMULATOR_GPRS - 1; 537 538 BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 539 BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 540 541 ctxt->regs_valid |= 1 << nr; 542 ctxt->regs_dirty |= 1 << nr; 543 return &ctxt->_regs[nr]; 544 } 545 reg_rmw(struct x86_emulate_ctxt * ctxt,unsigned nr)546 static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr) 547 { 548 reg_read(ctxt, nr); 549 return reg_write(ctxt, nr); 550 } 551 552 #endif /* _ASM_X86_KVM_X86_EMULATE_H */ 553