1  /* SPDX-License-Identifier: GPL-2.0-only */
2  /*
3   * Pin-multiplex helper macros for TI DaVinci family devices
4   *
5   * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
6   *
7   * 2007 (c) MontaVista Software, Inc.
8   *
9   * Copyright (C) 2008 Texas Instruments.
10   */
11  #ifndef _MACH_DAVINCI_MUX_H_
12  #define _MACH_DAVINCI_MUX_H_
13  
14  struct mux_config {
15  	const char *name;
16  	const char *mux_reg_name;
17  	const unsigned char mux_reg;
18  	const unsigned char mask_offset;
19  	const unsigned char mask;
20  	const unsigned char mode;
21  	bool debug;
22  };
23  
24  enum da830_index {
25  	DA830_GPIO7_14,
26  	DA830_RTCK,
27  	DA830_GPIO7_15,
28  	DA830_EMU_0,
29  	DA830_EMB_SDCKE,
30  	DA830_EMB_CLK_GLUE,
31  	DA830_EMB_CLK,
32  	DA830_NEMB_CS_0,
33  	DA830_NEMB_CAS,
34  	DA830_NEMB_RAS,
35  	DA830_NEMB_WE,
36  	DA830_EMB_BA_1,
37  	DA830_EMB_BA_0,
38  	DA830_EMB_A_0,
39  	DA830_EMB_A_1,
40  	DA830_EMB_A_2,
41  	DA830_EMB_A_3,
42  	DA830_EMB_A_4,
43  	DA830_EMB_A_5,
44  	DA830_GPIO7_0,
45  	DA830_GPIO7_1,
46  	DA830_GPIO7_2,
47  	DA830_GPIO7_3,
48  	DA830_GPIO7_4,
49  	DA830_GPIO7_5,
50  	DA830_GPIO7_6,
51  	DA830_GPIO7_7,
52  	DA830_EMB_A_6,
53  	DA830_EMB_A_7,
54  	DA830_EMB_A_8,
55  	DA830_EMB_A_9,
56  	DA830_EMB_A_10,
57  	DA830_EMB_A_11,
58  	DA830_EMB_A_12,
59  	DA830_EMB_D_31,
60  	DA830_GPIO7_8,
61  	DA830_GPIO7_9,
62  	DA830_GPIO7_10,
63  	DA830_GPIO7_11,
64  	DA830_GPIO7_12,
65  	DA830_GPIO7_13,
66  	DA830_GPIO3_13,
67  	DA830_EMB_D_30,
68  	DA830_EMB_D_29,
69  	DA830_EMB_D_28,
70  	DA830_EMB_D_27,
71  	DA830_EMB_D_26,
72  	DA830_EMB_D_25,
73  	DA830_EMB_D_24,
74  	DA830_EMB_D_23,
75  	DA830_EMB_D_22,
76  	DA830_EMB_D_21,
77  	DA830_EMB_D_20,
78  	DA830_EMB_D_19,
79  	DA830_EMB_D_18,
80  	DA830_EMB_D_17,
81  	DA830_EMB_D_16,
82  	DA830_NEMB_WE_DQM_3,
83  	DA830_NEMB_WE_DQM_2,
84  	DA830_EMB_D_0,
85  	DA830_EMB_D_1,
86  	DA830_EMB_D_2,
87  	DA830_EMB_D_3,
88  	DA830_EMB_D_4,
89  	DA830_EMB_D_5,
90  	DA830_EMB_D_6,
91  	DA830_GPIO6_0,
92  	DA830_GPIO6_1,
93  	DA830_GPIO6_2,
94  	DA830_GPIO6_3,
95  	DA830_GPIO6_4,
96  	DA830_GPIO6_5,
97  	DA830_GPIO6_6,
98  	DA830_EMB_D_7,
99  	DA830_EMB_D_8,
100  	DA830_EMB_D_9,
101  	DA830_EMB_D_10,
102  	DA830_EMB_D_11,
103  	DA830_EMB_D_12,
104  	DA830_EMB_D_13,
105  	DA830_EMB_D_14,
106  	DA830_GPIO6_7,
107  	DA830_GPIO6_8,
108  	DA830_GPIO6_9,
109  	DA830_GPIO6_10,
110  	DA830_GPIO6_11,
111  	DA830_GPIO6_12,
112  	DA830_GPIO6_13,
113  	DA830_GPIO6_14,
114  	DA830_EMB_D_15,
115  	DA830_NEMB_WE_DQM_1,
116  	DA830_NEMB_WE_DQM_0,
117  	DA830_SPI0_SOMI_0,
118  	DA830_SPI0_SIMO_0,
119  	DA830_SPI0_CLK,
120  	DA830_NSPI0_ENA,
121  	DA830_NSPI0_SCS_0,
122  	DA830_EQEP0I,
123  	DA830_EQEP0S,
124  	DA830_EQEP1I,
125  	DA830_NUART0_CTS,
126  	DA830_NUART0_RTS,
127  	DA830_EQEP0A,
128  	DA830_EQEP0B,
129  	DA830_GPIO6_15,
130  	DA830_GPIO5_14,
131  	DA830_GPIO5_15,
132  	DA830_GPIO5_0,
133  	DA830_GPIO5_1,
134  	DA830_GPIO5_2,
135  	DA830_GPIO5_3,
136  	DA830_GPIO5_4,
137  	DA830_SPI1_SOMI_0,
138  	DA830_SPI1_SIMO_0,
139  	DA830_SPI1_CLK,
140  	DA830_UART0_RXD,
141  	DA830_UART0_TXD,
142  	DA830_AXR1_10,
143  	DA830_AXR1_11,
144  	DA830_NSPI1_ENA,
145  	DA830_I2C1_SCL,
146  	DA830_I2C1_SDA,
147  	DA830_EQEP1S,
148  	DA830_I2C0_SDA,
149  	DA830_I2C0_SCL,
150  	DA830_UART2_RXD,
151  	DA830_TM64P0_IN12,
152  	DA830_TM64P0_OUT12,
153  	DA830_GPIO5_5,
154  	DA830_GPIO5_6,
155  	DA830_GPIO5_7,
156  	DA830_GPIO5_8,
157  	DA830_GPIO5_9,
158  	DA830_GPIO5_10,
159  	DA830_GPIO5_11,
160  	DA830_GPIO5_12,
161  	DA830_NSPI1_SCS_0,
162  	DA830_USB0_DRVVBUS,
163  	DA830_AHCLKX0,
164  	DA830_ACLKX0,
165  	DA830_AFSX0,
166  	DA830_AHCLKR0,
167  	DA830_ACLKR0,
168  	DA830_AFSR0,
169  	DA830_UART2_TXD,
170  	DA830_AHCLKX2,
171  	DA830_ECAP0_APWM0,
172  	DA830_RMII_MHZ_50_CLK,
173  	DA830_ECAP1_APWM1,
174  	DA830_USB_REFCLKIN,
175  	DA830_GPIO5_13,
176  	DA830_GPIO4_15,
177  	DA830_GPIO2_11,
178  	DA830_GPIO2_12,
179  	DA830_GPIO2_13,
180  	DA830_GPIO2_14,
181  	DA830_GPIO2_15,
182  	DA830_GPIO3_12,
183  	DA830_AMUTE0,
184  	DA830_AXR0_0,
185  	DA830_AXR0_1,
186  	DA830_AXR0_2,
187  	DA830_AXR0_3,
188  	DA830_AXR0_4,
189  	DA830_AXR0_5,
190  	DA830_AXR0_6,
191  	DA830_RMII_TXD_0,
192  	DA830_RMII_TXD_1,
193  	DA830_RMII_TXEN,
194  	DA830_RMII_CRS_DV,
195  	DA830_RMII_RXD_0,
196  	DA830_RMII_RXD_1,
197  	DA830_RMII_RXER,
198  	DA830_AFSR2,
199  	DA830_ACLKX2,
200  	DA830_AXR2_3,
201  	DA830_AXR2_2,
202  	DA830_AXR2_1,
203  	DA830_AFSX2,
204  	DA830_ACLKR2,
205  	DA830_NRESETOUT,
206  	DA830_GPIO3_0,
207  	DA830_GPIO3_1,
208  	DA830_GPIO3_2,
209  	DA830_GPIO3_3,
210  	DA830_GPIO3_4,
211  	DA830_GPIO3_5,
212  	DA830_GPIO3_6,
213  	DA830_AXR0_7,
214  	DA830_AXR0_8,
215  	DA830_UART1_RXD,
216  	DA830_UART1_TXD,
217  	DA830_AXR0_11,
218  	DA830_AHCLKX1,
219  	DA830_ACLKX1,
220  	DA830_AFSX1,
221  	DA830_MDIO_CLK,
222  	DA830_MDIO_D,
223  	DA830_AXR0_9,
224  	DA830_AXR0_10,
225  	DA830_EPWM0B,
226  	DA830_EPWM0A,
227  	DA830_EPWMSYNCI,
228  	DA830_AXR2_0,
229  	DA830_EPWMSYNC0,
230  	DA830_GPIO3_7,
231  	DA830_GPIO3_8,
232  	DA830_GPIO3_9,
233  	DA830_GPIO3_10,
234  	DA830_GPIO3_11,
235  	DA830_GPIO3_14,
236  	DA830_GPIO3_15,
237  	DA830_GPIO4_10,
238  	DA830_AHCLKR1,
239  	DA830_ACLKR1,
240  	DA830_AFSR1,
241  	DA830_AMUTE1,
242  	DA830_AXR1_0,
243  	DA830_AXR1_1,
244  	DA830_AXR1_2,
245  	DA830_AXR1_3,
246  	DA830_ECAP2_APWM2,
247  	DA830_EHRPWMGLUETZ,
248  	DA830_EQEP1A,
249  	DA830_GPIO4_11,
250  	DA830_GPIO4_12,
251  	DA830_GPIO4_13,
252  	DA830_GPIO4_14,
253  	DA830_GPIO4_0,
254  	DA830_GPIO4_1,
255  	DA830_GPIO4_2,
256  	DA830_GPIO4_3,
257  	DA830_AXR1_4,
258  	DA830_AXR1_5,
259  	DA830_AXR1_6,
260  	DA830_AXR1_7,
261  	DA830_AXR1_8,
262  	DA830_AXR1_9,
263  	DA830_EMA_D_0,
264  	DA830_EMA_D_1,
265  	DA830_EQEP1B,
266  	DA830_EPWM2B,
267  	DA830_EPWM2A,
268  	DA830_EPWM1B,
269  	DA830_EPWM1A,
270  	DA830_MMCSD_DAT_0,
271  	DA830_MMCSD_DAT_1,
272  	DA830_UHPI_HD_0,
273  	DA830_UHPI_HD_1,
274  	DA830_GPIO4_4,
275  	DA830_GPIO4_5,
276  	DA830_GPIO4_6,
277  	DA830_GPIO4_7,
278  	DA830_GPIO4_8,
279  	DA830_GPIO4_9,
280  	DA830_GPIO0_0,
281  	DA830_GPIO0_1,
282  	DA830_EMA_D_2,
283  	DA830_EMA_D_3,
284  	DA830_EMA_D_4,
285  	DA830_EMA_D_5,
286  	DA830_EMA_D_6,
287  	DA830_EMA_D_7,
288  	DA830_EMA_D_8,
289  	DA830_EMA_D_9,
290  	DA830_MMCSD_DAT_2,
291  	DA830_MMCSD_DAT_3,
292  	DA830_MMCSD_DAT_4,
293  	DA830_MMCSD_DAT_5,
294  	DA830_MMCSD_DAT_6,
295  	DA830_MMCSD_DAT_7,
296  	DA830_UHPI_HD_8,
297  	DA830_UHPI_HD_9,
298  	DA830_UHPI_HD_2,
299  	DA830_UHPI_HD_3,
300  	DA830_UHPI_HD_4,
301  	DA830_UHPI_HD_5,
302  	DA830_UHPI_HD_6,
303  	DA830_UHPI_HD_7,
304  	DA830_LCD_D_8,
305  	DA830_LCD_D_9,
306  	DA830_GPIO0_2,
307  	DA830_GPIO0_3,
308  	DA830_GPIO0_4,
309  	DA830_GPIO0_5,
310  	DA830_GPIO0_6,
311  	DA830_GPIO0_7,
312  	DA830_GPIO0_8,
313  	DA830_GPIO0_9,
314  	DA830_EMA_D_10,
315  	DA830_EMA_D_11,
316  	DA830_EMA_D_12,
317  	DA830_EMA_D_13,
318  	DA830_EMA_D_14,
319  	DA830_EMA_D_15,
320  	DA830_EMA_A_0,
321  	DA830_EMA_A_1,
322  	DA830_UHPI_HD_10,
323  	DA830_UHPI_HD_11,
324  	DA830_UHPI_HD_12,
325  	DA830_UHPI_HD_13,
326  	DA830_UHPI_HD_14,
327  	DA830_UHPI_HD_15,
328  	DA830_LCD_D_7,
329  	DA830_MMCSD_CLK,
330  	DA830_LCD_D_10,
331  	DA830_LCD_D_11,
332  	DA830_LCD_D_12,
333  	DA830_LCD_D_13,
334  	DA830_LCD_D_14,
335  	DA830_LCD_D_15,
336  	DA830_UHPI_HCNTL0,
337  	DA830_GPIO0_10,
338  	DA830_GPIO0_11,
339  	DA830_GPIO0_12,
340  	DA830_GPIO0_13,
341  	DA830_GPIO0_14,
342  	DA830_GPIO0_15,
343  	DA830_GPIO1_0,
344  	DA830_GPIO1_1,
345  	DA830_EMA_A_2,
346  	DA830_EMA_A_3,
347  	DA830_EMA_A_4,
348  	DA830_EMA_A_5,
349  	DA830_EMA_A_6,
350  	DA830_EMA_A_7,
351  	DA830_EMA_A_8,
352  	DA830_EMA_A_9,
353  	DA830_MMCSD_CMD,
354  	DA830_LCD_D_6,
355  	DA830_LCD_D_3,
356  	DA830_LCD_D_2,
357  	DA830_LCD_D_1,
358  	DA830_LCD_D_0,
359  	DA830_LCD_PCLK,
360  	DA830_LCD_HSYNC,
361  	DA830_UHPI_HCNTL1,
362  	DA830_GPIO1_2,
363  	DA830_GPIO1_3,
364  	DA830_GPIO1_4,
365  	DA830_GPIO1_5,
366  	DA830_GPIO1_6,
367  	DA830_GPIO1_7,
368  	DA830_GPIO1_8,
369  	DA830_GPIO1_9,
370  	DA830_EMA_A_10,
371  	DA830_EMA_A_11,
372  	DA830_EMA_A_12,
373  	DA830_EMA_BA_1,
374  	DA830_EMA_BA_0,
375  	DA830_EMA_CLK,
376  	DA830_EMA_SDCKE,
377  	DA830_NEMA_CAS,
378  	DA830_LCD_VSYNC,
379  	DA830_NLCD_AC_ENB_CS,
380  	DA830_LCD_MCLK,
381  	DA830_LCD_D_5,
382  	DA830_LCD_D_4,
383  	DA830_OBSCLK,
384  	DA830_NEMA_CS_4,
385  	DA830_UHPI_HHWIL,
386  	DA830_AHCLKR2,
387  	DA830_GPIO1_10,
388  	DA830_GPIO1_11,
389  	DA830_GPIO1_12,
390  	DA830_GPIO1_13,
391  	DA830_GPIO1_14,
392  	DA830_GPIO1_15,
393  	DA830_GPIO2_0,
394  	DA830_GPIO2_1,
395  	DA830_NEMA_RAS,
396  	DA830_NEMA_WE,
397  	DA830_NEMA_CS_0,
398  	DA830_NEMA_CS_2,
399  	DA830_NEMA_CS_3,
400  	DA830_NEMA_OE,
401  	DA830_NEMA_WE_DQM_1,
402  	DA830_NEMA_WE_DQM_0,
403  	DA830_NEMA_CS_5,
404  	DA830_UHPI_HRNW,
405  	DA830_NUHPI_HAS,
406  	DA830_NUHPI_HCS,
407  	DA830_NUHPI_HDS1,
408  	DA830_NUHPI_HDS2,
409  	DA830_NUHPI_HINT,
410  	DA830_AXR0_12,
411  	DA830_AMUTE2,
412  	DA830_AXR0_13,
413  	DA830_AXR0_14,
414  	DA830_AXR0_15,
415  	DA830_GPIO2_2,
416  	DA830_GPIO2_3,
417  	DA830_GPIO2_4,
418  	DA830_GPIO2_5,
419  	DA830_GPIO2_6,
420  	DA830_GPIO2_7,
421  	DA830_GPIO2_8,
422  	DA830_GPIO2_9,
423  	DA830_EMA_WAIT_0,
424  	DA830_NUHPI_HRDY,
425  	DA830_GPIO2_10,
426  };
427  
428  enum davinci_da850_index {
429  	/* UART0 function */
430  	DA850_NUART0_CTS,
431  	DA850_NUART0_RTS,
432  	DA850_UART0_RXD,
433  	DA850_UART0_TXD,
434  
435  	/* UART1 function */
436  	DA850_NUART1_CTS,
437  	DA850_NUART1_RTS,
438  	DA850_UART1_RXD,
439  	DA850_UART1_TXD,
440  
441  	/* UART2 function */
442  	DA850_NUART2_CTS,
443  	DA850_NUART2_RTS,
444  	DA850_UART2_RXD,
445  	DA850_UART2_TXD,
446  
447  	/* I2C1 function */
448  	DA850_I2C1_SCL,
449  	DA850_I2C1_SDA,
450  
451  	/* I2C0 function */
452  	DA850_I2C0_SDA,
453  	DA850_I2C0_SCL,
454  
455  	/* EMAC function */
456  	DA850_MII_TXEN,
457  	DA850_MII_TXCLK,
458  	DA850_MII_COL,
459  	DA850_MII_TXD_3,
460  	DA850_MII_TXD_2,
461  	DA850_MII_TXD_1,
462  	DA850_MII_TXD_0,
463  	DA850_MII_RXER,
464  	DA850_MII_CRS,
465  	DA850_MII_RXCLK,
466  	DA850_MII_RXDV,
467  	DA850_MII_RXD_3,
468  	DA850_MII_RXD_2,
469  	DA850_MII_RXD_1,
470  	DA850_MII_RXD_0,
471  	DA850_MDIO_CLK,
472  	DA850_MDIO_D,
473  	DA850_RMII_TXD_0,
474  	DA850_RMII_TXD_1,
475  	DA850_RMII_TXEN,
476  	DA850_RMII_CRS_DV,
477  	DA850_RMII_RXD_0,
478  	DA850_RMII_RXD_1,
479  	DA850_RMII_RXER,
480  	DA850_RMII_MHZ_50_CLK,
481  
482  	/* McASP function */
483  	DA850_ACLKR,
484  	DA850_ACLKX,
485  	DA850_AFSR,
486  	DA850_AFSX,
487  	DA850_AHCLKR,
488  	DA850_AHCLKX,
489  	DA850_AMUTE,
490  	DA850_AXR_15,
491  	DA850_AXR_14,
492  	DA850_AXR_13,
493  	DA850_AXR_12,
494  	DA850_AXR_11,
495  	DA850_AXR_10,
496  	DA850_AXR_9,
497  	DA850_AXR_8,
498  	DA850_AXR_7,
499  	DA850_AXR_6,
500  	DA850_AXR_5,
501  	DA850_AXR_4,
502  	DA850_AXR_3,
503  	DA850_AXR_2,
504  	DA850_AXR_1,
505  	DA850_AXR_0,
506  
507  	/* LCD function */
508  	DA850_LCD_D_7,
509  	DA850_LCD_D_6,
510  	DA850_LCD_D_5,
511  	DA850_LCD_D_4,
512  	DA850_LCD_D_3,
513  	DA850_LCD_D_2,
514  	DA850_LCD_D_1,
515  	DA850_LCD_D_0,
516  	DA850_LCD_D_15,
517  	DA850_LCD_D_14,
518  	DA850_LCD_D_13,
519  	DA850_LCD_D_12,
520  	DA850_LCD_D_11,
521  	DA850_LCD_D_10,
522  	DA850_LCD_D_9,
523  	DA850_LCD_D_8,
524  	DA850_LCD_PCLK,
525  	DA850_LCD_HSYNC,
526  	DA850_LCD_VSYNC,
527  	DA850_NLCD_AC_ENB_CS,
528  
529  	/* MMC/SD0 function */
530  	DA850_MMCSD0_DAT_0,
531  	DA850_MMCSD0_DAT_1,
532  	DA850_MMCSD0_DAT_2,
533  	DA850_MMCSD0_DAT_3,
534  	DA850_MMCSD0_CLK,
535  	DA850_MMCSD0_CMD,
536  
537  	/* MMC/SD1 function */
538  	DA850_MMCSD1_DAT_0,
539  	DA850_MMCSD1_DAT_1,
540  	DA850_MMCSD1_DAT_2,
541  	DA850_MMCSD1_DAT_3,
542  	DA850_MMCSD1_CLK,
543  	DA850_MMCSD1_CMD,
544  
545  	/* EMIF2.5/EMIFA function */
546  	DA850_EMA_D_7,
547  	DA850_EMA_D_6,
548  	DA850_EMA_D_5,
549  	DA850_EMA_D_4,
550  	DA850_EMA_D_3,
551  	DA850_EMA_D_2,
552  	DA850_EMA_D_1,
553  	DA850_EMA_D_0,
554  	DA850_EMA_A_1,
555  	DA850_EMA_A_2,
556  	DA850_NEMA_CS_3,
557  	DA850_NEMA_CS_4,
558  	DA850_NEMA_WE,
559  	DA850_NEMA_OE,
560  	DA850_EMA_D_15,
561  	DA850_EMA_D_14,
562  	DA850_EMA_D_13,
563  	DA850_EMA_D_12,
564  	DA850_EMA_D_11,
565  	DA850_EMA_D_10,
566  	DA850_EMA_D_9,
567  	DA850_EMA_D_8,
568  	DA850_EMA_A_0,
569  	DA850_EMA_A_3,
570  	DA850_EMA_A_4,
571  	DA850_EMA_A_5,
572  	DA850_EMA_A_6,
573  	DA850_EMA_A_7,
574  	DA850_EMA_A_8,
575  	DA850_EMA_A_9,
576  	DA850_EMA_A_10,
577  	DA850_EMA_A_11,
578  	DA850_EMA_A_12,
579  	DA850_EMA_A_13,
580  	DA850_EMA_A_14,
581  	DA850_EMA_A_15,
582  	DA850_EMA_A_16,
583  	DA850_EMA_A_17,
584  	DA850_EMA_A_18,
585  	DA850_EMA_A_19,
586  	DA850_EMA_A_20,
587  	DA850_EMA_A_21,
588  	DA850_EMA_A_22,
589  	DA850_EMA_A_23,
590  	DA850_EMA_BA_1,
591  	DA850_EMA_CLK,
592  	DA850_EMA_WAIT_1,
593  	DA850_NEMA_CS_2,
594  
595  	/* GPIO function */
596  	DA850_GPIO2_4,
597  	DA850_GPIO2_6,
598  	DA850_GPIO2_8,
599  	DA850_GPIO2_15,
600  	DA850_GPIO3_12,
601  	DA850_GPIO3_13,
602  	DA850_GPIO4_0,
603  	DA850_GPIO4_1,
604  	DA850_GPIO6_9,
605  	DA850_GPIO6_10,
606  	DA850_GPIO6_13,
607  	DA850_RTC_ALARM,
608  
609  	/* VPIF Capture */
610  	DA850_VPIF_DIN0,
611  	DA850_VPIF_DIN1,
612  	DA850_VPIF_DIN2,
613  	DA850_VPIF_DIN3,
614  	DA850_VPIF_DIN4,
615  	DA850_VPIF_DIN5,
616  	DA850_VPIF_DIN6,
617  	DA850_VPIF_DIN7,
618  	DA850_VPIF_DIN8,
619  	DA850_VPIF_DIN9,
620  	DA850_VPIF_DIN10,
621  	DA850_VPIF_DIN11,
622  	DA850_VPIF_DIN12,
623  	DA850_VPIF_DIN13,
624  	DA850_VPIF_DIN14,
625  	DA850_VPIF_DIN15,
626  	DA850_VPIF_CLKIN0,
627  	DA850_VPIF_CLKIN1,
628  	DA850_VPIF_CLKIN2,
629  	DA850_VPIF_CLKIN3,
630  
631  	/* VPIF Display */
632  	DA850_VPIF_DOUT0,
633  	DA850_VPIF_DOUT1,
634  	DA850_VPIF_DOUT2,
635  	DA850_VPIF_DOUT3,
636  	DA850_VPIF_DOUT4,
637  	DA850_VPIF_DOUT5,
638  	DA850_VPIF_DOUT6,
639  	DA850_VPIF_DOUT7,
640  	DA850_VPIF_DOUT8,
641  	DA850_VPIF_DOUT9,
642  	DA850_VPIF_DOUT10,
643  	DA850_VPIF_DOUT11,
644  	DA850_VPIF_DOUT12,
645  	DA850_VPIF_DOUT13,
646  	DA850_VPIF_DOUT14,
647  	DA850_VPIF_DOUT15,
648  	DA850_VPIF_CLKO2,
649  	DA850_VPIF_CLKO3,
650  };
651  
652  #define PINMUX(x)		(4 * (x))
653  
654  #ifdef CONFIG_DAVINCI_MUX
655  /* setup pin muxing */
656  extern int davinci_cfg_reg(unsigned long reg_cfg);
657  #else
658  /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
davinci_cfg_reg(unsigned long reg_cfg)659  static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
660  #endif
661  
662  
663  #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\
664  [soc##_##desc] = {							\
665  			.name =  #desc,					\
666  			.debug = dbg,					\
667  			.mux_reg_name = "PINMUX"#muxreg,		\
668  			.mux_reg = PINMUX(muxreg),			\
669  			.mask_offset = mode_offset,			\
670  			.mask = mode_mask,				\
671  			.mode = mux_mode,				\
672  		},
673  
674  #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg)	\
675  [soc##_##desc] = {							\
676  			.name =  #desc,					\
677  			.debug = dbg,					\
678  			.mux_reg_name = "INTMUX",			\
679  			.mux_reg = INTMUX,				\
680  			.mask_offset = mode_offset,			\
681  			.mask = mode_mask,				\
682  			.mode = mux_mode,				\
683  		},
684  
685  #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg)	\
686  [soc##_##desc] = {							\
687  			.name =  #desc,					\
688  			.debug = dbg,					\
689  			.mux_reg_name = "EVTMUX",			\
690  			.mux_reg = EVTMUX,				\
691  			.mask_offset = mode_offset,			\
692  			.mask = mode_mask,				\
693  			.mode = mux_mode,				\
694  		},
695  
696  #endif /* _MACH_DAVINCI_MUX_H */
697