| /linux-6.12.1/arch/x86/events/intel/ |
| D | p6.c | 164 (void)wrmsrl_safe(hwc->config_base, val); in p6_pmu_disable_event()
181 (void)wrmsrl_safe(hwc->config_base, val); in p6_pmu_enable_event()
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| D | knc.c | 185 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); in knc_pmu_disable_event()
196 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); in knc_pmu_enable_event()
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| D | p4.c | 913 (void)wrmsrl_safe(hwc->config_base, in p4_pmu_disable_event()
946 (void)wrmsrl_safe(MSR_IA32_PEBS_ENABLE, (u64)bind->metric_pebs); in p4_pmu_enable_pebs()
947 (void)wrmsrl_safe(MSR_P4_PEBS_MATRIX_VERT, (u64)bind->metric_vert); in p4_pmu_enable_pebs()
981 (void)wrmsrl_safe(escr_addr, escr_conf); in __p4_pmu_enable_event()
982 (void)wrmsrl_safe(hwc->config_base, in __p4_pmu_enable_event()
1400 wrmsrl_safe(reg, 0ULL); in p4_pmu_init()
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| D | lbr.c | 1596 if (wrmsrl_safe(MSR_ARCH_LBR_DEPTH, lbr_nr)) in intel_pmu_arch_lbr_init()
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| D | core.c | 2950 wrmsrl_safe(x86_pmu_config_addr(idx), 0ull); in intel_pmu_reset()
2951 wrmsrl_safe(x86_pmu_event_addr(idx), 0ull); in intel_pmu_reset()
2956 wrmsrl_safe(x86_pmu_fixed_ctr_addr(idx), 0ull); in intel_pmu_reset()
5455 if (wrmsrl_safe(msr, val_tmp) || in check_msr()
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| /linux-6.12.1/drivers/platform/x86/intel/ |
| D | turbo_max_3.c | 44 ret = wrmsrl_safe(MSR_OC_MAILBOX, value); in get_oc_core_priority()
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| /linux-6.12.1/arch/x86/lib/ |
| D | msr.c | 61 return wrmsrl_safe(msr, m->q); in msr_write()
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| /linux-6.12.1/arch/x86/kernel/cpu/ |
| D | amd.c | 608 else if (c->x86 >= 0x19 && !wrmsrl_safe(MSR_IA32_PRED_CMD, PRED_CMD_SBPB)) { in early_init_amd()
786 wrmsrl_safe(MSR_F15H_IC_CFG, value); in init_amd_bd()
836 wrmsrl_safe(MSR_ZEN2_SPECTRAL_CHICKEN, value); in init_spectral_chicken()
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| D | common.c | 160 wrmsrl_safe(info->msr_ppin_ctl, val | 2UL); in ppin_init()
2048 wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS); in idt_syscall_init()
2049 wrmsrl_safe(MSR_IA32_SYSENTER_ESP, in idt_syscall_init()
2051 wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat); in idt_syscall_init()
2054 wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG); in idt_syscall_init()
2055 wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL); in idt_syscall_init()
2056 wrmsrl_safe(MSR_IA32_SYSENTER_EIP, 0ULL); in idt_syscall_init()
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| D | intel.c | 983 if (wrmsrl_safe(MSR_TEST_CTRL, ctrl)) in split_lock_verify_msr()
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| /linux-6.12.1/arch/x86/include/asm/ |
| D | msr.h | 320 static inline int wrmsrl_safe(u32 msr, u64 val) in wrmsrl_safe() function
389 return wrmsrl_safe(msr_no, q); in wrmsrl_safe_on_cpu()
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| /linux-6.12.1/drivers/powercap/ |
| D | intel_rapl_msr.c | 126 ra->err = wrmsrl_safe(ra->reg.msr, val); in rapl_msr_update_func()
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| /linux-6.12.1/arch/x86/kernel/cpu/mce/ |
| D | inject.c | 749 wrmsrl_safe(mca_msr_reg(bank, MCA_STATUS), status); in check_hw_inj_possible()
751 wrmsrl_safe(mca_msr_reg(bank, MCA_STATUS), 0); in check_hw_inj_possible()
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| D | intel.c | 465 wrmsrl_safe(MSR_ERROR_CONTROL, error_control); in intel_imc_init()
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| /linux-6.12.1/drivers/thermal/intel/ |
| D | therm_throt.c | 646 wrmsrl_safe(MSR_HWP_STATUS, 0); in notify_hwp_interrupt()
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| /linux-6.12.1/drivers/platform/x86/intel/speed_select_if/ |
| D | isst_if_common.c | 214 wrmsrl_safe(sst_cmd->cmd, sst_cmd->data); in isst_restore_msr_local()
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| /linux-6.12.1/arch/x86/kernel/cpu/resctrl/ |
| D | core.c | 154 if (wrmsrl_safe(MSR_IA32_L3_CBM_BASE, max_cbm)) in cache_alloc_hsw_probe()
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| /linux-6.12.1/arch/x86/events/ |
| D | core.c | 319 ret = wrmsrl_safe(reg, val); in check_hw_exists()
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| /linux-6.12.1/drivers/cpufreq/ |
| D | intel_pstate.c | 1893 wrmsrl_safe(MSR_HWP_STATUS, 0); in notify_hwp_interrupt()
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| /linux-6.12.1/arch/x86/kvm/ |
| D | x86.c | 597 ret = wrmsrl_safe(msr, val); in kvm_probe_user_return_msr()
648 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value); in kvm_set_user_return_msr()
13640 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value)) in kvm_spec_ctrl_test_value()
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| /linux-6.12.1/arch/x86/kvm/svm/ |
| D | sev.c | 3145 if (WARN_ON_ONCE(wrmsrl_safe(MSR_AMD64_VM_PAGE_FLUSH, addr | asid))) in sev_flush_encrypted_page()
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