Searched refs:reg_val_offs (Results 1 – 9 of 9) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_gfx.c | 1019 uint32_t seq, reg_val_offs = 0, value = 0; in amdgpu_kiq_rreg() local
1032 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in amdgpu_kiq_rreg()
1040 amdgpu_ring_emit_rreg(ring, reg, reg_val_offs); in amdgpu_kiq_rreg()
1071 value = adev->wb.wb[reg_val_offs]; in amdgpu_kiq_rreg()
1072 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
1080 if (reg_val_offs) in amdgpu_kiq_rreg()
1081 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
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| D | amdgpu_virt.h | 247 uint32_t reg_val_offs; member
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| D | gfx_v9_0.c | 4155 uint32_t seq, reg_val_offs = 0; in gfx_v9_0_kiq_read_clock() local
4163 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in gfx_v9_0_kiq_read_clock()
4176 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4178 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4209 value = (uint64_t)adev->wb.wb[reg_val_offs] | in gfx_v9_0_kiq_read_clock()
4210 (uint64_t)adev->wb.wb[reg_val_offs + 1 ] << 32ULL; in gfx_v9_0_kiq_read_clock()
4211 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
4219 if (reg_val_offs) in gfx_v9_0_kiq_read_clock()
4220 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
5865 uint32_t reg_val_offs) in gfx_v9_0_ring_emit_rreg() argument
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| D | amdgpu_ring.h | 221 uint32_t reg_val_offs);
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| D | gfx_v9_4_3.c | 2996 uint32_t reg_val_offs) in gfx_v9_4_3_ring_emit_rreg() argument
3009 reg_val_offs * 4)); in gfx_v9_4_3_ring_emit_rreg()
3011 reg_val_offs * 4)); in gfx_v9_4_3_ring_emit_rreg()
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| D | gfx_v12_0.c | 4565 uint32_t reg_val_offs) in gfx_v12_0_ring_emit_rreg() argument
4576 reg_val_offs * 4)); in gfx_v12_0_ring_emit_rreg()
4578 reg_val_offs * 4)); in gfx_v12_0_ring_emit_rreg()
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| D | gfx_v8_0.c | 6345 uint32_t reg_val_offs) in gfx_v8_0_ring_emit_rreg() argument
6356 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
6358 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
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| D | gfx_v11_0.c | 6029 uint32_t reg_val_offs) in gfx_v11_0_ring_emit_rreg() argument
6040 reg_val_offs * 4)); in gfx_v11_0_ring_emit_rreg()
6042 reg_val_offs * 4)); in gfx_v11_0_ring_emit_rreg()
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| D | gfx_v10_0.c | 8879 uint32_t reg_val_offs) in gfx_v10_0_ring_emit_rreg() argument
8890 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
8892 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
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