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Searched refs:regUVD_VCPU_CACHE_SIZE5 (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_offset.h52 #define regUVD_VCPU_CACHE_SIZE5 … macro
Dvcn_5_0_0_offset.h390 #define regUVD_VCPU_CACHE_SIZE5 … macro
Dvcn_4_0_5_offset.h383 #define regUVD_VCPU_CACHE_SIZE5 … macro
Dvcn_4_0_0_offset.h400 #define regUVD_VCPU_CACHE_SIZE5 … macro
Dvcn_4_0_3_offset.h402 #define regUVD_VCPU_CACHE_SIZE5 … macro