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Searched refs:regRLC_SMU_SAFE_MODE (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ !
Dgc_9_4_3_offset.h6406 #define regRLC_SMU_SAFE_MODE … macro
Dgc_11_5_0_offset.h8959 #define regRLC_SMU_SAFE_MODE … macro
Dgc_12_0_0_offset.h6766 #define regRLC_SMU_SAFE_MODE … macro
Dgc_11_0_0_offset.h10308 #define regRLC_SMU_SAFE_MODE … macro
Dgc_11_0_3_offset.h10920 #define regRLC_SMU_SAFE_MODE … macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ !
Dgfx_v9_4_3.c105 SOC15_REG_ENTRY_STR(GC, 0, regRLC_SMU_SAFE_MODE),