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Searched refs:regRLC_LX6_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v12_0.c1896 tmp = RREG32_SOC15(GC, 0, regRLC_LX6_CNTL); in gfx_v12_0_load_rlc_iram_dram_microcode()
1899 WREG32_SOC15(GC, 0, regRLC_LX6_CNTL, tmp); in gfx_v12_0_load_rlc_iram_dram_microcode()
Dgfx_v11_0.c2183 tmp = RREG32_SOC15(GC, 0, regRLC_LX6_CNTL); in gfx_v11_0_load_rlc_iram_dram_microcode()
2186 WREG32_SOC15(GC, 0, regRLC_LX6_CNTL, tmp); in gfx_v11_0_load_rlc_iram_dram_microcode()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h8889 #define regRLC_LX6_CNTL macro
Dgc_12_0_0_offset.h6692 #define regRLC_LX6_CNTL macro
Dgc_11_0_0_offset.h10246 #define regRLC_LX6_CNTL macro
Dgc_11_0_3_offset.h10850 #define regRLC_LX6_CNTL macro