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Searched refs:regEFC_SUVD_CGC_CTRL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_5_0_0_offset.h101 #define regEFC_SUVD_CGC_CTRL_BASE_IDX … macro
Dvcn_4_0_5_offset.h116 #define regEFC_SUVD_CGC_CTRL_BASE_IDX … macro
Dvcn_4_0_0_offset.h117 #define regEFC_SUVD_CGC_CTRL_BASE_IDX … macro
Dvcn_4_0_3_offset.h117 #define regEFC_SUVD_CGC_CTRL_BASE_IDX … macro