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Searched refs:regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_3_1_4_offset.h6579 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddpcs_4_2_2_offset.h820 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddpcs_4_2_3_offset.h856 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddpcs_4_2_0_offset.h823 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_5_1_offset.h10019 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddcn_3_1_2_offset.h12032 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddcn_3_2_1_offset.h11315 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddcn_3_2_0_offset.h11306 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddcn_3_1_5_offset.h11897 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddcn_3_1_4_offset.h11141 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddcn_3_5_0_offset.h10040 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddcn_4_1_0_offset.h11590 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro
Ddcn_3_1_6_offset.h12388 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED52_BASE_IDX … macro