| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer_debug.c | 159 …(s->qos_level_high_wm * frac) / ref_clk_mhz / frac, (s->qos_level_high_wm * frac) / ref_clk_mhz % … in dcn10_get_hubp_states()
179 …(s->qos_level_high_wm * frac) / ref_clk_mhz / frac, (s->qos_level_high_wm * frac) / ref_clk_mhz % … in dcn10_get_hubp_states()
312 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_get_ttu_states()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn21/ |
| D | dcn21_hubp.c | 480 QoS_LEVEL_HIGH_WM, &ttu_attr.qos_level_high_wm); in hubp21_validate_dml_output()
485 if (ttu_attr.qos_level_high_wm != dml_ttu_attr->qos_level_high_wm) in hubp21_validate_dml_output()
487 dml_ttu_attr->qos_level_high_wm, ttu_attr.qos_level_high_wm); in hubp21_validate_dml_output()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| D | dcn20_hubp.c | 148 QoS_LEVEL_HIGH_WM, ttu_attr->qos_level_high_wm); in hubp2_program_deadline()
1228 QoS_LEVEL_HIGH_WM, &ttu_attr->qos_level_high_wm); in hubp2_read_state_common()
1292 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm); in hubp2_read_state_common()
1573 QoS_LEVEL_HIGH_WM, &ttu_attr.qos_level_high_wm); in hubp2_validate_dml_output()
1578 if (ttu_attr.qos_level_high_wm != dml_ttu_attr->qos_level_high_wm) in hubp2_validate_dml_output()
1580 dml_ttu_attr->qos_level_high_wm, ttu_attr.qos_level_high_wm); in hubp2_validate_dml_output()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| D | dml_top_dchub_registers.h | 63 uint32_t qos_level_high_wm; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| D | dcn401_hubp.c | 267 QoS_LEVEL_HIGH_WM, ttu_attr->qos_level_high_wm); in hubp401_program_deadline()
873 QoS_LEVEL_HIGH_WM, &ttu_attr->qos_level_high_wm); in hubp401_read_state()
937 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm); in hubp401_read_state()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_rq_dlg_helpers.c | 337 ttu_regs->qos_level_high_wm); in print__ttu_regs_st()
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| D | display_mode_structs.h | 677 unsigned int qos_level_high_wm; member
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| D | dml1_display_rq_dlg_calc.c | 1906 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml1_rq_dlg_get_dlg_params()
1908 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml1_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| D | dcn10_hubp.c | 653 QoS_LEVEL_HIGH_WM, ttu_attr->qos_level_high_wm); in hubp1_program_deadline()
993 QoS_LEVEL_HIGH_WM, &ttu_attr->qos_level_high_wm); in hubp1_read_state_common()
1057 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm); in hubp1_read_state_common()
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| D | dcn10_hubp.h | 688 uint32_t qos_level_high_wm; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | display_rq_dlg_calc_32.c | 543 ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal * ref_freq_to_pix_freq); in dml32_rq_dlg_get_dlg_reg()
608 ASSERT(ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml32_rq_dlg_get_dlg_reg()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/ |
| D | dml_display_rq_dlg_calc.c | 504 disp_ttu_regs->qos_level_high_wm = (dml_uint_t)(4.0 * (dml_float_t)htotal * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_reg()
568 ASSERT(disp_ttu_regs->qos_level_high_wm < (dml_uint_t) dml_pow(2, 14)); in dml_rq_dlg_get_dlg_reg()
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| D | dml2_translation_helper.c | 1484 out->ttu_regs.qos_level_high_wm = disp_ttu_regs->qos_level_high_wm; in dml2_update_pipe_ctx_dchub_regs()
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| D | display_mode_util.c | 305 dml_print("DML: qos_level_high_wm = 0x%x\n", ttu_regs->qos_level_high_wm); in dml_print_ttu_regs_st()
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| D | display_mode_core_structs.h | 1923 dml_uint_t qos_level_high_wm; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| D | dml21_utils.c | 228 out->ttu_regs.qos_level_high_wm = disp_ttu_regs->qos_level_high_wm; in dml21_update_pipe_ctx_dchub_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_rq_dlg_calc_21.c | 1622 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml_rq_dlg_get_dlg_params()
1624 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_rq_dlg_calc_31.c | 1529 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_params()
1530 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_rq_dlg_calc_30.c | 1710 disp_ttu_regs->qos_level_high_wm = (unsigned int)(4.0 * (double)htotal in dml_rq_dlg_get_dlg_params()
1712 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | display_rq_dlg_calc_314.c | 1617 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_params()
1618 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_rq_dlg_calc_20.c | 1514 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml20_rq_dlg_get_dlg_params()
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| D | display_rq_dlg_calc_20v2.c | 1515 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml20v2_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| D | dcn10_hwseq.c | 203 DTN_INFO_MICRO_SEC(s->qos_level_high_wm); in dcn10_log_hubp_states()
276 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_log_hubp_states()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| D | dml2_core_shared.c | 11865 …disp_ttu_regs->qos_level_high_wm = (unsigned int)(4.0 * (double)l->htotal * l->ref_freq_to_pix_fre… in rq_dlg_get_dlg_reg()
11922 DML2_ASSERT(disp_ttu_regs->qos_level_high_wm < (unsigned int)math_pow(2, 14)); in rq_dlg_get_dlg_reg()
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| D | dml2_core_dcn4_calcs.c | 12172 …disp_ttu_regs->qos_level_high_wm = (unsigned int)(4.0 * (double)l->htotal * l->ref_freq_to_pix_fre… in rq_dlg_get_dlg_reg()
12229 DML2_ASSERT(disp_ttu_regs->qos_level_high_wm < (unsigned int)math_pow(2, 14)); in rq_dlg_get_dlg_reg()
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