| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn21/ |
| D | dcn21_hubp.c | 146 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp21_program_requestor()
268 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs.plane1_base_address); in hubp21_validate_dml_output()
292 if (rq_regs.plane1_base_address != dml_rq_regs->plane1_base_address) in hubp21_validate_dml_output()
294 dml_rq_regs->plane1_base_address, rq_regs.plane1_base_address); in hubp21_validate_dml_output()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn201/ |
| D | dcn201_hubp.c | 72 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp201_program_requestor()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| D | dcn20_hubp.c | 203 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp2_program_requestor()
1125 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs->plane1_base_address); in hubp2_read_state_common()
1358 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs.plane1_base_address); in hubp2_validate_dml_output()
1383 if (rq_regs.plane1_base_address != dml_rq_regs->plane1_base_address) in hubp2_validate_dml_output()
1385 dml_rq_regs->plane1_base_address, rq_regs.plane1_base_address); in hubp2_validate_dml_output()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| D | dml_top_dchub_registers.h | 121 uint32_t plane1_base_address; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_rq_dlg_helpers.c | 187 dml_print("DML_RQ_DLG_CALC: plane1_base_address = 0x%0x\n", rq_regs->plane1_base_address); in print__rq_regs_st()
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| D | display_mode_structs.h | 716 unsigned int plane1_base_address; member
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| D | dml1_display_rq_dlg_calc.c | 269 rq_regs->plane1_base_address = detile_buf_plane1_addr; in dml1_extract_rq_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | display_rq_dlg_calc_32.c | 192 rq_regs->plane1_base_address = detile_buf_plane1_addr; in dml32_rq_dlg_get_rq_reg()
200 dml_print("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs->plane1_base_address); in dml32_rq_dlg_get_rq_reg()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/ |
| D | dml_display_rq_dlg_calc.c | 179 rq_regs->plane1_base_address = detile_buf_plane1_addr; in dml_rq_dlg_get_rq_reg()
187 dml_print("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs->plane1_base_address); in dml_rq_dlg_get_rq_reg()
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| D | dml2_translation_helper.c | 1432 out->rq_regs.plane1_base_address = rq_regs->plane1_base_address; in dml2_update_pipe_ctx_dchub_regs()
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| D | display_mode_util.c | 245 dml_print("DML: plane1_base_address = 0x%x\n", rq_regs->plane1_base_address); in dml_print_rq_regs_st()
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| D | display_mode_core_structs.h | 1971 dml_uint_t plane1_base_address; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| D | dml21_utils.c | 174 out->rq_regs.plane1_base_address = rq_regs->plane1_base_address; in dml21_update_pipe_ctx_dchub_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| D | dcn401_hubp.c | 176 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp401_program_requestor()
769 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs->plane1_base_address); in hubp401_read_state()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| D | dcn10_hubp.c | 559 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp1_program_requestor()
880 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs->plane1_base_address); in hubp1_read_state_common()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_rq_dlg_calc_31.c | 154 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
159 dml_print("DML_DLG: %s: plane1_base_address = %0d\n", __func__, rq_regs->plane1_base_address); in extract_rq_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer_debug.c | 214 rq_regs->crq_expansion_mode, rq_regs->plane1_base_address, rq_regs->rq_regs_l.chunk_size, in dcn10_get_rq_states()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | display_rq_dlg_calc_314.c | 242 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
247 dml_print("DML_DLG: %s: plane1_base_address = %0d\n", __func__, rq_regs->plane1_base_address); in extract_rq_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_rq_dlg_calc_21.c | 212 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_rq_dlg_calc_20.c | 231 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
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| D | display_rq_dlg_calc_20v2.c | 231 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_rq_dlg_calc_30.c | 155 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| D | dcn10_hwseq.c | 219 rq_regs->crq_expansion_mode, rq_regs->plane1_base_address, rq_regs->rq_regs_l.chunk_size, in dcn10_log_hubp_states()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| D | dml2_core_shared.c | 11587 rq_regs->plane1_base_address = detile_buf_plane1_addr; in rq_dlg_get_rq_reg()
11595 dml2_printf("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs->plane1_base_address); in rq_dlg_get_rq_reg()
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| D | dml2_core_dcn4_calcs.c | 11904 rq_regs->plane1_base_address = detile_buf_plane1_addr; in rq_dlg_get_rq_reg()
11912 dml2_printf("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs->plane1_base_address); in rq_dlg_get_rq_reg()
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