Searched refs:mmUVD_RB_BASE_HI3 (Results 1 – 10 of 10) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_6_0_d.h | 59 #define mmUVD_RB_BASE_HI3 0x3d1e macro
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| D | uvd_7_0_offset.h | 134 #define mmUVD_RB_BASE_HI3 … macro
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| D | vcn_1_0_offset.h | 294 #define mmUVD_RB_BASE_HI3 … macro
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| D | vcn_2_5_offset.h | 573 #define mmUVD_RB_BASE_HI3 … macro
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| D | vcn_2_0_0_offset.h | 484 #define mmUVD_RB_BASE_HI3 … macro
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| D | vcn_3_0_0_offset.h | 903 #define mmUVD_RB_BASE_HI3 … macro
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | vcn_v1_0.c | 60 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_HI3),
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| D | vcn_v2_0.c | 68 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_HI3),
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| D | vcn_v2_5.c | 71 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_HI3),
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| D | vcn_v3_0.c | 75 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_HI3),
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