Searched refs:mmSCRATCH_REG0 (Results 1 – 16 of 16) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_4_1_offset.h | 213 #define mmSCRATCH_REG0 … macro
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D | gc_9_0_offset.h | 4641 #define mmSCRATCH_REG0 … macro
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D | gc_9_1_offset.h | 4871 #define mmSCRATCH_REG0 … macro
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D | gc_9_2_1_offset.h | 4827 #define mmSCRATCH_REG0 … macro
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D | gc_10_1_0_offset.h | 7125 #define mmSCRATCH_REG0 … macro
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D | gc_10_3_0_offset.h | 6748 #define mmSCRATCH_REG0 … macro
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/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | gfx_v6_0.c | 1773 WREG32(mmSCRATCH_REG0, 0xCAFEDEAD); in gfx_v6_0_ring_test_ring() 1780 amdgpu_ring_write(ring, mmSCRATCH_REG0 - PACKET3_SET_CONFIG_REG_START); in gfx_v6_0_ring_test_ring() 1785 tmp = RREG32(mmSCRATCH_REG0); in gfx_v6_0_ring_test_ring() 1880 WREG32(mmSCRATCH_REG0, 0xCAFEDEAD); in gfx_v6_0_ring_test_ib() 1887 ib.ptr[1] = mmSCRATCH_REG0 - PACKET3_SET_CONFIG_REG_START; in gfx_v6_0_ring_test_ib() 1902 tmp = RREG32(mmSCRATCH_REG0); in gfx_v6_0_ring_test_ib()
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D | gfx_v7_0.c | 2031 WREG32(mmSCRATCH_REG0, 0xCAFEDEAD); in gfx_v7_0_ring_test_ring() 2037 amdgpu_ring_write(ring, mmSCRATCH_REG0 - PACKET3_SET_UCONFIG_REG_START); in gfx_v7_0_ring_test_ring() 2042 tmp = RREG32(mmSCRATCH_REG0); in gfx_v7_0_ring_test_ring() 2298 WREG32(mmSCRATCH_REG0, 0xCAFEDEAD); in gfx_v7_0_ring_test_ib() 2305 ib.ptr[1] = mmSCRATCH_REG0 - PACKET3_SET_UCONFIG_REG_START; in gfx_v7_0_ring_test_ib() 2320 tmp = RREG32(mmSCRATCH_REG0); in gfx_v7_0_ring_test_ib()
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D | gfx_v8_0.c | 845 WREG32(mmSCRATCH_REG0, 0xCAFEDEAD); in gfx_v8_0_ring_test_ring() 851 amdgpu_ring_write(ring, mmSCRATCH_REG0 - PACKET3_SET_UCONFIG_REG_START); in gfx_v8_0_ring_test_ring() 856 tmp = RREG32(mmSCRATCH_REG0); in gfx_v8_0_ring_test_ring()
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D | gfx_v9_0.c | 1170 uint32_t scratch = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v9_0_ring_test_ring() 1814 reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v9_0_init_rlcg_reg_access_ctrl()
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D | gfx_v10_0.c | 3948 uint32_t scratch = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v10_0_ring_test_ring() 4298 reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v10_0_init_rlcg_reg_access_ctrl()
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_6_0_d.h | 1181 #define mmSCRATCH_REG0 0x2140 macro
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D | gfx_7_2_d.h | 416 #define mmSCRATCH_REG0 0xc040 macro
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D | gfx_7_0_d.h | 404 #define mmSCRATCH_REG0 0xc040 macro
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D | gfx_8_0_d.h | 454 #define mmSCRATCH_REG0 0xc040 macro
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D | gfx_8_1_d.h | 454 #define mmSCRATCH_REG0 0xc040 macro
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