Searched refs:mmRLC_CP_SCHEDULERS (Results 1 – 12 of 12) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_amdkfd_gfx_v8.c | 177 value = RREG32(mmRLC_CP_SCHEDULERS); in kgd_hqd_load()
180 WREG32(mmRLC_CP_SCHEDULERS, value); in kgd_hqd_load()
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| D | amdgpu_amdkfd_gfx_v10_3.c | 202 value = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS); in hqd_load_v10_3()
205 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, value); in hqd_load_v10_3()
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| D | gfx_v8_0.c | 4304 tmp = RREG32(mmRLC_CP_SCHEDULERS); in gfx_v8_0_kiq_setting()
4307 WREG32(mmRLC_CP_SCHEDULERS, tmp); in gfx_v8_0_kiq_setting()
4309 WREG32(mmRLC_CP_SCHEDULERS, tmp); in gfx_v8_0_kiq_setting()
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| D | gfx_v9_0.c | 3451 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS); in gfx_v9_0_kiq_setting()
3454 WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v9_0_kiq_setting()
3456 WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v9_0_kiq_setting()
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| D | gfx_v10_0.c | 6584 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS); in gfx_v10_0_kiq_setting()
6587 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v10_0_kiq_setting()
6589 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v10_0_kiq_setting()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_8_0_d.h | 1489 #define mmRLC_CP_SCHEDULERS 0xecaa macro
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| D | gfx_8_1_d.h | 1485 #define mmRLC_CP_SCHEDULERS 0xecaa macro
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 6203 #define mmRLC_CP_SCHEDULERS … macro
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| D | gc_9_1_offset.h | 6425 #define mmRLC_CP_SCHEDULERS … macro
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| D | gc_9_2_1_offset.h | 6401 #define mmRLC_CP_SCHEDULERS … macro
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| D | gc_10_1_0_offset.h | 9539 #define mmRLC_CP_SCHEDULERS … macro
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| D | gc_10_3_0_offset.h | 9361 #define mmRLC_CP_SCHEDULERS … macro
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