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Searched refs:mmMP1_SMN_IH_SW_INT_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/mp/
Dmp_12_0_0_offset.h329 #define mmMP1_SMN_IH_SW_INT_BASE_IDX … macro
Dmp_10_0_offset.h329 #define mmMP1_SMN_IH_SW_INT_BASE_IDX … macro
Dmp_11_0_offset.h333 #define mmMP1_SMN_IH_SW_INT_BASE_IDX … macro
Dmp_11_0_8_offset.h329 #define mmMP1_SMN_IH_SW_INT_BASE_IDX … macro
Dmp_9_0_offset.h343 #define mmMP1_SMN_IH_SW_INT_BASE_IDX 0 macro
Dmp_11_5_0_offset.h377 #define mmMP1_SMN_IH_SW_INT_BASE_IDX … macro