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Searched refs:mmHDMI_ACR_32_0 (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c1442 tmp = RREG32(mmHDMI_ACR_32_0 + dig->afmt->offset); in dce_v6_0_audio_set_acr()
1444 WREG32(mmHDMI_ACR_32_0 + dig->afmt->offset, tmp); in dce_v6_0_audio_set_acr()
Ddce_v10_0.c1491 tmp = RREG32(mmHDMI_ACR_32_0 + dig->afmt->offset); in dce_v10_0_afmt_update_ACR()
1493 WREG32(mmHDMI_ACR_32_0 + dig->afmt->offset, tmp); in dce_v10_0_afmt_update_ACR()
Ddce_v11_0.c1540 tmp = RREG32(mmHDMI_ACR_32_0 + dig->afmt->offset); in dce_v11_0_afmt_update_ACR()
1542 WREG32(mmHDMI_ACR_32_0 + dig->afmt->offset, tmp); in dce_v11_0_afmt_update_ACR()
Ddce_v8_0.c1472 WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT)); in dce_v8_0_afmt_update_ACR()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3850 #define mmHDMI_ACR_32_0 0x1C37 macro
Ddce_8_0_d.h3183 #define mmHDMI_ACR_32_0 0x1c37 macro
Ddce_10_0_d.h3962 #define mmHDMI_ACR_32_0 0x4a2e macro
Ddce_11_0_d.h3827 #define mmHDMI_ACR_32_0 0x4a2e macro
Ddce_11_2_d.h5058 #define mmHDMI_ACR_32_0 0x4a2e macro