Home
last modified time | relevance | path

Searched refs:mmDIG1_TMDS_CTL2_3_GEN_CNTL (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2641 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL 0x1F87 macro
Ddce_8_0_d.h3481 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL 0x1f87 macro
Ddce_10_0_d.h4260 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL 0x4b76 macro
Ddce_11_0_d.h4209 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL 0x4b76 macro
Ddce_11_2_d.h5440 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL 0x4b76 macro
Ddce_12_0_offset.h10468 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5768 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_3_0_3_offset.h5288 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_1_0_offset.h8645 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_2_1_0_offset.h10163 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_3_0_2_offset.h9882 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_2_0_0_offset.h11256 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_3_0_0_offset.h11026 #define mmDIG1_TMDS_CTL2_3_GEN_CNTL … macro