Home
last modified time | relevance | path

Searched refs:mmDCIO_GSL_GENLK_PAD_CNTL (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1352 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x1922 macro
Ddce_8_0_d.h1290 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x1922 macro
Ddce_10_0_d.h1577 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824 macro
Ddce_11_0_d.h1402 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824 macro
Ddce_11_2_d.h1482 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824 macro
Ddce_12_0_offset.h1868 #define mmDCIO_GSL_GENLK_PAD_CNTL macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h5497 #define mmDCIO_GSL_GENLK_PAD_CNTL macro
Ddcn_3_0_1_offset.h9144 #define mmDCIO_GSL_GENLK_PAD_CNTL macro
Ddcn_1_0_offset.h10411 #define mmDCIO_GSL_GENLK_PAD_CNTL macro
Ddcn_2_1_0_offset.h11369 #define mmDCIO_GSL_GENLK_PAD_CNTL macro
Ddcn_3_0_2_offset.h11469 #define mmDCIO_GSL_GENLK_PAD_CNTL macro
Ddcn_2_0_0_offset.h12786 #define mmDCIO_GSL_GENLK_PAD_CNTL macro
Ddcn_3_0_0_offset.h12625 #define mmDCIO_GSL_GENLK_PAD_CNTL macro