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Searched refs:min_clk_index (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/
Ddml2_top_optimization.c177 …l->mode_support_params.min_clk_index = l->next_candidate_display_cfg.stage3.min_clk_index_for_late… in dml2_top_optimization_perform_optimization_phase()
179 …l->mode_support_params.min_clk_index = l->next_candidate_display_cfg.stage1.min_clk_index_for_late… in dml2_top_optimization_perform_optimization_phase()
229 l->mode_support_params.min_clk_index = cur_state; in dml2_top_optimization_perform_optimization_phase_1()
Ddml_top.c111 …l->mode_support_params.min_clk_index = l->base_display_config_with_meta.stage1.min_clk_index_for_l… in dml2_check_mode_supported()
168 …l->mode_support_params.min_clk_index = l->base_display_config_with_meta.stage1.min_clk_index_for_l… in dml2_build_mode_programming()
179 …l->mode_support_params.min_clk_index = l->base_display_config_with_meta.stage1.min_clk_index_for_l… in dml2_build_mode_programming()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
Ddml2_core_dcn4.c415 l->mode_support_ex_params.min_clk_index = in_out->min_clk_index; in core_dcn4_mode_support()
553 …l->mode_programming_ex_params.min_clk_index = lookup_uclk_dpm_index_by_freq(in_out->programming->m… in core_dcn4_mode_programming()
625 …level = in_out->instance->scratch.mode_programming_locals.mode_programming_ex_params.min_clk_index; in core_dcn4_populate_informative()
627 …voltage_level = in_out->instance->scratch.mode_support_locals.mode_support_ex_params.min_clk_index; in core_dcn4_populate_informative()
Ddml2_core_shared_types.h2053 int min_clk_index; member
2066 int min_clk_index; member
Ddml2_core_dcn4_calcs.c6953 unsigned int min_clk_index) in get_g6_temp_read_blackout_us() argument
6960 return soc->power_management_parameters.g6_temp_read_blackout_us[min_clk_index]; in get_g6_temp_read_blackout_us()
6982 unsigned int min_clk_index) in get_max_urgent_latency_us() argument
6985 …latency = dcn4x->per_uclk_dpm_params[min_clk_index].maximum_latency_when_urgent_uclk_cycles / uclk… in get_max_urgent_latency_us()
7045 mode_lib->ms.state_idx = in_out_params->min_clk_index; in dml_core_mode_support()
7047 …mode_lib->ms.DCFCLK = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].… in dml_core_mode_support()
7048 …cClock = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].min_fclk_khz … in dml_core_mode_support()
7054 …_kbps_to_uclk_mhz(min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].pre_derate_dr… in dml_core_mode_support()
7055 …w_mbps = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].pre_derate_dr… in dml_core_mode_support()
7063 dml2_printf("DML::%s: min_clk_index = %0d\n", __func__, in_out_params->min_clk_index); in dml_core_mode_support()
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Ddml2_core_shared.c771 mode_lib->ms.state_idx = in_out_params->min_clk_index; in dml2_core_shared_mode_support()
773 …mode_lib->ms.DCFCLK = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].… in dml2_core_shared_mode_support()
774 …cClock = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].min_fclk_khz … in dml2_core_shared_mode_support()
780 …_kbps_to_uclk_mhz(min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].pre_derate_dr… in dml2_core_shared_mode_support()
781 …w_mbps = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].pre_derate_dr… in dml2_core_shared_mode_support()
788 dml2_printf("DML::%s: min_clk_index = %0d\n", __func__, in_out_params->min_clk_index); in dml2_core_shared_mode_support()
1986 …dml2_printf("DML::%s: in_out_params->min_clk_index = %u\n", __func__, in_out_params->min_clk_index… in dml2_core_shared_mode_support()
2838 …u (min_clk_index=%d)\n", __func__, mode_lib->ms.support.ModeSupport, in_out_params->min_clk_index); in dml2_core_shared_mode_support()
9922 dml2_printf("DML::%s: min_clk_index = %0d\n", __func__, in_out_params->min_clk_index); in dml2_core_shared_mode_programming()
9923 … %d\n", __func__, min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].min_fclk_khz); in dml2_core_shared_mode_programming()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/
Ddml2_internal_shared_types.h367 int min_clk_index; member